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[PR #407] fix(layout): validate SF tensors are CUDA; add MXFP4 (1, 32) SF transform test #424
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📋 Pull Request Information
Original PR: https://github.com/deepseek-ai/DeepGEMM/pull/407
Author: @qqtang-code
Created: 8/14/2026
Status: 🔄 Open
Base:
main← Head:feat/sf-layout-device-guard📝 Commits (2)
08562ebfix(layout): validate SF tensors are CUDA before JIT launch73ccae7review: address ds-review-bot feedback📊 Changes
2 files changed (+33 additions, -0 deletions)
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📝
csrc/jit_kernels/impls/smxx_layout.hpp(+5 -0)📝
tests/test_layout.py(+28 -0)📄 Description
Summary
Two small hardening changes for the scale-factor (SF) layout APIs, shared with the SGLang fork (sgl-project/DeepGEMM#75):
preprocess_sfdevice validation — the layout-transform functions feed.data_ptr()straight into JIT-launched device kernels (or into thetorchfallback). A CPU tensor reaches the kernel launch with host pointers and segfaults the process (illegal device address) instead of failing cleanly.preprocess_sfnow assertssf.is_cuda()up front, covering bothget_mn_major_tma_aligned_tensorandget_mn_major_tma_aligned_packed_ue8m0_tensor.Regression test for the MXFP4
(1, 32)recipe — mirrors the exact call SGLang makes during Kimi-K3 / DeepSeek-V4 weight loading (transform_sf_into_required_layout(sf, mn=..., k=..., recipe=(1, 32), num_groups=..., disable_ue8m0_cast=False)), asserting the packed-UE8M0 output matches the torch reference (values, shape, strides). Skipped on SM90 (which uses the(1, 128)FP32 TMA layout) and on SM120 (upstream main has no arch-12 branch; SM120 support lives on the sgl-project fork).Context
The device assert turns a silent process crash (CPU tensor into a device kernel) into a clean assertion error. The regression test locks in the MXFP4 weight-prep path that SGLang's MoE runner relies on (validated end-to-end on 4× RTX 6000D / SM120 with the sgl fork: sgl-project/sglang#34827).
🔄 This issue represents a GitHub Pull Request. It cannot be merged through Gitea due to API limitations.