[GH-ISSUE #71] How to solve the error ""Misaligned barriers" raised by padded cuda tensors #44

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opened 2026-10-26 21:11:07 +00:00 by bsakaguchi · 2 comments

bsakaguchi commented 2026-10-26 21:11:07 +00:00

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Originally created by @NiuMa-1234 on GitHub (Mar 20, 2025).
Original GitHub issue: https://github.com/deepseek-ai/DeepGEMM/issues/71

Hi, thank you for your marvelous work! I've been trying to pad the tensors with illegal shapes to adapt to DeepGEMM, and found it would raise errors as below during training:

A.shape: [7168, 128] (original: [7168, 103])
B.shape: [2048, 128] (original: [2048, 103])

.../DeepGEMM/deep_gemm/jit/../include/deep_gemm/fp8_gemm.cuh(103): error: static assertion failed with "Misaligned barriers"
      static_assert(not kMustUseUniformedScaleB or SHAPE_K_SCALES % (sizeof(Barrier) / sizeof(float)) == 0, "Misaligned barriers");
      ^
          detected during:
            instantiation of "void deep_gemm::fp8_gemm_kernel<SHAPE_N,SHAPE_K,BLOCK_M,BLOCK_N,BLOCK_K,kNumGroups,kNumStages,kNumTMAThreads,kNumMathThreadsPerGroup,kNumTMAMulticast,kGemmType>(__nv_bfloat16 *, float *, int *, uint32_t, CUtensorMap, CUtensorMap, CUtensorMap, CUtensorMap) [with SHAPE_N=2048U, SHAPE_K=128U, BLOCK_M=128U, BLOCK_N=128U, BLOCK_K=128U, kNumGroups=1U, kNumStages=5U, kNumTMAThreads=128U, kNumMathThreadsPerGroup=128U, kNumTMAMulticast=2U, kGemmType=deep_gemm::GemmType::Normal]" at line 368
            instantiation of "void deep_gemm::Gemm<SHAPE_N, SHAPE_K, BLOCK_M, BLOCK_N, BLOCK_K, kNumGroups, kNumStages, kNumTMAMulticast, kGemmType>::run(__nv_bfloat16 *, float *, int *, uint32_t, const CUtensorMap &, const CUtensorMap &, const CUtensorMap &, const CUtensorMap &, cudaStream_t, int, uint32_t) [with SHAPE_N=2048U, SHAPE_K=128U, BLOCK_M=128U, BLOCK_N=128U, BLOCK_K=128U, kNumGroups=1U, kNumStages=5U, kNumTMAMulticast=2U, kGemmType=deep_gemm::GemmType::Normal]" at line 37 of /root/.deep_gemm/cache/kernel.gemm_fp8_fp8_bf16_nt.173619a8c7cf/kernel.cu

1 error detected in the compilation of "/root/.deep_gemm/cache/kernel.gemm_fp8_fp8_bf16_nt.173619a8c7cf/kernel.cu".
[rank5]: Traceback (most recent call last):
[rank5]:     fn((A.view(torch.float8_e4m3fn).contiguous(), A_scale_inv.contiguous()), (B.view(torch.float8_e4m3fn).contiguous(), B_scale_inv.contiguous()), output)
[rank5]:   File ".../DeepGEMM/deep_gemm/jit_kernels/gemm.py", line 156, in gemm_fp8_fp8_bf16_nt
[rank5]:     runtime = jit_tuner.compile_and_tune(
[rank5]:   File ".../DeepGEMM/deep_gemm/jit_kernels/tuner.py", line 40, in compile_and_tune
[rank5]:     kernels.append((build(name, arg_defs, code), tuned_keys))
[rank5]:   File ".../DeepGEMM/deep_gemm/jit/compiler.py", line 139, in build
[rank5]:     assert subprocess.check_call(command) == 0, f'Failed to compile {src_path}'
[rank5]:   File "/usr/lib/python3.10/subprocess.py", line 369, in check_call
[rank5]:     raise CalledProcessError(retcode, cmd)
[rank5]: subprocess.CalledProcessError: Command '['/usr/local/cuda/bin/nvcc', '/root/.deep_gemm/cache/kernel.gemm_fp8_fp8_bf16_nt.173619a8c7cf/kernel.cu', '-o', '/root/.deep_gemm/tmp/nvcc.tmp.b061caf2-1a63-4f94-b8fb-a77cc4ac1579.70de906ed8e5.so', '-std=c++17', '-shared', '-O3', '--expt-relaxed-constexpr', '--expt-extended-lambda', '-gencode=arch=compute_90a,code=sm_90a', '--ptxas-options=--register-usage-level=10', '--diag-suppress=177,174,940', '--compiler-options=-fPIC,-O3,-Wno-deprecated-declarations,-Wno-abi', '-I/lpai/volumes/ss-nlu-ali-sh/lizr/chenxingru/DeepGEMM2/DeepGEMM/deep_gemm/jit/../include']' returned non-zero exit status 1.

Here's the way how I pad the tensors:
A = torch.nn.functional.pad(A, (0, ((shape0+128)//128*128)-shape0), mode='constant', value=0)

The deepgemm works well with legal shape, but if I pad the illegal ones to legal ones (and keep the continuity in memory), it would raise the above error. Could you plz help me? Many many thanks.

Originally created by @NiuMa-1234 on GitHub (Mar 20, 2025). Original GitHub issue: https://github.com/deepseek-ai/DeepGEMM/issues/71 Hi, thank you for your marvelous work! I've been trying to pad the tensors with illegal shapes to adapt to DeepGEMM, and found it would raise errors as below during training: A.shape: [7168, 128] (original: [7168, 103]) B.shape: [2048, 128] (original: [2048, 103]) ``` .../DeepGEMM/deep_gemm/jit/../include/deep_gemm/fp8_gemm.cuh(103): error: static assertion failed with "Misaligned barriers" static_assert(not kMustUseUniformedScaleB or SHAPE_K_SCALES % (sizeof(Barrier) / sizeof(float)) == 0, "Misaligned barriers"); ^ detected during: instantiation of "void deep_gemm::fp8_gemm_kernel<SHAPE_N,SHAPE_K,BLOCK_M,BLOCK_N,BLOCK_K,kNumGroups,kNumStages,kNumTMAThreads,kNumMathThreadsPerGroup,kNumTMAMulticast,kGemmType>(__nv_bfloat16 *, float *, int *, uint32_t, CUtensorMap, CUtensorMap, CUtensorMap, CUtensorMap) [with SHAPE_N=2048U, SHAPE_K=128U, BLOCK_M=128U, BLOCK_N=128U, BLOCK_K=128U, kNumGroups=1U, kNumStages=5U, kNumTMAThreads=128U, kNumMathThreadsPerGroup=128U, kNumTMAMulticast=2U, kGemmType=deep_gemm::GemmType::Normal]" at line 368 instantiation of "void deep_gemm::Gemm<SHAPE_N, SHAPE_K, BLOCK_M, BLOCK_N, BLOCK_K, kNumGroups, kNumStages, kNumTMAMulticast, kGemmType>::run(__nv_bfloat16 *, float *, int *, uint32_t, const CUtensorMap &, const CUtensorMap &, const CUtensorMap &, const CUtensorMap &, cudaStream_t, int, uint32_t) [with SHAPE_N=2048U, SHAPE_K=128U, BLOCK_M=128U, BLOCK_N=128U, BLOCK_K=128U, kNumGroups=1U, kNumStages=5U, kNumTMAMulticast=2U, kGemmType=deep_gemm::GemmType::Normal]" at line 37 of /root/.deep_gemm/cache/kernel.gemm_fp8_fp8_bf16_nt.173619a8c7cf/kernel.cu 1 error detected in the compilation of "/root/.deep_gemm/cache/kernel.gemm_fp8_fp8_bf16_nt.173619a8c7cf/kernel.cu". [rank5]: Traceback (most recent call last): [rank5]: fn((A.view(torch.float8_e4m3fn).contiguous(), A_scale_inv.contiguous()), (B.view(torch.float8_e4m3fn).contiguous(), B_scale_inv.contiguous()), output) [rank5]: File ".../DeepGEMM/deep_gemm/jit_kernels/gemm.py", line 156, in gemm_fp8_fp8_bf16_nt [rank5]: runtime = jit_tuner.compile_and_tune( [rank5]: File ".../DeepGEMM/deep_gemm/jit_kernels/tuner.py", line 40, in compile_and_tune [rank5]: kernels.append((build(name, arg_defs, code), tuned_keys)) [rank5]: File ".../DeepGEMM/deep_gemm/jit/compiler.py", line 139, in build [rank5]: assert subprocess.check_call(command) == 0, f'Failed to compile {src_path}' [rank5]: File "/usr/lib/python3.10/subprocess.py", line 369, in check_call [rank5]: raise CalledProcessError(retcode, cmd) [rank5]: subprocess.CalledProcessError: Command '['/usr/local/cuda/bin/nvcc', '/root/.deep_gemm/cache/kernel.gemm_fp8_fp8_bf16_nt.173619a8c7cf/kernel.cu', '-o', '/root/.deep_gemm/tmp/nvcc.tmp.b061caf2-1a63-4f94-b8fb-a77cc4ac1579.70de906ed8e5.so', '-std=c++17', '-shared', '-O3', '--expt-relaxed-constexpr', '--expt-extended-lambda', '-gencode=arch=compute_90a,code=sm_90a', '--ptxas-options=--register-usage-level=10', '--diag-suppress=177,174,940', '--compiler-options=-fPIC,-O3,-Wno-deprecated-declarations,-Wno-abi', '-I/lpai/volumes/ss-nlu-ali-sh/lizr/chenxingru/DeepGEMM2/DeepGEMM/deep_gemm/jit/../include']' returned non-zero exit status 1. ``` Here's the way how I pad the tensors: `A = torch.nn.functional.pad(A, (0, ((shape0+128)//128*128)-shape0), mode='constant', value=0) ` The deepgemm works well with legal shape, but if I pad the illegal ones to legal ones (and keep the continuity in memory), it would raise the above error. Could you plz help me? Many many thanks.

bsakaguchi closed this issue 2026-10-26 21:11:08 +00:00

bsakaguchi commented 2026-10-26 21:11:09 +00:00

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@soundOfDestiny commented on GitHub (Mar 21, 2025):

It's been fixed in latest main.

<!-- gh-comment-id:2743031250 --> @soundOfDestiny commented on GitHub (Mar 21, 2025): It's been fixed in latest main.

bsakaguchi commented 2026-10-26 21:11:09 +00:00

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@NiuMa-1234 commented on GitHub (Mar 25, 2025):

It's been fixed in latest main.

Hi, I've test the latest code, and found it would raise another error, which is like this :
A.shape: [4096,256] (original: [4096,206])
B.shape: [7168,256] (original: [7168,206])

torch.Size([4096, 256]) torch.Size([4096, 2]) torch.Size([7168, 256]) torch.Size([56, 2]) /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [0,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [1,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [2,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [3,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [4,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [5,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [8,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [9,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [10,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [11,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [12,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [13,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [14,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. [rank6]:[E325 06:35:52.757615577 ProcessGroupNCCL.cpp:1534] [PG 54 Rank 2] Process group watchdog thread terminated with exception: CUDA error: device-side assert triggered

The padded tensors is contiguous (I use tensor.contiguous() when pass tensors to gemm). Is there any other factor that could raise this error? Could you plz help me ? Many many thanks.

<!-- gh-comment-id:2750188685 --> @NiuMa-1234 commented on GitHub (Mar 25, 2025): > It's been fixed in latest main. Hi, I've test the latest code, and found it would raise another error, which is like this : A.shape: [4096,256] (original: [4096,206]) B.shape: [7168,256] (original: [7168,206]) `torch.Size([4096, 256]) torch.Size([4096, 2]) torch.Size([7168, 256]) torch.Size([56, 2]) /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [0,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [1,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [2,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [3,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [4,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [5,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [8,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [9,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [10,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [11,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [12,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [13,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. /opt/pytorch/pytorch/aten/src/ATen/native/cuda/ScatterGatherKernel.cu:144: operator(): block: [0,0,0], thread: [14,0,0] Assertion idx_dim >= 0 && idx_dim < index_size && index out of bounds failed. [rank6]:[E325 06:35:52.757615577 ProcessGroupNCCL.cpp:1534] [PG 54 Rank 2] Process group watchdog thread terminated with exception: CUDA error: device-side assert triggered` The padded tensors is contiguous (I use `tensor.contiguous()` when pass tensors to gemm). Is there any other factor that could raise this error? Could you plz help me ? Many many thanks.

bsakaguchi referenced this issue 2026-10-26 21:14:58 +00:00

[PR #44] [MERGED] Performance: Configuration algorithms tuned to minimize the impact of tail effects, now up to 1402 TFLOPS #217

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