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https://github.com/ikawrakow/ik_llama.cpp.git
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0cc32ff0b1
* WIP: adding mainline mmq_id implementation * This seems to work * Now also -fmoe works * WIP * WIP * WIP * This works for mainline supported quants * mmq_id: add iq2_k, iq2_k_r4 * mmiq_id: don't assume row size is multiple of type size (per row scales) * mmiq_id: don't assume row size is multiple of type size * mmq_id: add iq2_ks So we are sure it works with per row scales * mmq_id: add iq2_kl * mmq_id: add iq3_ks * mmq_id: adding iq3_k, iq3_k_r4 * mmq_id: add iq4_kss, iq4_ks, iq4_ks_r4 * mmq_id: adding iq4_k, iq4_k_r4 * mmq_id: adding iq5_ks, iq5_ks_r4 * mmq_id: adding iq5_k, iq5_k_r4, q6_0 * mmq_id: adding iq6_k * mmq_id: add iq1_s_r4 * mmq_id: adding iq1_kt, iq2_kt * mmq_id: add iq3_kt, iq4_kt * Add CUDA fp8 header --------- Co-authored-by: Iwan Kawrakow <iwan.kawrakow@gmail.com>
80 lines
3.3 KiB
Plaintext
80 lines
3.3 KiB
Plaintext
#include "../mmq_id_common.cuh"
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template <int mmq_y, bool need_check> static __device__ __forceinline__ void load_tiles_iq3_ks(
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const char * __restrict__ x, int * __restrict__ x_tile, const int kbx0, const int i_max, const int stride) {
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constexpr int nwarps = mmq_get_nwarps_device();
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#ifdef INT8_MMA_AVAILABLE
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int * x_qs = (int *) x_tile;
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float * x_df = (float *) (x_qs + WARP_SIZE*2);
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#else
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constexpr tile_x_sizes txs = MMQ_DP4A_TXS_Q8_0_16;
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int * x_qs = (int *) x_tile;
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float * x_df = (float *) (x_qs + txs.qs);
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#endif // INT8_MMA_AVAILABLE
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constexpr int qstep = 8;
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const int kqsx = threadIdx.x % qstep;
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#pragma unroll
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for (int i0 = 0; i0 < mmq_y; i0 += nwarps * WARP_SIZE/qstep) {
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int i = i0 + threadIdx.y*(WARP_SIZE/qstep) + threadIdx.x/qstep;
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if (need_check) {
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i = min(i, i_max);
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}
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const half * dptr = (const half *)(x + i*stride);
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const float d = __half2float(dptr[0]);
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const block_iq3_ks * bxi = (const block_iq3_ks *)(dptr + 1) + kbx0;
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//uint16_t extra = bxi->extra >> 8;
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int qh = get_int_b2(bxi->qh, kqsx);
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uint32_t extra32 = uint32_t(bxi->extra >> 8) * 0x01010101;
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#pragma unroll
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for (int l = 0; l < qstep/4; ++l) {
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const int ql = get_int_b2(bxi->qs, kqsx + qstep*l);
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uint32_t val1 = ((ql >> 0) & 0x33333333) | ((qh << 2) & 0x04040404) | ((extra32 << 3) & 0x08080808)
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| ((qh << 4) & 0x40404040) | ((extra32 << 5) & 0x80808080);
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uint32_t val2 = ((ql >> 2) & 0x33333333) | ((qh << 1) & 0x04040404) | ((extra32 << 2) & 0x08080808)
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| ((qh << 3) & 0x40404040) | ((extra32 << 4) & 0x80808080);
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int2 v1 = get_int_from_table_16(val1, iq3nl_values);
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int2 v2 = get_int_from_table_16(val2, iq3nl_values);
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extra32 >>= 4;
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qh >>= 4;
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#ifdef INT8_MMA_AVAILABLE
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x_qs[i*MMQ_MMA_TILE_X_K_Q8_0 + kqsx + 32*l + 0] = v1.x;
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x_qs[i*MMQ_MMA_TILE_X_K_Q8_0 + kqsx + 32*l + 8] = v2.x;
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x_qs[i*MMQ_MMA_TILE_X_K_Q8_0 + kqsx + 32*l + 16] = v1.y;
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x_qs[i*MMQ_MMA_TILE_X_K_Q8_0 + kqsx + 32*l + 24] = v2.y;
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#else
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x_qs[i*(2*WARP_SIZE + 1) + kqsx + 32*l + 0] = v1.x;
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x_qs[i*(2*WARP_SIZE + 1) + kqsx + 32*l + 8] = v2.x;
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x_qs[i*(2*WARP_SIZE + 1) + kqsx + 32*l + 16] = v1.y;
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x_qs[i*(2*WARP_SIZE + 1) + kqsx + 32*l + 24] = v2.y;
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#endif // INT8_MMA_AVAILABLE
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}
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#ifdef INT8_MMA_AVAILABLE
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x_df[i*MMQ_MMA_TILE_X_K_Q8_0 + kqsx] = d * (int(((bxi->scales[kqsx%4] >> 4*(kqsx/4)) & 0xf) | (((bxi->extra >> kqsx) & 1) << 4)) - 16);
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#else
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x_df[i*(WARP_SIZE/4) + i/4 + kqsx] = d * (int(((bxi->scales[kqsx%4] >> 4*(kqsx/4)) & 0xf) | (((bxi->extra >> kqsx) & 1) << 4)) - 16);
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#endif // INT8_MMA_AVAILABLE
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}
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}
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template <int mmq_x, int mmq_y, bool need_check>
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struct mmq_type_traits_id<mmq_x, mmq_y, need_check, GGML_TYPE_IQ3_KS> {
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static constexpr load_tiles_mmq_t load_tiles = load_tiles_iq3_ks<mmq_y, need_check>;
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static constexpr vec_dot_mmq_t vec_dot_mma = vec_dot_q8_0_q8_1_mma<mmq_x, mmq_y, MMQ_Q8_1_DS_LAYOUT_D4>;
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static constexpr vec_dot_mmq_t vec_dot_dp4a = vec_dot_q8_0_q8_1_dp4a<mmq_x, mmq_y>;
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};
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DECL_MMQ_CASE(GGML_TYPE_IQ3_KS);
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