Polisetty V R K Jyothendra Varma
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f0303fd07e
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[Intel GPU] Enable DeepSeek R1 inference on XPU (#18461)
Signed-off-by: P V R K Jyothendra Varma <polisetty.v.r.k.jyothendra.varma@intel.com>
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2026-03-29 22:35:59 -07:00 |
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cs-cat
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22e378af86
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Fix result writer in tuning_block_wise_kernel.py, and add FP8 kernel config for L40 (#20368)
Signed-off-by: cs-cat <118669451+cs-cat@users.noreply.github.com>
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2026-03-20 09:28:54 +08:00 |
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Mook
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abc672e717
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[Benchmark] use flashinfer bench_gpu_time instead of triton do_bench (#20305)
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2026-03-12 04:04:30 +00:00 |
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Xiaoyu Zhang
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03b835e7d1
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Refactor tuning block wise kernel and opt Qwen/Qwen3-VL-32B-Instruct-FP8 (#14141)
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2025-12-08 09:24:58 +08:00 |
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Shu Wang
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6664083522
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Replace [silu_and_mul_]scaled_fp4_group_quant by Flashinfer equivalent (#12376)
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2025-11-13 00:26:00 -08:00 |
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Cheng Wan
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5b214b50b6
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[Refactor] move deep_gemm_wrapper out of quantization (#11784)
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2025-10-17 18:57:54 -07:00 |
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Kaixi Hou
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5c34b4f1c7
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[NVIDIA] [2/N] Optimize silu_and_mul_scaled_fp4_grouped_quant perf (#9556)
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2025-08-29 17:17:03 -07:00 |
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Lifu Huang
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6e2da51561
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Replace time.time() to time.perf_counter() for benchmarking. (#6178)
Signed-off-by: Lifu Huang <lifu.hlf@gmail.com>
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2025-05-11 14:32:49 -07:00 |
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Zhaoyi Li
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c555d794f7
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Minor update for ROCm variable style (#5562)
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2025-04-19 23:45:27 -07:00 |
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laixin
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b0df5d240b
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Tuning Script for Feature DeepSeek V3/R1 INT8 Quantization (block-wise) (#3922)
Co-authored-by: sleepcoo <sleepcoo@gmail.com>
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2025-02-27 10:59:46 +00:00 |
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Xiaoyu Zhang
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c38f3aed24
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support multi-gpu block-gemm tuning (#3639)
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2025-02-18 00:00:35 +08:00 |
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yigex
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fdf04a1426
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[ROCm] Add ROCm tuning config to block gemm and Re-tune for AMD Radeon Graphics (#3418)
Co-authored-by: Bruce Xue <yigex@xilinx.com>
Co-authored-by: HAI <hixiao@gmail.com>
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2025-02-10 23:55:04 -08:00 |
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Yineng Zhang
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7b020cca2d
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add tuning block wise fp8 (#3242)
Co-authored-by: HandH1998 <007aabbcc411@gmail.com>
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2025-02-01 03:58:18 +08:00 |
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Ke Bao
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85b2e05770
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Add int8 quant kernel (#2848)
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2025-01-13 13:16:58 +08:00 |
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