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[GH-ISSUE #6469] [Bug] A 65-name PTX register list marks the object malformed and drops kernel declarations #3879
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opened 2026-10-31 00:44:52 +00:00 by bsakaguchi
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Originally created by @coygeek on GitHub (Oct 23, 2026).
Original GitHub issue: https://github.com/morluto/rea/issues/6469
Before submitting
Area
Native analysis or decompilation
Observed behavior
The public
inspect-gpu-code-objectsCLI reports a standalone PTX object asmalformedand returns no kernels when its single entry declares 65 scalar.b32registers in one comma-separated list. The command exits 0 withMalformed PTX resource declarationand partial payload coverage. A 64-name list works. A three-entry fixture retains the entry before the long list, but loses the affected entry and the entry after it. Original PTX text remains retained.Reproduction
Prerequisites: run from the source checkout described under the version/environment field, with its pinned Node toolchain, locked dependencies, and compiled CLI already available. No install, build, CUDA compiler, driver, or target execution is part of this reproduction. The following executed block generates all inputs, gives each CLI child only an isolated HOME/USERPROFILE/XDG/TMPDIR environment plus PATH, and removes its temporary directory in
finally. All client/provider override variables are absent from the child environment.Expected behavior
Scalar register lists must retain the declared kernel and count each name. The 65-name input should produce one
kkernel with virtual.b32count 65 and complete payload coverage, just as the split-declaration and range controls do. A necessary resource refusal must preserve known facts and explicitly identify the resource limitation; declaration length alone must not turn valid PTX into malformed syntax or discard later entries.Impact and scope
P2: bounded loss of structured kernel facts and incorrect format classification for the executed 65- and 66-name standalone lists. All observed failing runs returned partial coverage, so they did not claim complete analysis. The earlier entry survives in the three-entry case; not every kernel in every affected artifact is necessarily lost. The original PTX text survives in complete Evidence and the executed PTX analysis view returned that exact text, so an analyst can inspect/count the small declaration manually without changing artifact identity. The kernels analysis view remained empty: paging cannot recover structured rows that were never retained. Split declarations and the range form worked as controls, but rewriting a source artifact changes its bytes, digest, and coordinates and does not restore structured facts for the original artifact. Embedded containers and other declaration forms were not tested. No security boundary crossing was identified.
REA version
Source main at
e32a0494d4; package version andnode scripts/rea.mjs --versionboth 6.7.0. This used the checkout's existing compiled runtime; a separate source-service execution confirmed the same failure. The latest published tag isrea-agents-6.7.0, but a source-tree check found no GPU reader at that tag. Published-package runtime reproduction was not run, and no released-package failure is claimed.Runtime and platform
Node.js v24.18.0; macOS 27.0.1 arm64; existing compiled source-checkout runtime. No CUDA/ROCm tool, GPU driver, or provider engine was invoked.
Target and artifact context
Generated standalone ASCII PTX with
.version 8.8,.target sm_80,.address_size 64, and empty-parameter.visible .entrybodies ending inret;. The fixtures and all required inputs are generated inline above.Interface
CLI
Earliest failure stage
Native analysis or reconstruction
Relevant output or evidence
The executed block printed these fields for the boundary and controls; every command exited 0:
Contract evidence:
docs/gpu-code-objects.md:81-88promises per-name/range virtual-register counts and retained unknown facts with partial coverage for unsupported/overflowing declarations; its resource-limit discussion at lines 140-151 promises retained facts and explicit uncertainty, with no 128-token syntax allowance. NVIDIA's PTX ISA 8.8 specification, sections 3.1, 5.4.1, and 5.4.6, permits percent-prefixed identifiers, demonstrates comma-separated register declarations, and describes 100 virtual.b32registers. Its instruction examples also mix percent-prefixed scalar names and ranges in a.reg .b32list. The count 65 introduces no different syntax or platform register-allocation requirement; no compiler or target execution was performed.The same input was also executed against the source service and returned the same malformed diagnostic and zero kernels. All 11 existing PTX parser tests passed with one worker; that result does not cover the long-list case.
Typed outcome or recovery expected
Retain the entry and its scalar register total. If decoding is genuinely limited, preserve the known entry declarations and mark the affected resource facts unknown with an explicit limitation; do not mislabel this list as malformed PTX.
Analysis or suspected cause
Source-derived:
src/gpu/PtxKernels.ts:259-268tests the collected resource-declaration token count against 128 before parsing individual register names. A 64-name declaration contributes 128 tokens including the type and separators; the 65-name case has 130 and fails at the final name.src/gpu/GpuInventory.ts:265-278maps that format failure tomalformed. The generator stops at the failing entry, explaining the observed loss of later entries. No implementation change is proposed.Additional context
Restoration check: Rerun the same generated inputs without rewriting the failing artifact. The 65-name single-entry input should retain
kwith virtual.b32count 65 and complete payload coverage, and the three-entry fixture should retainbefore,affected, andafterin order with the affected count 65. The 64-name, split65, and range65 controls must keep their observed counts and complete coverage; the original PTX bytes must stay retained. If a real admission constraint prevents complete decoding, report that constraint and unknown resource facts explicitly while preserving the entries, rather than classifying this scalar list as malformed. Do not weaken existing malformed/truncated-input rejection to satisfy this check.Read-only searches of open and closed issues found the related GPU feature requests #3674 and #5345, but no duplicate declaration-length failure. The documented scalar-counting behavior is already implemented on main; this report does not request SASS, GPU execution, or other future CUDA features. The last known good revision is NOT_ENOUGH_INFO; only the specified main baseline was runtime-tested. Prepared with AI assistance.