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📋 Pull Request Information
Original PR: https://github.com/morluto/rea/pull/7175
Author: @rozling
Created: 10/25/2026
Status: ❌ Closed
Base:
main← Head:codex/native-register-slice📝 Commits (1)
0af5d48feat(native): add bounded physical register backward slicing📊 Changes
21 files changed (+1386 additions, -0 deletions)
View changed files
📝
bridge/ghidra/ReaGhidraBridge.java(+152 -0)➕
docs/native-register-slicing.md(+68 -0)📝
package.json(+3 -0)➕
scripts/fixtures/native/register-slice.mjs(+22 -0)➕
scripts/verify/ghidra/register-slice-mcp.mjs(+169 -0)➕
scripts/verify/ghidra/register-slice-results.mjs(+48 -0)📝
src/application/DirectAnalysis.ts(+1 -0)📝
src/cli/coreNativeCommands.ts(+50 -0)📝
src/cliCommandNames.ts(+1 -0)📝
src/contracts/officialToolContracts.ts(+8 -0)📝
src/contracts/toolContractExamples.ts(+10 -0)📝
src/contracts/toolEffects.ts(+1 -0)📝
src/contracts/toolOutputSchemaGroups.ts(+6 -0)📝
src/domain/analysisView/analysisView.ts(+25 -0)➕
src/domain/analysisView/nativeRegisterSliceView.ts(+87 -0)➕
src/domain/native/NativeRegisterSlice.test.ts(+307 -0)➕
src/domain/native/nativeRegisterSlice.ts(+89 -0)➕
src/domain/native/nativeRegisterSlicing.ts(+259 -0)📝
src/ghidra/GhidraFunctionValues.ts(+10 -0)📝
src/server/registerOfficialTools.ts(+1 -0)...and 1 more files
📄 Description
Summary
Add
slice_native_registerandslice-native-registerto trace possible origins of a physical ARM32 register immediately before an exact instruction. The result preserves control-flow alternatives, original instruction bytes, unresolved dependencies, and explicit analysis cutoffs. This is a standalone tooling enhancement; no linked issue exists.Problem and expected behavior
Function-wide value graphs do not directly answer an exact physical-register boundary query. For synthetic
mov r0,#7; bx lr, queryingr0before0x1004now reportsCOPY of 0x7 at 0x1000, with a retained dependency graph and target/provider/profile provenance. Results describe possible origins under the declared model, not path feasibility or pointer validity.Change and scope
Capture instruction-level Ghidra p-code and traverse storage values at operation boundaries. Preserve joins, predicated writes, entry values and loop cycles. Loads, stack reloads, call effects, unsupported operations and overlapping storage remain unresolved where necessary. Explicit instruction/operation budgets bound capture; node/edge budgets bound the result.
Reuse existing provider dispatch, Evidence retention, CLI/MCP contracts and analysis-view paging. The bridge checks CFG destinations as well as decoded byte coverage, so an edge into an uncaptured instruction boundary cannot imply a complete slice. Node exhaustion at function entry reports only the budget actually exhausted.
Contract and boundary impact
ARM:LE:32:v7, known ARM mode, four-byte instructions,r0–r12,sp, andlr. Thumb and other profiles are rejected.Expected effects:
Evidence and regression coverage
Synthetic ARM fixtures cover constants, copies/arithmetic, branch joins, conditional writes, loop-carried values, entry values, register reuse, loads, stack reloads, calls, unsupported operations and missing control flow. Negative checks reject interior and foreign-function instruction addresses. Domain tests cover source/predicate mutations, overlapping storage and explicit budgets.
The review added a real-provider regression for an edge to the interior of a decoded instruction, and a domain regression for an exhausted node budget with an available edge budget. Independent review of the bridge/domain code at the submitted head found no unresolved P0–P2 findings; the cutoff diagnostic finding was fixed and re-reviewed.
Validation performed
On the submitted source, with matching SHA-256 hashes for all 21 changed files:
npm run build:cachedpassed.npm run checkpassed.npm run docs:checkpassed.register-slice-results.mjspassed independently authored expected-origin checks.register-slice-mcp.mjspassed the real public MCP workflow, retained graph paging, target/profile identity, original bytes, rejection/cutoff cases and normalized CLI parity.git diff --checkpassed.Build, static, documentation and real-provider validation ran sequentially in an isolated Linux checkout. The full repository test suite was not run. Hosted PR CI is separate and not claimed here.
Compatibility, safety, and release
Additive feature; no migration or version change. Only synthetic inputs were used. No hardware or ARM target code was executed. Memory contents, aliases, stack-store resolution, call preservation and path feasibility remain outside the supported proof. Full-suite hosted PR CI and other provider/platform combinations are not established by these checks.
Author readiness
Human owner: @rozling
Before merge
This PR is intentionally a draft. Human readiness and maintainer integration review remain pending. No merge is requested.
🔄 This issue represents a GitHub Pull Request. It cannot be merged through Gitea due to API limitations.