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[PR #133] fix(eager): fallback int8 matmul on ROCm/HIP to prevent access violation on RDNA2 #169
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Comfy-Org/comfy-kitchen#169
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📋 Pull Request Information
Original PR: https://github.com/Comfy-Org/comfy-kitchen/pull/133
Author: @niklastheiler
Created: 8/23/2026
Status: 🔄 Open
Base:
main← Head:patch-1📝 Commits (2)
536b2d3fix(eager): fallback int8 matmul on ROCm/HIP to prevent crash on RDNA219c9aadfix(eager): preserve exact INT32 accumulation on ROCm/HIP via bounded K chunking📊 Changes
1 file changed (+9 additions, -0 deletions)
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📝
comfy_kitchen/backends/eager/quantization.py(+9 -0)📄 Description
Summary
Fixes an access violation crash (
0xC0000005intorch_hip.dll/?_int_mm@cuda@at@@...) when running INT8 quantized models (e.g. SeedVR2 / ConvRot / INT8 tensorwise) on AMD RDNA2 (e.g. RX 6700 XT /gfx1031) under ROCm on Windows.Root Cause
In PyTorch with ROCm/HIP on Windows,
torch._int_mmattempts to dispatch to hardware matrix cores (WMMA / MFMA) intorch_hip.dll. On AMD RDNA2 architectures (gfx1031,gfx1032, etc.), these INT8 matrix cores are not present, resulting in an immediate native access violation (0xC0000005) during_int8_matmul_accumulate.Solution
In
fast_int8_mm, checkgetattr(torch.version, "hip", None)and compute the INT8 matrix multiplication via GPU float matmul(lhs.to(torch.float32) @ rhs.to(torch.float32)).to(torch.int32).Verification
Tested on:
gfx1031, 12 GB VRAM)seedvr2_3b_int8_convrot.safetensors🔄 This issue represents a GitHub Pull Request. It cannot be merged through Gitea due to API limitations.