mirror of
https://github.com/NVIDIA/nvbench.git
synced 2026-03-14 20:27:24 +00:00
Fix warious warnings
This commit is contained in:
@@ -35,7 +35,7 @@ struct l2flush
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if (m_l2_size > 0)
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{
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void *buffer = m_l2_buffer;
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NVBENCH_CUDA_CALL(cudaMalloc(&buffer, m_l2_size));
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NVBENCH_CUDA_CALL(cudaMalloc(&buffer, static_cast<std::size_t>(m_l2_size)));
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m_l2_buffer = reinterpret_cast<int *>(buffer);
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}
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}
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@@ -52,7 +52,8 @@ struct l2flush
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{
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if (m_l2_size > 0)
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{
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NVBENCH_CUDA_CALL(cudaMemsetAsync(m_l2_buffer, 0, m_l2_size, stream));
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NVBENCH_CUDA_CALL(
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cudaMemsetAsync(m_l2_buffer, 0, static_cast<std::size_t>(m_l2_size), stream));
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}
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}
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@@ -34,6 +34,15 @@ namespace nvbench::detail
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template <typename T>
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struct ring_buffer
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{
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private:
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using buffer_t = typename std::vector<T>;
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using diff_t = typename buffer_t::difference_type;
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buffer_t m_buffer;
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std::size_t m_index{0};
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bool m_full{false};
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public:
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/**
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* Create a new ring buffer with the requested capacity.
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*/
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@@ -49,9 +58,9 @@ struct ring_buffer
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[[nodiscard]] auto begin() { return m_buffer.begin(); }
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[[nodiscard]] auto begin() const { return m_buffer.begin(); }
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[[nodiscard]] auto cbegin() const { return m_buffer.cbegin(); }
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[[nodiscard]] auto end() { return m_buffer.begin() + this->size(); }
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[[nodiscard]] auto end() const { return m_buffer.begin() + this->size(); }
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[[nodiscard]] auto cend() const { return m_buffer.cbegin() + this->size(); }
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[[nodiscard]] auto end() { return m_buffer.begin() + static_cast<diff_t>(this->size()); }
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[[nodiscard]] auto end() const { return m_buffer.begin() + static_cast<diff_t>(this->size()); }
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[[nodiscard]] auto cend() const { return m_buffer.cbegin() + static_cast<diff_t>(this->size()); }
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// clang-format on
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/** @} */
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@@ -113,11 +122,6 @@ struct ring_buffer
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return m_buffer[back_index];
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}
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/**@}*/
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private:
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std::vector<T> m_buffer;
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std::size_t m_index{0};
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bool m_full{false};
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};
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} // namespace nvbench::detail
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@@ -154,7 +154,7 @@ struct device_info
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[[nodiscard]] std::size_t get_global_memory_bus_bandwidth() const
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{ // 2 is for DDR, CHAR_BITS to convert bus_width to bytes.
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return 2 * this->get_global_memory_bus_peak_clock_rate() *
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(this->get_global_memory_bus_width() / CHAR_BIT);
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static_cast<std::size_t>(this->get_global_memory_bus_width() / CHAR_BIT);
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}
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/// @return The size of the L2 cache in bytes.
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@@ -16,12 +16,12 @@
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* limitations under the License.
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*/
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#include <nvbench/device_manager.cuh>
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#include <cuda_runtime_api.h>
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#include <nvbench/cuda_call.cuh>
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#include <nvbench/detail/device_scope.cuh>
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#include <cuda_runtime_api.h>
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#include <nvbench/detail/throw.cuh>
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#include <nvbench/device_manager.cuh>
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namespace nvbench
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{
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@@ -44,4 +44,13 @@ device_manager::device_manager()
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}
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}
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const nvbench::device_info &device_manager::get_device(int id)
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{
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if (id < 0)
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{
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NVBENCH_THROW(std::runtime_error, "Negative index: {}.", id);
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}
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return m_devices.at(static_cast<std::size_t>(id));
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}
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} // namespace nvbench
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@@ -54,7 +54,7 @@ struct device_manager
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/**
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* @return The device_info object corresponding to `id`.
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*/
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[[nodiscard]] const nvbench::device_info &get_device(int id) { return m_devices.at(id); }
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[[nodiscard]] const nvbench::device_info &get_device(int id);
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/**
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* @return A vector containing device_info objects for all detected CUDA
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@@ -69,13 +69,16 @@ struct int64_axis final : public axis_base
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int64_axis_flags get_flags() const { return m_flags; }
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// Helper functions for pow2 conversions:
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static nvbench::int64_t compute_pow2(nvbench::int64_t exponent) { return 1ll << exponent; }
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static nvbench::int64_t compute_pow2(nvbench::int64_t exponent)
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{
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return nvbench::int64_t{1} << exponent;
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}
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// UB if value < 0.
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static nvbench::int64_t compute_log2(nvbench::int64_t value)
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{
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// TODO use <bit> functions in C++20?
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nvbench::uint64_t bits = static_cast<nvbench::int64_t>(value);
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nvbench::uint64_t bits = static_cast<nvbench::uint64_t>(value);
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nvbench::int64_t exponent = 0;
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while ((bits >>= 1) != 0ull)
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{
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@@ -43,9 +43,9 @@ struct launch
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// move-only
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launch(const launch &) = delete;
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launch(launch &&) = default;
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launch(launch &&) = delete;
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launch &operator=(const launch &) = delete;
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launch &operator=(launch &&) = default;
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launch &operator=(launch &&) = delete;
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/**
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* @return a CUDA stream that all kernels and other stream-ordered CUDA work
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@@ -365,7 +365,7 @@ void option_parser::parse_range(option_parser::arg_iterator_t first,
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}
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auto check_params = [&first, &last](std::size_t num_params) {
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const std::size_t rem_args = std::distance(first, last) - 1;
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const std::size_t rem_args = static_cast<std::size_t>(std::distance(first, last) - 1);
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if (rem_args < num_params)
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{
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NVBENCH_THROW(std::runtime_error,
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@@ -444,7 +444,7 @@ void option_parser::parse_range(option_parser::arg_iterator_t first,
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this->disable_blocking_kernel();
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first += 1;
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}
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else if (arg == "--quiet" | arg == "-q")
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else if (arg == "--quiet" || arg == "-q")
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{
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// Setting this flag prevents the default stdout printer from being
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// added.
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@@ -726,7 +726,7 @@ try
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catch (std::invalid_argument &)
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{}
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m_benchmarks.push_back(idx >= 0 ? mgr.get_benchmark(idx).clone()
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m_benchmarks.push_back(idx >= 0 ? mgr.get_benchmark(static_cast<std::size_t>(idx)).clone()
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: mgr.get_benchmark(name).clone());
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// Initialize the new benchmark with any global arguments:
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@@ -78,9 +78,9 @@ struct printer_base
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// move-only
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printer_base(const printer_base &) = delete;
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printer_base(printer_base &&) = default;
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printer_base(printer_base &&) = delete;
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printer_base &operator=(const printer_base &) = delete;
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printer_base &operator=(printer_base &&) = default;
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printer_base &operator=(printer_base &&) = delete;
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/*!
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* Called once with the command line arguments used to invoke the current
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@@ -67,7 +67,7 @@ std::size_t type_axis::get_type_index(const std::string &input_string) const
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m_input_strings);
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}
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return it - m_input_strings.cbegin();
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return static_cast<std::size_t>(it - m_input_strings.cbegin());
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}
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} // namespace nvbench
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