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https://github.com/NVIDIA/open-gpu-kernel-modules.git
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525.116.03
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@@ -1,5 +1,5 @@
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/*
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* SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
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* SPDX-License-Identifier: MIT
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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@@ -1103,6 +1103,18 @@ nvswitch_link_disable_interrupts_ls10
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instance = link / NVSWITCH_LINKS_PER_NVLIPT_LS10;
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localLinkIdx = link % NVSWITCH_LINKS_PER_NVLIPT_LS10;
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if (nvswitch_is_soe_supported(device))
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{
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nvswitch_soe_set_nport_interrupts_ls10(device, link, NV_FALSE);
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}
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else
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{
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NVSWITCH_NPORT_WR32_LS10(device, link, _NPORT, _ERR_CONTROL_COMMON_NPORT,
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DRF_NUM(_NPORT, _ERR_CONTROL_COMMON_NPORT, _CORRECTABLEENABLE, 0x0) |
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DRF_NUM(_NPORT, _ERR_CONTROL_COMMON_NPORT, _FATALENABLE, 0x0) |
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DRF_NUM(_NPORT, _ERR_CONTROL_COMMON_NPORT, _NONFATALENABLE, 0x0));
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}
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NVSWITCH_ENG_WR32(device, NVLW, , instance, _NVLW, _LINK_INTR_0_MASK(localLinkIdx),
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DRF_NUM(_NVLW, _LINK_INTR_0_MASK, _FATAL, 0x0) |
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DRF_NUM(_NVLW, _LINK_INTR_0_MASK, _NONFATAL, 0x0) |
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@@ -1133,6 +1145,18 @@ _nvswitch_link_reset_interrupts_ls10
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NvU32 eng_instance = link / NVSWITCH_LINKS_PER_NVLIPT_LS10;
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NvU32 localLinkNum = link % NVSWITCH_LINKS_PER_NVLIPT_LS10;
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if (nvswitch_is_soe_supported(device))
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{
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nvswitch_soe_set_nport_interrupts_ls10(device, link, NV_TRUE);
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}
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else
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{
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NVSWITCH_NPORT_WR32_LS10(device, link, _NPORT, _ERR_CONTROL_COMMON_NPORT,
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DRF_NUM(_NPORT, _ERR_CONTROL_COMMON_NPORT, _CORRECTABLEENABLE, 0x1) |
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DRF_NUM(_NPORT, _ERR_CONTROL_COMMON_NPORT, _FATALENABLE, 0x1) |
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DRF_NUM(_NPORT, _ERR_CONTROL_COMMON_NPORT, _NONFATALENABLE, 0x1));
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}
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NVSWITCH_ENG_WR32(device, NVLW, , eng_instance, _NVLW, _LINK_INTR_0_MASK(localLinkNum),
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DRF_NUM(_NVLW, _LINK_INTR_0_MASK, _FATAL, 0x1) |
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DRF_NUM(_NVLW, _LINK_INTR_0_MASK, _NONFATAL, 0x0) |
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@@ -1477,7 +1501,7 @@ nvswitch_reset_and_drain_links_ls10
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// DEBUG_CLEAR (0x144) register
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// - Assert NPortWarmReset[i] using the WARMRESET (0x140) register
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//
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// nvswitch_soe_issue_nport_reset_ls10(device, link);
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nvswitch_soe_issue_nport_reset_ls10(device, link);
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//
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// Step 5.0 : Issue Minion request to perform the link reset sequence
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@@ -1555,7 +1579,7 @@ nvswitch_reset_and_drain_links_ls10
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// - Assert NPORT INITIALIZATION and program the state tracking RAMS
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// - Restore NPORT state after reset
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//
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// nvswitch_soe_restore_nport_state_ls10(device, link);
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nvswitch_soe_restore_nport_state_ls10(device, link);
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// Step 7.0 : Re-program the routing table for DBEs
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@@ -2715,6 +2739,46 @@ nvswitch_get_num_links_ls10
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return NVSWITCH_NUM_LINKS_LS10;
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}
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NvlStatus
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nvswitch_ctrl_get_fom_values_ls10
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(
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nvswitch_device *device,
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NVSWITCH_GET_FOM_VALUES_PARAMS *p
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)
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{
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NvlStatus status;
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NvU32 statData;
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nvlink_link *link;
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link = nvswitch_get_link(device, p->linkId);
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if (link == NULL)
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{
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NVSWITCH_PRINT(device, ERROR, "%s: link #%d invalid\n",
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__FUNCTION__, p->linkId);
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return -NVL_BAD_ARGS;
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}
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if (nvswitch_is_link_in_reset(device, link))
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{
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NVSWITCH_PRINT(device, ERROR, "%s: link #%d is in reset\n",
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__FUNCTION__, p->linkId);
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return -NVL_ERR_INVALID_STATE;
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}
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status = nvswitch_minion_get_dl_status(device, p->linkId,
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NV_NVLSTAT_TR16, 0, &statData);
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p->figureOfMeritValues[0] = (NvU16) (statData & 0xFFFF);
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p->figureOfMeritValues[1] = (NvU16) ((statData >> 16) & 0xFFFF);
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status = nvswitch_minion_get_dl_status(device, p->linkId,
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NV_NVLSTAT_TR17, 0, &statData);
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p->figureOfMeritValues[2] = (NvU16) (statData & 0xFFFF);
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p->figureOfMeritValues[3] = (NvU16) ((statData >> 16) & 0xFFFF);
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p->numLanes = nvswitch_get_sublink_width(device, p->linkId);
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return status;
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}
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void
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nvswitch_set_fatal_error_ls10
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@@ -5406,7 +5470,7 @@ nvswitch_ctrl_get_board_part_number_ls10
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if (!pInforom->OBD.bValid)
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{
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NVSWITCH_PRINT(device, ERROR, "OBD data is not available\n");
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return -NVL_ERR_GENERIC;
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return -NVL_ERR_NOT_SUPPORTED;
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}
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pOBDObj = &pInforom->OBD.object.v2;
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