525.147.05

525.125.06
525.116.04
2026-01-28 03:59:48 +00:00 · 2023-10-31 14:38:27 +01:00 · 2023-06-28 11:59:51 -07:00 · 2023-05-09 11:41:15 -07:00 · 2023-04-25 14:05:57 -07:00 · 2023-03-30 10:16:11 -07:00
416 changed files with 26381 additions and 9032 deletions
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -2,10 +2,40 @@

 ## Release 525 Entries

+### [525.147.05] 2023-10-31
+
+### [525.125.06] 2023-06-26
+
+#### Fixed
+
+- Fix nvidia_p2p_get_pages(): Fix double-free in register-callback error path, [#557](https://github.com/NVIDIA/open-gpu-kernel-modules/pull/557) by @BrendanCunningham
+
+### [525.116.04] 2023-05-09
+
+### [525.116.03] 2023-04-25
+
+### [525.105.17] 2023-03-30
+
+### [525.89.02] 2023-02-08
+
+### [525.85.12] 2023-01-30
+
+### [525.85.05] 2023-01-19
+
+#### Fixed
+
+- Fix build problems with Clang 15.0, [#377](https://github.com/NVIDIA/open-gpu-kernel-modules/issues/377) by @ptr1337
+
+### [525.78.01] 2023-01-05
+
 ### [525.60.13] 2022-12-05

 ### [525.60.11] 2022-11-28

+#### Fixed
+
+- Fixed nvenc compatibility with usermode clients [#104](https://github.com/NVIDIA/open-gpu-kernel-modules/issues/104)
+
 ### [525.53] 2022-11-10

 #### Changed
--- a/README.md
+++ b/README.md
@@ -1,7 +1,7 @@
 # NVIDIA Linux Open GPU Kernel Module Source

 This is the source release of the NVIDIA Linux open GPU kernel modules,
-version 525.60.13.
+version 525.147.05.


 ## How to Build
@@ -17,7 +17,7 @@ as root:

 Note that the kernel modules built here must be used with GSP
 firmware and user-space NVIDIA GPU driver components from a corresponding
-525.60.13 driver release.  This can be achieved by installing
+525.147.05 driver release.  This can be achieved by installing
 the NVIDIA GPU driver from the .run file using the `--no-kernel-modules`
 option.  E.g.,

@@ -167,7 +167,7 @@ for the target kernel.
 ## Compatible GPUs

 The open-gpu-kernel-modules can be used on any Turing or later GPU
-(see the table below). However, in the 525.60.13 release,
+(see the table below). However, in the 525.147.05 release,
 GeForce and Workstation support is still considered alpha-quality.

 To enable use of the open kernel modules on GeForce and Workstation GPUs,
@@ -175,7 +175,7 @@ set the "NVreg_OpenRmEnableUnsupportedGpus" nvidia.ko kernel module
 parameter to 1. For more details, see the NVIDIA GPU driver end user
 README here:

-https://us.download.nvidia.com/XFree86/Linux-x86_64/525.60.13/README/kernel_open.html
+https://us.download.nvidia.com/XFree86/Linux-x86_64/525.147.05/README/kernel_open.html

 In the below table, if three IDs are listed, the first is the PCI Device 
 ID, the second is the PCI Subsystem Vendor ID, and the third is the PCI
@@ -645,12 +645,15 @@ Subsystem Device ID.
 | NVIDIA A100-SXM4-80GB                           | 20B2 10DE 147F |
 | NVIDIA A100-SXM4-80GB                           | 20B2 10DE 1622 |
 | NVIDIA A100-SXM4-80GB                           | 20B2 10DE 1623 |
-| NVIDIA PG506-242                                | 20B3 10DE 14A7 |
-| NVIDIA PG506-243                                | 20B3 10DE 14A8 |
+| NVIDIA PG509-210                                | 20B2 10DE 1625 |
+| NVIDIA A100-SXM-64GB                            | 20B3 10DE 14A7 |
+| NVIDIA A100-SXM-64GB                            | 20B3 10DE 14A8 |
 | NVIDIA A100 80GB PCIe                           | 20B5 10DE 1533 |
 | NVIDIA A100 80GB PCIe                           | 20B5 10DE 1642 |
 | NVIDIA PG506-232                                | 20B6 10DE 1492 |
 | NVIDIA A30                                      | 20B7 10DE 1532 |
+| NVIDIA A30                                      | 20B7 10DE 1804 |
+| NVIDIA A30                                      | 20B7 10DE 1852 |
 | NVIDIA A100-PCIE-40GB                           | 20F1 10DE 145F |
 | NVIDIA A800-SXM4-80GB                           | 20F3 10DE 179B |
 | NVIDIA A800-SXM4-80GB                           | 20F3 10DE 179C |
@@ -720,7 +723,13 @@ Subsystem Device ID.
 | NVIDIA A10                                      | 2236 10DE 1482 |
 | NVIDIA A10G                                     | 2237 10DE 152F |
 | NVIDIA A10M                                     | 2238 10DE 1677 |
+| NVIDIA H800 PCIe                                | 2322 10DE 17A4 |
+| NVIDIA H800                                     | 2324 10DE 17A6 |
+| NVIDIA H800                                     | 2324 10DE 17A8 |
+| NVIDIA H100 80GB HBM3                           | 2330 10DE 16C0 |
+| NVIDIA H100 80GB HBM3                           | 2330 10DE 16C1 |
 | NVIDIA H100 PCIe                                | 2331 10DE 1626 |
+| NVIDIA H100                                     | 2339 10DE 17FC |
 | NVIDIA GeForce RTX 3060 Ti                      | 2414           |
 | NVIDIA GeForce RTX 3080 Ti Laptop GPU           | 2420           |
 | NVIDIA RTX A5500 Laptop GPU                     | 2438           |
@@ -748,6 +757,7 @@ Subsystem Device ID.
 | NVIDIA RTX A3000 12GB Laptop GPU                | 24B9           |
 | NVIDIA RTX A4500 Laptop GPU                     | 24BA           |
 | NVIDIA RTX A3000 12GB Laptop GPU                | 24BB           |
+| NVIDIA GeForce RTX 3060                         | 24C7           |
 | NVIDIA GeForce RTX 3060 Ti                      | 24C9           |
 | NVIDIA GeForce RTX 3080 Laptop GPU              | 24DC           |
 | NVIDIA GeForce RTX 3070 Laptop GPU              | 24DD           |
@@ -771,6 +781,7 @@ Subsystem Device ID.
 | NVIDIA RTX A2000 12GB                           | 2571 103C 1611 |
 | NVIDIA RTX A2000 12GB                           | 2571 10DE 1611 |
 | NVIDIA RTX A2000 12GB                           | 2571 17AA 1611 |
+| NVIDIA GeForce RTX 3050                         | 2582           |
 | NVIDIA GeForce RTX 3050 Ti Laptop GPU           | 25A0           |
 | NVIDIA GeForce RTX 3050Ti Laptop GPU            | 25A0 103C 8928 |
 | NVIDIA GeForce RTX 3050Ti Laptop GPU            | 25A0 103C 89F9 |
@@ -783,15 +794,58 @@ Subsystem Device ID.
 | NVIDIA GeForce RTX 2050                         | 25A7           |
 | NVIDIA GeForce RTX 2050                         | 25A9           |
 | NVIDIA GeForce MX570 A                          | 25AA           |
+| NVIDIA GeForce RTX 3050 4GB Laptop GPU          | 25AB           |
+| NVIDIA GeForce RTX 3050 6GB Laptop GPU          | 25AC           |
+| NVIDIA GeForce RTX 2050                         | 25AD           |
 | NVIDIA A16                                      | 25B6 10DE 14A9 |
 | NVIDIA A2                                       | 25B6 10DE 157E |
 | NVIDIA RTX A2000 Laptop GPU                     | 25B8           |
 | NVIDIA RTX A1000 Laptop GPU                     | 25B9           |
 | NVIDIA RTX A2000 8GB Laptop GPU                 | 25BA           |
 | NVIDIA RTX A500 Laptop GPU                      | 25BB           |
+| NVIDIA RTX A1000 6GB Laptop GPU                 | 25BC           |
+| NVIDIA RTX A500 Laptop GPU                      | 25BD           |
 | NVIDIA GeForce RTX 3050 Ti Laptop GPU           | 25E0           |
 | NVIDIA GeForce RTX 3050 Laptop GPU              | 25E2           |
 | NVIDIA GeForce RTX 3050 Laptop GPU              | 25E5           |
+| NVIDIA GeForce RTX 3050 6GB Laptop GPU          | 25EC           |
+| NVIDIA GeForce RTX 2050                         | 25ED           |
 | NVIDIA RTX A1000 Embedded GPU                   | 25F9           |
 | NVIDIA RTX A2000 Embedded GPU                   | 25FA           |
 | NVIDIA RTX A500 Embedded GPU                    | 25FB           |
+| NVIDIA GeForce RTX 4090                         | 2684           |
+| NVIDIA RTX 6000 Ada Generation                  | 26B1 1028 16A1 |
+| NVIDIA RTX 6000 Ada Generation                  | 26B1 103C 16A1 |
+| NVIDIA RTX 6000 Ada Generation                  | 26B1 10DE 16A1 |
+| NVIDIA RTX 6000 Ada Generation                  | 26B1 17AA 16A1 |
+| NVIDIA L40                                      | 26B5 10DE 169D |
+| NVIDIA L40                                      | 26B5 10DE 17DA |
+| NVIDIA GeForce RTX 4080                         | 2704           |
+| NVIDIA GeForce RTX 4090 Laptop GPU              | 2717           |
+| NVIDIA RTX 5000 Ada Generation Laptop GPU       | 2730           |
+| NVIDIA GeForce RTX 4090 Laptop GPU              | 2757           |
+| NVIDIA RTX 5000 Ada Generation Embedded GPU     | 2770           |
+| NVIDIA GeForce RTX 4070 Ti                      | 2782           |
+| NVIDIA GeForce RTX 4070                         | 2786           |
+| NVIDIA GeForce RTX 4080 Laptop GPU              | 27A0           |
+| NVIDIA RTX 4000 SFF Ada Generation              | 27B0 1028 16FA |
+| NVIDIA RTX 4000 SFF Ada Generation              | 27B0 103C 16FA |
+| NVIDIA RTX 4000 SFF Ada Generation              | 27B0 10DE 16FA |
+| NVIDIA RTX 4000 SFF Ada Generation              | 27B0 17AA 16FA |
+| NVIDIA L4                                       | 27B8 10DE 16CA |
+| NVIDIA L4                                       | 27B8 10DE 16EE |
+| NVIDIA RTX 4000 Ada Generation Laptop GPU       | 27BA           |
+| NVIDIA RTX 3500 Ada Generation Laptop GPU       | 27BB           |
+| NVIDIA GeForce RTX 4080 Laptop GPU              | 27E0           |
+| NVIDIA GeForce RTX 4060 Ti                      | 2803           |
+| NVIDIA GeForce RTX 4060 Ti                      | 2805           |
+| NVIDIA GeForce RTX 4070 Laptop GPU              | 2820           |
+| NVIDIA RTX 3000 Ada Generation Laptop GPU       | 2838           |
+| NVIDIA GeForce RTX 4070 Laptop GPU              | 2860           |
+| NVIDIA GeForce RTX 4060                         | 2882           |
+| NVIDIA GeForce RTX 4060 Laptop GPU              | 28A0           |
+| NVIDIA GeForce RTX 4050 Laptop GPU              | 28A1           |
+| NVIDIA RTX 2000 Ada Generation Laptop GPU       | 28B8           |
+| NVIDIA GeForce RTX 4060 Laptop GPU              | 28E0           |
+| NVIDIA GeForce RTX 4050 Laptop GPU              | 28E1           |
+| NVIDIA RTX 2000 Ada Generation Embedded GPU     | 28F8           |
--- a/kernel-open/Kbuild
+++ b/kernel-open/Kbuild
@@ -72,7 +72,7 @@ EXTRA_CFLAGS += -I$(src)/common/inc
 EXTRA_CFLAGS += -I$(src)
 EXTRA_CFLAGS += -Wall -MD $(DEFINES) $(INCLUDES) -Wno-cast-qual -Wno-error -Wno-format-extra-args
 EXTRA_CFLAGS += -D__KERNEL__ -DMODULE -DNVRM
-EXTRA_CFLAGS += -DNV_VERSION_STRING=\"525.60.13\"
+EXTRA_CFLAGS += -DNV_VERSION_STRING=\"525.147.05\"

 EXTRA_CFLAGS += -Wno-unused-function

@@ -268,6 +268,7 @@ NV_HEADER_PRESENCE_TESTS = \
 asm/opal-api.h \
 sound/hdaudio.h \
 asm/pgtable_types.h \
+ asm/page.h \
 linux/stringhash.h \
 linux/dma-map-ops.h \
 rdma/peer_mem.h \
--- a/kernel-open/common/inc/nv-hypervisor.h
+++ b/kernel-open/common/inc/nv-hypervisor.h
@@ -57,6 +57,7 @@ typedef struct
    void  *waitQueue;
    void  *nv;
    NvU32 *vgpuTypeIds;
+    NvU8 **vgpuNames;
    NvU32  numVgpuTypes;
    NvU32  domain;
    NvU8   bus;
--- a/kernel-open/common/inc/nv-mm.h
+++ b/kernel-open/common/inc/nv-mm.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2016-2017 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2016-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -36,12 +36,21 @@ typedef int vm_fault_t;
 * pin_user_pages() was added by commit eddb1c228f7951d399240
 * ("mm/gup: introduce pin_user_pages*() and FOLL_PIN") in v5.6-rc1 (2020-01-30)
 *
+ * Removed vmas parameter from pin_user_pages() by commit 40896a02751
+ * ("mm/gup: remove vmas parameter from pin_user_pages()")
+ * in linux-next, expected in v6.5-rc1 (2023-05-17)
+ *
 */

 #include <linux/mm.h>
 #include <linux/sched.h>
 #if defined(NV_PIN_USER_PAGES_PRESENT)
-    #define NV_PIN_USER_PAGES pin_user_pages
+    #if defined(NV_PIN_USER_PAGES_HAS_ARGS_VMAS)
+        #define NV_PIN_USER_PAGES pin_user_pages
+    #else
+        #define NV_PIN_USER_PAGES(start, nr_pages, gup_flags, pages, vmas) \
+            pin_user_pages(start, nr_pages, gup_flags, pages)
+    #endif // NV_PIN_USER_PAGES_HAS_ARGS_VMAS
    #define NV_UNPIN_USER_PAGE unpin_user_page
 #else
    #define NV_PIN_USER_PAGES NV_GET_USER_PAGES
@@ -64,11 +73,18 @@ typedef int vm_fault_t;
 * commit 8e50b8b07f462ab4b91bc1491b1c91bd75e4ad40 which cherry-picked the
 * replacement of the write and force parameters with gup_flags
 *
+ * Removed vmas parameter from get_user_pages() by commit 7bbf9c8c99
+ * ("mm/gup: remove unused vmas parameter from get_user_pages()")
+ * in linux-next, expected in v6.5-rc1 (2023-05-17)
+ *
 */

 #if defined(NV_GET_USER_PAGES_HAS_ARGS_FLAGS)
+    #define NV_GET_USER_PAGES(start, nr_pages, flags, pages, vmas) \
+        get_user_pages(start, nr_pages, flags, pages)
+#elif defined(NV_GET_USER_PAGES_HAS_ARGS_FLAGS_VMAS)
    #define NV_GET_USER_PAGES get_user_pages
-#elif defined(NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS)
+#elif defined(NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS_VMAS)
    #define NV_GET_USER_PAGES(start, nr_pages, flags, pages, vmas) \
        get_user_pages(current, current->mm, start, nr_pages, flags, pages, vmas)
 #else
@@ -81,13 +97,13 @@ typedef int vm_fault_t;
        int write = flags & FOLL_WRITE;
        int force = flags & FOLL_FORCE;

-    #if defined(NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE)
+    #if defined(NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE_VMAS)
        return get_user_pages(start, nr_pages, write, force, pages, vmas);
    #else
-        // NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE
+        // NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE_VMAS
        return get_user_pages(current, current->mm, start, nr_pages, write,
                              force, pages, vmas);
-    #endif // NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE
+    #endif // NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE_VMAS
    }
 #endif // NV_GET_USER_PAGES_HAS_ARGS_FLAGS

@@ -100,15 +116,22 @@ typedef int vm_fault_t;
 * 64019a2e467a ("mm/gup: remove task_struct pointer for  all gup code")
 * in v5.9-rc1 (2020-08-11). *
 *
+ * Removed unused vmas parameter from pin_user_pages_remote() by commit
+ * 83bcc2e132("mm/gup: remove unused vmas parameter from pin_user_pages_remote()")
+ * in linux-next, expected in v6.5-rc1 (2023-05-14)
+ *
 */

 #if defined(NV_PIN_USER_PAGES_REMOTE_PRESENT)
-    #if defined (NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK)
+    #if defined(NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK_VMAS)
        #define NV_PIN_USER_PAGES_REMOTE(mm, start, nr_pages, flags, pages, vmas, locked) \
            pin_user_pages_remote(NULL, mm, start, nr_pages, flags, pages, vmas, locked)
-    #else
+    #elif defined(NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_VMAS)
        #define NV_PIN_USER_PAGES_REMOTE pin_user_pages_remote
-    #endif // NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK
+    #else
+        #define NV_PIN_USER_PAGES_REMOTE(mm, start, nr_pages, flags, pages, vmas, locked) \
+            pin_user_pages_remote(mm, start, nr_pages, flags, pages, locked)
+    #endif // NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK_VMAS
 #else
    #define NV_PIN_USER_PAGES_REMOTE NV_GET_USER_PAGES_REMOTE
 #endif // NV_PIN_USER_PAGES_REMOTE_PRESENT
@@ -135,22 +158,30 @@ typedef int vm_fault_t;
 * commit 64019a2e467a ("mm/gup: remove task_struct pointer for
 * all gup code") in v5.9-rc1 (2020-08-11).
 *
+ * Removed vmas parameter from get_user_pages_remote() by commit a4bde14d549 
+ * ("mm/gup: remove vmas parameter from get_user_pages_remote()")
+ * in linux-next, expected in v6.5-rc1 (2023-05-14)
+ *
 */

 #if defined(NV_GET_USER_PAGES_REMOTE_PRESENT)
    #if defined(NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED)
+        #define NV_GET_USER_PAGES_REMOTE(mm, start, nr_pages, flags, pages, vmas, locked) \
+            get_user_pages_remote(mm, start, nr_pages, flags, pages, locked)
+
+    #elif defined(NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED_VMAS)
        #define NV_GET_USER_PAGES_REMOTE get_user_pages_remote

-    #elif defined(NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED)
+    #elif defined(NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED_VMAS)
        #define NV_GET_USER_PAGES_REMOTE(mm, start, nr_pages, flags, pages, vmas, locked) \
            get_user_pages_remote(NULL, mm, start, nr_pages, flags, pages, vmas, locked)

-    #elif defined(NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS)
+    #elif defined(NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_VMAS)
        #define NV_GET_USER_PAGES_REMOTE(mm, start, nr_pages, flags, pages, vmas, locked) \
            get_user_pages_remote(NULL, mm, start, nr_pages, flags, pages, vmas)

    #else
-        // NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE
+        // NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE_VMAS
        static inline long NV_GET_USER_PAGES_REMOTE(struct mm_struct *mm,
                                                    unsigned long start,
                                                    unsigned long nr_pages,
@@ -167,7 +198,7 @@ typedef int vm_fault_t;
        }
    #endif // NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED
 #else
-    #if defined(NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE)
+    #if defined(NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE_VMAS)
        static inline long NV_GET_USER_PAGES_REMOTE(struct mm_struct *mm,
                                                    unsigned long start,
                                                    unsigned long nr_pages,
@@ -185,7 +216,7 @@ typedef int vm_fault_t;
    #else
        #define NV_GET_USER_PAGES_REMOTE(mm, start, nr_pages, flags, pages, vmas, locked) \
            get_user_pages(NULL, mm, start, nr_pages, flags, pages, vmas)
-    #endif // NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE
+    #endif // NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE_VMAS
 #endif // NV_GET_USER_PAGES_REMOTE_PRESENT

 /*
@@ -261,4 +292,22 @@ static inline struct rw_semaphore *nv_mmap_get_lock(struct mm_struct *mm)
 #endif
 }

+static inline void nv_vm_flags_set(struct vm_area_struct *vma, vm_flags_t flags)
+{
+#if defined(NV_VM_AREA_STRUCT_HAS_CONST_VM_FLAGS)
+    vm_flags_set(vma, flags);
+#else
+    vma->vm_flags |= flags;
+#endif
+}
+
+static inline void nv_vm_flags_clear(struct vm_area_struct *vma, vm_flags_t flags)
+{
+#if defined(NV_VM_AREA_STRUCT_HAS_CONST_VM_FLAGS)
+    vm_flags_clear(vma, flags);
+#else
+    vma->vm_flags &= ~flags;
+#endif
+}
+
 #endif // __NV_MM_H__
--- a/kernel-open/common/inc/nv.h
+++ b/kernel-open/common/inc/nv.h
@@ -495,6 +495,12 @@ struct nv_file_private_t
    nv_file_private_t *ctl_nvfp;
    void *ctl_nvfp_priv;
    NvU32 register_or_refcount;
+
+    //
+    // True if a client or an event was ever allocated on this fd.
+    // If false, RMAPI cleanup is skipped.
+    //
+    NvBool bCleanupRmapi;
 };

 // Forward define the gpu ops structures
@@ -915,6 +921,7 @@ NV_STATUS  NV_API_CALL  rm_write_registry_string (nvidia_stack_t *, nv_state_t *
 void       NV_API_CALL  rm_parse_option_string   (nvidia_stack_t *, const char *);
 char*      NV_API_CALL  rm_remove_spaces         (const char *);
 char*      NV_API_CALL  rm_string_token          (char **, const char);
+void       NV_API_CALL  rm_vgpu_vfio_set_driver_vm(nvidia_stack_t *, NvBool);

 NV_STATUS  NV_API_CALL  rm_run_rc_callback       (nvidia_stack_t *, nv_state_t *);
 void       NV_API_CALL  rm_execute_work_item     (nvidia_stack_t *, void *);
@@ -958,7 +965,6 @@ NV_STATUS  NV_API_CALL  rm_log_gpu_crash          (nv_stack_t *, nv_state_t *);
 void       NV_API_CALL rm_kernel_rmapi_op(nvidia_stack_t *sp, void *ops_cmd);
 NvBool     NV_API_CALL rm_get_device_remove_flag(nvidia_stack_t *sp, NvU32 gpu_id);
 NV_STATUS  NV_API_CALL rm_gpu_copy_mmu_faults(nvidia_stack_t *, nv_state_t *, NvU32 *);
-NV_STATUS  NV_API_CALL rm_gpu_copy_mmu_faults_unlocked(nvidia_stack_t *, nv_state_t *, NvU32 *);
 NV_STATUS  NV_API_CALL rm_gpu_handle_mmu_faults(nvidia_stack_t *, nv_state_t *, NvU32 *);
 NvBool     NV_API_CALL rm_gpu_need_4k_page_isolation(nv_state_t *);
 NvBool     NV_API_CALL rm_is_chipset_io_coherent(nv_stack_t *);
@@ -989,7 +995,7 @@ void       NV_API_CALL rm_acpi_notify(nvidia_stack_t *, nv_state_t *, NvU32);
 NvBool     NV_API_CALL rm_is_altstack_in_use(void);

 /* vGPU VFIO specific functions */
-NV_STATUS  NV_API_CALL  nv_vgpu_create_request(nvidia_stack_t *, nv_state_t *, const NvU8 *, NvU32, NvU16 *, NvU32, NvBool *);
+NV_STATUS  NV_API_CALL  nv_vgpu_create_request(nvidia_stack_t *, nv_state_t *, const NvU8 *, NvU32, NvU16 *, NvU32);
 NV_STATUS  NV_API_CALL  nv_vgpu_delete(nvidia_stack_t *, const NvU8 *, NvU16);
 NV_STATUS  NV_API_CALL  nv_vgpu_get_type_ids(nvidia_stack_t *, nv_state_t *, NvU32 *, NvU32 *, NvBool, NvU8, NvBool);
 NV_STATUS  NV_API_CALL  nv_vgpu_get_type_info(nvidia_stack_t *, nv_state_t *, NvU32, char *, int, NvU8);
--- a/kernel-open/conftest.sh
+++ b/kernel-open/conftest.sh
@@ -101,7 +101,8 @@ test_header_presence() {
 build_cflags() {
    BASE_CFLAGS="-O2 -D__KERNEL__ \
 -DKBUILD_BASENAME=\"#conftest$$\" -DKBUILD_MODNAME=\"#conftest$$\" \
-nostdinc -isystem $ISYSTEM"
+-nostdinc -isystem $ISYSTEM \
+-Wno-implicit-function-declaration -Wno-strict-prototypes"

    if [ "$OUTPUT" != "$SOURCES" ]; then
        OUTPUT_CFLAGS="-I$OUTPUT/include2 -I$OUTPUT/include"
@@ -449,6 +450,9 @@ compile_test() {
            #if defined(NV_ASM_PGTABLE_TYPES_H_PRESENT)
            #include <asm/pgtable_types.h>
            #endif
+            #if defined(NV_ASM_PAGE_H_PRESENT)
+            #include <asm/page.h>
+            #endif
            #include <asm/set_memory.h>
            #else
            #include <asm/cacheflush.h>
@@ -471,6 +475,9 @@ compile_test() {
            #if defined(NV_ASM_PGTABLE_TYPES_H_PRESENT)
            #include <asm/pgtable_types.h>
            #endif
+            #if defined(NV_ASM_PAGE_H_PRESENT)
+            #include <asm/page.h>
+            #endif
            #include <asm/set_memory.h>
            #else
            #include <asm/cacheflush.h>
@@ -528,6 +535,9 @@ compile_test() {
            #if defined(NV_ASM_PGTABLE_TYPES_H_PRESENT)
            #include <asm/pgtable_types.h>
            #endif
+            #if defined(NV_ASM_PAGE_H_PRESENT)
+            #include <asm/page.h>
+            #endif
            #include <asm/set_memory.h>
            #else
            #include <asm/cacheflush.h>
@@ -555,6 +565,9 @@ compile_test() {
            #if defined(NV_ASM_PGTABLE_TYPES_H_PRESENT)
            #include <asm/pgtable_types.h>
            #endif
+            #if defined(NV_ASM_PAGE_H_PRESENT)
+            #include <asm/page.h>
+            #endif
            #include <asm/set_memory.h>
            #else
            #include <asm/cacheflush.h>
@@ -941,9 +954,26 @@ compile_test() {
            compile_check_conftest "$CODE" "NV_VFIO_MIGRATION_OPS_PRESENT" "" "types"
        ;;

-        mdev_parent)
+        vfio_migration_ops_has_migration_get_data_size)
            #
-            # Determine if the struct mdev_parent type is present.
+            # Determine if vfio_migration_ops struct has .migration_get_data_size field.
+            #
+            # Added by commit in 4e016f969529f ("vfio: Add an option to get migration 
+            # data size") in v6.2 kernel.
+            #
+            CODE="
+            #include <linux/pci.h>
+            #include <linux/vfio.h>
+            int conftest_mdev_vfio_migration_ops_has_migration_get_data_size(void) {
+                return offsetof(struct vfio_migration_ops, migration_get_data_size);
+            }"
+
+            compile_check_conftest "$CODE" "NV_VFIO_MIGRATION_OPS_HAS_MIGRATION_GET_DATA_SIZE" "" "types"
+        ;;
+
+        mdev_parent_ops)
+            #
+            # Determine if the struct mdev_parent_ops type is present.
            #
            # Added by commit 42930553a7c1 ("vfio-mdev: de-polute the
            # namespace, rename parent_device & parent_ops") in v4.10
@@ -951,12 +981,28 @@ compile_test() {
            CODE="
            #include <linux/pci.h>
            #include <linux/mdev.h>
-            struct mdev_parent_ops conftest_mdev_parent;
+            struct mdev_parent_ops conftest_mdev_parent_ops;
            "

            compile_check_conftest "$CODE" "NV_MDEV_PARENT_OPS_STRUCT_PRESENT" "" "types"
        ;;

+        mdev_parent)
+            #
+            # Determine if the struct mdev_parent type is present.
+            #
+            # Added by commit 89345d5177aa ("vfio/mdev: embedd struct mdev_parent in
+            # the parent data structure") in v6.1
+            #
+            CODE="
+            #include <linux/pci.h>
+            #include <linux/mdev.h>
+            struct mdev_parent conftest_mdev_parent;
+            "
+
+            compile_check_conftest "$CODE" "NV_MDEV_PARENT_STRUCT_PRESENT" "" "types"
+        ;;
+
        mdev_parent_dev)
            #
            # Determine if mdev_parent_dev() function is present or not
@@ -974,6 +1020,23 @@ compile_test() {
            compile_check_conftest "$CODE" "NV_MDEV_PARENT_DEV_PRESENT" "" "functions"
        ;;

+        vfio_free_device)
+            #
+            # Determine if vfio_free_device() function is present or not
+            #
+            # Removed by commit 913447d06f03 ("vfio: Remove vfio_free_device")
+            # in v6.2
+            #
+            CODE="
+            #include <linux/pci.h>
+            #include <linux/vfio.h>
+            void conftest_vfio_free_device() {
+                vfio_free_device();
+            }"
+
+            compile_check_conftest "$CODE" "NV_VFIO_FREE_DEVICE_PRESENT" "" "functions"
+        ;;
+
        mdev_from_dev)
            #
            # Determine if mdev_from_dev() function is present or not.
@@ -1059,6 +1122,23 @@ compile_test() {
            compile_check_conftest "$CODE" "NV_MDEV_DRIVER_HAS_SUPPORTED_TYPE_GROUPS" "" "types"
        ;;

+        vfio_device_ops_has_dma_unmap)
+            #
+            # Determine if 'vfio_device_ops' struct has 'dma_unmap' field.
+            #
+            # Added by commit ce4b4657ff18 ("vfio: Replace the DMA unmapping
+            # notifier with a callback") in v6.0
+            #
+            CODE="
+            #include <linux/pci.h>
+            #include <linux/vfio.h>
+            int conftest_vfio_device_ops_has_dma_unmap(void) {
+                return offsetof(struct vfio_device_ops, dma_unmap);
+            }"
+
+            compile_check_conftest "$CODE" "NV_VFIO_DEVICE_OPS_HAS_DMA_UNMAP" "" "types"
+        ;;
+
        pci_irq_vector_helpers)
            #
            # Determine if pci_alloc_irq_vectors(), pci_free_irq_vectors()
@@ -1129,7 +1209,6 @@ compile_test() {
            compile_check_conftest "$CODE" "NV_VFIO_UNINIT_GROUP_DEV_PRESENT" "" "functions"
        ;;

-
        vfio_pci_core_available)
            # Determine if VFIO_PCI_CORE is available
            #
@@ -1152,6 +1231,23 @@ compile_test() {
            compile_check_conftest "$CODE" "NV_VFIO_PCI_CORE_PRESENT" "" "generic"
        ;;

+        vfio_alloc_device)
+            #
+            # Determine if vfio_alloc_device() function is present or not.
+            #
+            # Added by commit cb9ff3f3b84c (vfio: Add helpers for unifying vfio_device
+            # life cycle) in v6.1
+            #
+            CODE="
+            #include <linux/vfio.h>
+            void conftest_vfio_alloc_device() {
+                vfio_alloc_device();
+            }"
+
+            compile_check_conftest "$CODE" "NV_VFIO_ALLOC_DEVICE_PRESENT" "" "functions"
+        ;;
+
+
        vfio_register_emulated_iommu_dev)
            #
            # Determine if vfio_register_emulated_iommu_dev() function is present or not.
@@ -2219,6 +2315,10 @@ compile_test() {
            # commit 768ae309a961 ("mm: replace get_user_pages() write/force
            # parameters with gup_flags") in v4.9 (2016-10-13)
            #
+            # Removed vmas parameter from get_user_pages() by commit 7bbf9c8c99
+            # ("mm/gup: remove unused vmas parameter from get_user_pages()")
+            # in linux-next, expected in v6.5-rc1
+            #
            # linux-4.4.168 cherry-picked commit 768ae309a961 without
            # c12d2da56d0e which is covered in Conftest #3.
            #
@@ -2228,22 +2328,28 @@ compile_test() {
            # passing conftest's
            #
            set_get_user_pages_defines () {
-                if [ "$1" = "NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE" ]; then
-                    echo "#define NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE" | append_conftest "functions"
+                if [ "$1" = "NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE_VMAS" ]; then
+                    echo "#define NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE_VMAS" | append_conftest "functions"
                else
-                    echo "#undef NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE" | append_conftest "functions"
+                    echo "#undef NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE_VMAS" | append_conftest "functions"
                fi

-                if [ "$1" = "NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE" ]; then
-                    echo "#define NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE" | append_conftest "functions"
+                if [ "$1" = "NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE_VMAS" ]; then
+                    echo "#define NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE_VMAS" | append_conftest "functions"
                else
-                    echo "#undef NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE" | append_conftest "functions"
+                    echo "#undef NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE_VMAS" | append_conftest "functions"
                fi

-                if [ "$1" = "NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS" ]; then
-                    echo "#define NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS" | append_conftest "functions"
+                if [ "$1" = "NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS_VMAS" ]; then
+                    echo "#define NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS_VMAS" | append_conftest "functions"
                else
-                    echo "#undef NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS" | append_conftest "functions"
+                    echo "#undef NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS_VMAS" | append_conftest "functions"
+                fi
+
+                if [ "$1" = "NV_GET_USER_PAGES_HAS_ARGS_FLAGS_VMAS" ]; then
+                    echo "#define NV_GET_USER_PAGES_HAS_ARGS_FLAGS_VMAS" | append_conftest "functions"
+                else
+                    echo "#undef NV_GET_USER_PAGES_HAS_ARGS_FLAGS_VMAS" | append_conftest "functions"
                fi

                if [ "$1" = "NV_GET_USER_PAGES_HAS_ARGS_FLAGS" ]; then
@@ -2251,6 +2357,7 @@ compile_test() {
                else
                    echo "#undef NV_GET_USER_PAGES_HAS_ARGS_FLAGS" | append_conftest "functions"
                fi
+
            }

            # Conftest #1: Check if get_user_pages accepts 6 arguments.
@@ -2271,14 +2378,15 @@ compile_test() {
            $CC $CFLAGS -c conftest$$.c > /dev/null 2>&1
            rm -f conftest$$.c
            if [ -f conftest$$.o ]; then
-                set_get_user_pages_defines "NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE"
+                set_get_user_pages_defines "NV_GET_USER_PAGES_HAS_ARGS_WRITE_FORCE_VMAS"
                rm -f conftest$$.o
                return
            fi

            # Conftest #2: Check if get_user_pages has gup_flags instead of
            # write and force parameters. And that gup doesn't accept a
-            # task_struct and mm_struct as its first arguments.
+            # task_struct and mm_struct as its first arguments. get_user_pages
+            # has vm_area_struct as its last argument.
            # Return if available.
            # Fall through to conftest #3 on failure.

@@ -2296,16 +2404,17 @@ compile_test() {
            rm -f conftest$$.c

            if [ -f conftest$$.o ]; then
-                set_get_user_pages_defines "NV_GET_USER_PAGES_HAS_ARGS_FLAGS"
+                set_get_user_pages_defines "NV_GET_USER_PAGES_HAS_ARGS_FLAGS_VMAS"
                rm -f conftest$$.o
                return
            fi

            # Conftest #3: Check if get_user_pages has gup_flags instead of
-            # write and force parameters AND that gup has task_struct and
-            # mm_struct as its first arguments.
+            # write and force parameters. The gup has task_struct and
+            # mm_struct as its first arguments. get_user_pages
+            # has vm_area_struct as its last argument.
            # Return if available.
-            # Fall through to default case if absent.
+            # Fall through to conftest #4 on failure.

            echo "$CONFTEST_PREAMBLE
            #include <linux/mm.h>
@@ -2323,12 +2432,35 @@ compile_test() {
            rm -f conftest$$.c

            if [ -f conftest$$.o ]; then
-                set_get_user_pages_defines "NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS"
+                set_get_user_pages_defines "NV_GET_USER_PAGES_HAS_ARGS_TSK_FLAGS_VMAS"
                rm -f conftest$$.o
                return
            fi

-            set_get_user_pages_defines "NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE"
+            # Conftest #4: gup doesn't accept a task_struct and mm_struct as 
+            # its first arguments. check if get_user_pages() does not take
+            # vmas argument.
+            # Fall through to default case otherwise.
+
+            echo "$CONFTEST_PREAMBLE
+            #include <linux/mm.h>
+            long get_user_pages(unsigned long start,
+                                unsigned long nr_pages,
+                                unsigned int gup_flags,
+                                struct page **pages) {
+                return 0;
+            }" > conftest$$.c
+
+            $CC $CFLAGS -c conftest$$.c > /dev/null 2>&1
+            rm -f conftest$$.c
+
+            if [ -f conftest$$.o ]; then
+                set_get_user_pages_defines "NV_GET_USER_PAGES_HAS_ARGS_FLAGS"
+                rm -f conftest$$.o
+                return
+            fi
+
+            set_get_user_pages_defines "NV_GET_USER_PAGES_HAS_ARGS_TSK_WRITE_FORCE_VMAS"

            return
        ;;
@@ -2355,6 +2487,10 @@ compile_test() {
            # commit 64019a2e467a ("mm/gup: remove task_struct pointer for
            # all gup code") in v5.9-rc1 (2020-08-11).
            #
+            # Removed vmas parameter from get_user_pages_remote() by commit
+            # a4bde14d549 ("mm/gup: remove vmas parameter from get_user_pages_remote()")
+            # in linux-next, expected in v6.5-rc1
+            #

            #
            # This function sets the NV_GET_USER_PAGES_REMOTE_* macros as per
@@ -2367,22 +2503,28 @@ compile_test() {
                    echo "#define NV_GET_USER_PAGES_REMOTE_PRESENT" | append_conftest "functions"
                fi

-                if [ "$1" = "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE" ]; then
-                    echo "#define NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE" | append_conftest "functions"
+                if [ "$1" = "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE_VMAS" ]; then
+                    echo "#define NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE_VMAS" | append_conftest "functions"
                else
-                    echo "#undef NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE" | append_conftest "functions"
+                    echo "#undef NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE_VMAS" | append_conftest "functions"
                fi

-                if [ "$1" = "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS" ]; then
-                    echo "#define NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS" | append_conftest "functions"
+                if [ "$1" = "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_VMAS" ]; then
+                    echo "#define NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_VMAS" | append_conftest "functions"
                else
-                    echo "#undef NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS" | append_conftest "functions"
+                    echo "#undef NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_VMAS" | append_conftest "functions"
                fi

-                if [ "$1" = "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED" ]; then
-                    echo "#define NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED" | append_conftest "functions"
+                if [ "$1" = "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED_VMAS" ]; then
+                    echo "#define NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED_VMAS" | append_conftest "functions"
                else
-                    echo "#undef NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED" | append_conftest "functions"
+                    echo "#undef NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED_VMAS" | append_conftest "functions"
+                fi
+
+                if [ "$1" = "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED_VMAS" ]; then
+                    echo "#define NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED_VMAS" | append_conftest "functions"
+                else
+                    echo "#undef NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED_VMAS" | append_conftest "functions"
                fi

                if [ "$1" = "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED" ]; then
@@ -2390,6 +2532,7 @@ compile_test() {
                else
                    echo "#undef NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED" | append_conftest "functions"
                fi
+
            }

            # conftest #1: check if get_user_pages_remote() is available
@@ -2412,8 +2555,8 @@ compile_test() {
            fi

            #
-            # conftest #2: check if get_user_pages_remote() has write and
-            # force arguments. Return if these arguments are present
+            # conftest #2: check if get_user_pages_remote() has write, force
+            # and vmas arguments. Return if these arguments are present
            # Fall through to conftest #3 if these args are absent.
            #
            echo "$CONFTEST_PREAMBLE
@@ -2433,14 +2576,14 @@ compile_test() {
            rm -f conftest$$.c

            if [ -f conftest$$.o ]; then
-                set_get_user_pages_remote_defines "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE"
+                set_get_user_pages_remote_defines "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_WRITE_FORCE_VMAS"
                rm -f conftest$$.o
                return
            fi

            #
-            # conftest #3: check if get_user_pages_remote() has gpu_flags
-            # arguments. Return if these arguments are present
+            # conftest #3: check if get_user_pages_remote() has gpu_flags and
+            # vmas arguments. Return if these arguments are present
            # Fall through to conftest #4 if these args are absent.
            #
            echo "$CONFTEST_PREAMBLE
@@ -2459,13 +2602,14 @@ compile_test() {
            rm -f conftest$$.c

            if [ -f conftest$$.o ]; then
-                set_get_user_pages_remote_defines "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS"
+                set_get_user_pages_remote_defines "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_VMAS"
                rm -f conftest$$.o
                return
            fi

            #
-            # conftest #4: check if get_user_pages_remote() has locked argument
+            # conftest #4: check if get_user_pages_remote() has locked and 
+            # vmas argument
            # Return if these arguments are present. Fall through to conftest #5
            # if these args are absent.
            #
@@ -2486,7 +2630,7 @@ compile_test() {
            rm -f conftest$$.c

            if [ -f conftest$$.o ]; then
-                set_get_user_pages_remote_defines "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED"
+                set_get_user_pages_remote_defines "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_FLAGS_LOCKED_VMAS"
                rm -f conftest$$.o
                return
            fi
@@ -2510,10 +2654,34 @@ compile_test() {
            $CC $CFLAGS -c conftest$$.c > /dev/null 2>&1
            rm -f conftest$$.c

+            if [ -f conftest$$.o ]; then
+                set_get_user_pages_remote_defines "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED_VMAS"
+                rm -f conftest$$.o
+            fi
+
+            #
+            # conftest #6: check if get_user_pages_remote() does not take
+            # vmas argument.
+            #
+            echo "$CONFTEST_PREAMBLE
+            #include <linux/mm.h>
+            long get_user_pages_remote(struct mm_struct *mm,
+                                       unsigned long start,
+                                       unsigned long nr_pages,
+                                       unsigned int gup_flags,
+                                       struct page **pages,
+                                       int *locked) {
+                return 0;
+            }" > conftest$$.c
+
+            $CC $CFLAGS -c conftest$$.c > /dev/null 2>&1
+            rm -f conftest$$.c
+
            if [ -f conftest$$.o ]; then
                set_get_user_pages_remote_defines "NV_GET_USER_PAGES_REMOTE_HAS_ARGS_FLAGS_LOCKED"
                rm -f conftest$$.o
            fi
+
        ;;

        pin_user_pages)
@@ -2525,17 +2693,65 @@ compile_test() {
            # pin_user_pages() was added by commit eddb1c228f7951d399240
            # ("mm/gup: introduce pin_user_pages*() and FOLL_PIN") in
            # v5.6-rc1 (2020-01-30)
+            #
+            # Removed vmas parameter from pin_user_pages() by commit
+            # 40896a02751("mm/gup: remove vmas parameter from pin_user_pages()")
+            # in linux-next, expected in v6.5-rc1
+
+            set_pin_user_pages_defines () {
+                if [ "$1" = "" ]; then
+                    echo "#undef NV_PIN_USER_PAGES_PRESENT" | append_conftest "functions"
+                else
+                    echo "#define NV_PIN_USER_PAGES_PRESENT" | append_conftest "functions"
+                fi
+
+                if [ "$1" = "NV_PIN_USER_PAGES_HAS_ARGS_VMAS" ]; then
+                    echo "#define NV_PIN_USER_PAGES_HAS_ARGS_VMAS" | append_conftest "functions"
+                else
+                    echo "#undef NV_PIN_USER_PAGES_HAS_ARGS_VMAS" | append_conftest "functions"
+                fi
+
+            }

            # conftest #1: check if pin_user_pages() is available
            # return if not available.
+            # Fall through to conftest #2 if it is present
            #
-            CODE="
+            echo "$CONFTEST_PREAMBLE
            #include <linux/mm.h>
            void conftest_pin_user_pages(void) {
                pin_user_pages();
-            }"
+            }" > conftest$$.c

-            compile_check_conftest "$CODE" "NV_PIN_USER_PAGES_PRESENT" "" "functions"
+            $CC $CFLAGS -c conftest$$.c > /dev/null 2>&1
+            rm -f conftest$$.c
+
+            if [ -f conftest$$.o ]; then
+                set_pin_user_pages_defines ""
+                rm -f conftest$$.o
+                return
+            fi
+
+            # conftest #2: Check if pin_user_pages() has vmas argument
+            echo "$CONFTEST_PREAMBLE
+            #include <linux/mm.h>
+            long pin_user_pages(unsigned long start,
+                                unsigned long nr_pages,
+                    		    unsigned int gup_flags,
+                                struct page **pages,
+                    		    struct vm_area_struct **vmas) {
+                return 0;
+            }" > conftest$$.c
+
+            $CC $CFLAGS -c conftest$$.c > /dev/null 2>&1
+            rm -f conftest$$.c
+
+            if [ -f conftest$$.o ]; then
+                set_pin_user_pages_defines "NV_PIN_USER_PAGES_HAS_ARGS_VMAS"
+                rm -f conftest$$.o
+            else
+                set_pin_user_pages_defines "NV_PIN_USER_PAGES_PRESENT"
+            fi
        ;;

        pin_user_pages_remote)
@@ -2548,6 +2764,10 @@ compile_test() {
            # pin_user_pages_remote() removed 'tsk' parameter by
            # commit 64019a2e467a ("mm/gup: remove task_struct pointer for
            # all gup code") in v5.9-rc1 (2020-08-11).
+            #
+            # Removed unused vmas parameter from pin_user_pages_remote() by
+            # commit 83bcc2e132 ("mm/gup: remove unused vmas parameter from
+            # pin_user_pages_remote()") in linux-next, expected in v6.5-rc1

            #
            # This function sets the NV_PIN_USER_PAGES_REMOTE_* macros as per
@@ -2560,10 +2780,16 @@ compile_test() {
                    echo "#define NV_PIN_USER_PAGES_REMOTE_PRESENT" | append_conftest "functions"
                fi

-                if [ "$1" = "NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK" ]; then
-                    echo "#define NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK" | append_conftest "functions"
+                if [ "$1" = "NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK_VMAS" ]; then
+                    echo "#define NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK_VMAS" | append_conftest "functions"
                else
-                    echo "#undef NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK" | append_conftest "functions"
+                    echo "#undef NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK_VMAS" | append_conftest "functions"
+                fi
+
+                if [ "$1" = "NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_VMAS" ]; then
+                    echo "#define NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_VMAS" | append_conftest "functions"
+                else
+                    echo "#undef NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_VMAS" | append_conftest "functions"
                fi
            }

@@ -2586,7 +2812,11 @@ compile_test() {
                return
            fi

-            # conftest #2: Check if pin_user_pages_remote() has tsk argument
+            # conftest #2: Check if pin_user_pages_remote() has tsk and
+            # vmas argument
+            # Return if these arguments are present else fall through to
+            # conftest #3
+
            echo "$CONFTEST_PREAMBLE
            #include <linux/mm.h>
            long pin_user_pages_remote(struct task_struct *tsk,
@@ -2604,14 +2834,37 @@ compile_test() {
            rm -f conftest$$.c

            if [ -f conftest$$.o ]; then
-                set_pin_user_pages_remote_defines "NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK"
+                set_pin_user_pages_remote_defines "NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK_VMAS"
+                rm -f conftest$$.o
+                return
+            fi
+
+            # conftest #3: Check if pin_user_pages_remote() has vmas argument
+            echo "$CONFTEST_PREAMBLE
+            #include <linux/mm.h>
+            long pin_user_pages_remote(struct mm_struct *mm,
+                                       unsigned long start,
+                                       unsigned long nr_pages,
+                                       unsigned int gup_flags,
+                                       struct page **pages,
+                                       struct vm_area_struct **vmas,
+                                       int *locked) {
+                return 0;
+            }" > conftest$$.c
+
+            $CC $CFLAGS -c conftest$$.c > /dev/null 2>&1
+            rm -f conftest$$.c
+
+            if [ -f conftest$$.o ]; then
+                set_pin_user_pages_remote_defines "NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_VMAS"
                rm -f conftest$$.o
            else
                set_pin_user_pages_remote_defines "NV_PIN_USER_PAGES_REMOTE_PRESENT"
            fi
+
        ;;

-        vfio_pin_pages)
+        vfio_pin_pages_has_vfio_device_arg)
            #
            # Determine if vfio_pin_pages() kABI accepts "struct vfio_device *"
            # argument instead of "struct device *"
@@ -2642,6 +2895,37 @@ compile_test() {
            fi
        ;;

+        vfio_pin_pages_has_pages_arg)
+            #
+            # Determine if vfio_pin_pages() kABI accepts "struct pages **:
+            # argument instead of "unsigned long *phys_pfn"
+            #
+            # Replaced "unsigned long *phys_pfn" with "struct pages **pages"
+            # in commit 34a255e676159 ("vfio: Replace phys_pfn with pages for
+            # vfio_pin_pages()") in v6.0.
+            #
+            echo "$CONFTEST_PREAMBLE
+            #include <linux/pci.h>
+            #include <linux/vfio.h>
+            int vfio_pin_pages(struct vfio_device *device,
+                               dma_addr_t iova,
+                               int npage,
+                               int prot,
+                               struct page **pages) {
+                return 0;
+            }" > conftest$$.c
+
+            $CC $CFLAGS -c conftest$$.c > /dev/null 2>&1
+            rm -f conftest$$.c
+
+            if [ -f conftest$$.o ]; then
+                echo "#define NV_VFIO_PIN_PAGES_HAS_PAGES_ARG" | append_conftest "functions"
+                rm -f conftest$$.o
+            else
+                echo "#undef NV_VFIO_PIN_PAGES_HAS_PAGES_ARG" | append_conftest "functions"
+            fi
+        ;;
+
        pci_driver_has_driver_managed_dma)
            #
            # Determine if "struct pci_driver" has .driver_managed_dma member.
@@ -5046,23 +5330,6 @@ compile_test() {
            compile_check_conftest "$CODE" "NV_GPIO_TO_IRQ_PRESENT" "" "functions"
        ;;

-        migrate_vma_setup)
-            #
-            # Determine if migrate_vma_setup() function is present
-            #
-            # migrate_vma_setup() function was added by commit
-            # a7d1f22bb74f32cf3cd93f52776007e161f1a738 ("mm: turn migrate_vma
-            # upside down) in v5.4.
-            # (2019-08-20).
-            CODE="
-            #include <linux/migrate.h>
-            int conftest_migrate_vma_setup(void) {
-                migrate_vma_setup();
-            }"
-
-            compile_check_conftest "$CODE" "NV_MIGRATE_VMA_SETUP_PRESENT" "" "functions"
-        ;;
-
        migrate_vma_added_flags)
            #
            # Determine if migrate_vma structure has flags
@@ -5404,6 +5671,71 @@ compile_test() {
            compile_check_conftest "$CODE" "NV_ACPI_VIDEO_BACKLIGHT_USE_NATIVE" "" "functions"
        ;;

+        drm_connector_has_override_edid)
+            #
+            # Determine if 'struct drm_connector' has an 'override_edid' member.
+            #
+            # Removed by commit 90b575f52c6ab ("drm/edid: detach debugfs EDID
+            # override from EDID property update") in linux-next, expected in
+            # v6.2-rc1.
+            #
+            CODE="
+            #if defined(NV_DRM_DRM_CRTC_H_PRESENT)
+            #include <drm/drm_crtc.h>
+            #endif
+            #if defined(NV_DRM_DRM_CONNECTOR_H_PRESENT)
+            #include <drm/drm_connector.h>
+            #endif
+            int conftest_drm_connector_has_override_edid(void) {
+                return offsetof(struct drm_connector, override_edid);
+            }"
+
+            compile_check_conftest "$CODE" "NV_DRM_CONNECTOR_HAS_OVERRIDE_EDID" "" "types"
+        ;;
+
+        vm_area_struct_has_const_vm_flags)
+            #
+            # Determine if the 'vm_area_struct' structure has
+            # const 'vm_flags'.
+            #
+            # A union of '__vm_flags' and 'const vm_flags' was added 
+            # by commit bc292ab00f6c ("mm: introduce vma->vm_flags
+            # wrapper functions") in mm-stable branch (2023-02-09)
+            # of the akpm/mm maintainer tree.
+            #
+            CODE="
+            #include <linux/mm_types.h>
+            int conftest_vm_area_struct_has_const_vm_flags(void) {
+                return offsetof(struct vm_area_struct, __vm_flags);
+            }"
+
+            compile_check_conftest "$CODE" "NV_VM_AREA_STRUCT_HAS_CONST_VM_FLAGS" "" "types"
+        ;;
+
+        drm_driver_has_dumb_destroy)
+            #
+            # Determine if the 'drm_driver' structure has a 'dumb_destroy'
+            # function pointer.
+            #
+            # Removed by commit 96a7b60f6ddb2 ("drm: remove dumb_destroy
+            # callback") in v6.3 linux-next (2023-02-10).
+            #
+            CODE="
+            #if defined(NV_DRM_DRMP_H_PRESENT)
+            #include <drm/drmP.h>
+            #endif
+
+            #if defined(NV_DRM_DRM_DRV_H_PRESENT)
+            #include <drm/drm_drv.h>
+            #endif
+
+            int conftest_drm_driver_has_dumb_destroy(void) {
+                return offsetof(struct drm_driver, dumb_destroy);
+            }"
+
+            compile_check_conftest "$CODE" "NV_DRM_DRIVER_HAS_DUMB_DESTROY" "" "types"
+        ;;
+
        # When adding a new conftest entry, please use the correct format for
        # specifying the relevant upstream Linux kernel commit.
        #
--- a/kernel-open/nvidia-drm/nvidia-drm-connector.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-connector.c
@@ -42,6 +42,7 @@

 #include <drm/drm_atomic.h>
 #include <drm/drm_atomic_helper.h>
+#include <drm/drm_edid.h>

 static void nv_drm_connector_destroy(struct drm_connector *connector)
 {
@@ -98,7 +99,11 @@ __nv_drm_detect_encoder(struct NvKmsKapiDynamicDisplayParams *pDetectParams,
            break;
    }

+#if defined(NV_DRM_CONNECTOR_HAS_OVERRIDE_EDID)
    if (connector->override_edid) {
+#else
+    if (drm_edid_override_connector_update(connector) > 0) {
+#endif
        const struct drm_property_blob *edid = connector->edid_blob_ptr;

        if (edid->length <= sizeof(pDetectParams->edid.buffer)) {
--- a/kernel-open/nvidia-drm/nvidia-drm-drv.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-drv.c
@@ -257,10 +257,6 @@ nv_drm_init_mode_config(struct nv_drm_device *nv_dev,
    dev->mode_config.preferred_depth = 24;
    dev->mode_config.prefer_shadow = 1;

-    /* Currently unused. Update when needed. */
-
-    dev->mode_config.fb_base = 0;
-
 #if defined(NV_DRM_CRTC_STATE_HAS_ASYNC_FLIP) || \
    defined(NV_DRM_CRTC_STATE_HAS_PAGEFLIP_FLAGS)
    dev->mode_config.async_page_flip = true;
@@ -859,8 +855,23 @@ static struct drm_driver nv_drm_driver = {
    .ioctls                 = nv_drm_ioctls,
    .num_ioctls             = ARRAY_SIZE(nv_drm_ioctls),

+/*
+ * linux-next commit 71a7974ac701 ("drm/prime: Unexport helpers for fd/handle
+ * conversion") unexports drm_gem_prime_handle_to_fd() and
+ * drm_gem_prime_fd_to_handle().
+ *
+ * Prior linux-next commit 6b85aa68d9d5 ("drm: Enable PRIME import/export for
+ * all drivers") made these helpers the default when .prime_handle_to_fd /
+ * .prime_fd_to_handle are unspecified, so it's fine to just skip specifying
+ * them if the helpers aren't present.
+ */
+#if NV_IS_EXPORT_SYMBOL_PRESENT_drm_gem_prime_handle_to_fd
    .prime_handle_to_fd     = drm_gem_prime_handle_to_fd,
+#endif
+#if NV_IS_EXPORT_SYMBOL_PRESENT_drm_gem_prime_fd_to_handle
    .prime_fd_to_handle     = drm_gem_prime_fd_to_handle,
+#endif
+
    .gem_prime_import       = nv_drm_gem_prime_import,
    .gem_prime_import_sg_table = nv_drm_gem_prime_import_sg_table,

@@ -925,7 +936,9 @@ static void nv_drm_update_drm_driver_features(void)

    nv_drm_driver.dumb_create      = nv_drm_dumb_create;
    nv_drm_driver.dumb_map_offset  = nv_drm_dumb_map_offset;
+#if defined(NV_DRM_DRIVER_HAS_DUMB_DESTROY)
    nv_drm_driver.dumb_destroy     = nv_drm_dumb_destroy;
+#endif /* NV_DRM_DRIVER_HAS_DUMB_DESTROY */
 #endif /* NV_DRM_ATOMIC_MODESET_AVAILABLE */
 }

--- a/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.c
@@ -201,7 +201,7 @@ static struct sg_table *__nv_drm_gem_nvkms_memory_prime_get_sg_table(
                nv_dev,
                "Cannot create sg_table for NvKmsKapiMemory 0x%p",
                nv_gem->pMemory);
-        return NULL;
+        return ERR_PTR(-ENOMEM);
    }

    sg_table = nv_drm_prime_pages_to_sg(nv_dev->dev,
@@ -583,11 +583,13 @@ int nv_drm_dumb_map_offset(struct drm_file *file,
    return ret;
 }

+#if defined(NV_DRM_DRIVER_HAS_DUMB_DESTROY)
 int nv_drm_dumb_destroy(struct drm_file *file,
                        struct drm_device *dev,
                        uint32_t handle)
 {
    return drm_gem_handle_delete(file, handle);
 }
+#endif /* NV_DRM_DRIVER_HAS_DUMB_DESTROY */

 #endif
--- a/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.h
+++ b/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.h
@@ -97,9 +97,11 @@ int nv_drm_dumb_map_offset(struct drm_file *file,
                           struct drm_device *dev, uint32_t handle,
                           uint64_t *offset);

+#if defined(NV_DRM_DRIVER_HAS_DUMB_DESTROY)
 int nv_drm_dumb_destroy(struct drm_file *file,
                        struct drm_device *dev,
                        uint32_t handle);
+#endif /* NV_DRM_DRIVER_HAS_DUMB_DESTROY */

 struct drm_gem_object *nv_drm_gem_nvkms_prime_import(
    struct drm_device *dev,
--- a/kernel-open/nvidia-drm/nvidia-drm-gem-user-memory.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-gem-user-memory.c
@@ -92,9 +92,9 @@ static int __nv_drm_gem_user_memory_mmap(struct nv_drm_gem_object *nv_gem,
        return -EINVAL;
    }

-    vma->vm_flags &= ~VM_PFNMAP;
-    vma->vm_flags &= ~VM_IO;
-    vma->vm_flags |= VM_MIXEDMAP;
+    nv_vm_flags_clear(vma, VM_PFNMAP);
+    nv_vm_flags_clear(vma, VM_IO);
+    nv_vm_flags_set(vma, VM_MIXEDMAP);

    return 0;
 }
--- a/kernel-open/nvidia-drm/nvidia-drm-gem.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-gem.c
@@ -299,7 +299,7 @@ int nv_drm_mmap(struct file *file, struct vm_area_struct *vma)
            ret = -EINVAL;
            goto done;
        }
-        vma->vm_flags &= ~VM_MAYWRITE;
+        nv_vm_flags_clear(vma, VM_MAYWRITE);
    }
 #endif

--- a/kernel-open/nvidia-drm/nvidia-drm-modeset.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-modeset.c
@@ -131,16 +131,19 @@ static int __nv_drm_put_back_post_fence_fd(
    const struct NvKmsKapiLayerReplyConfig *layer_reply_config)
 {
    int fd = layer_reply_config->postSyncptFd;
+    int ret = 0;

    if ((fd >= 0) && (plane_state->fd_user_ptr != NULL)) {
-        if (put_user(fd, plane_state->fd_user_ptr)) {
-            return -EFAULT;
+        ret = copy_to_user(plane_state->fd_user_ptr, &fd, sizeof(fd));
+        if (ret != 0) {
+            return ret;
        }

        /*! set back to Null and let set_property specify it again */
        plane_state->fd_user_ptr = NULL;
    }
-    return 0;
+
+    return ret;
 }

 static int __nv_drm_get_syncpt_data(
--- a/kernel-open/nvidia-drm/nvidia-drm-prime-fence.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-prime-fence.c
@@ -347,6 +347,9 @@ static nv_dma_fence_t *__nv_drm_fence_context_create_fence(
                      &nv_fence->lock, nv_fence_context->context,
                      seqno);

+    /* The context maintains a reference to any pending fences. */
+    nv_dma_fence_get(&nv_fence->base);
+
    list_add_tail(&nv_fence->list_entry, &nv_fence_context->pending);

    nv_fence_context->last_seqno = seqno;
@@ -512,6 +515,9 @@ int nv_drm_gem_fence_attach_ioctl(struct drm_device *dev,

    nv_dma_resv_unlock(&nv_gem->resv);

+    /* dma_resv_add_excl_fence takes its own reference to the fence. */
+    nv_dma_fence_put(fence);
+
 fence_context_create_fence_failed:
    nv_drm_gem_object_unreference_unlocked(&nv_gem_fence_context->base);

--- a/kernel-open/nvidia-drm/nvidia-drm.Kbuild
+++ b/kernel-open/nvidia-drm/nvidia-drm.Kbuild
@@ -54,6 +54,8 @@ NV_CONFTEST_GENERIC_COMPILE_TESTS += drm_atomic_available
 NV_CONFTEST_GENERIC_COMPILE_TESTS += is_export_symbol_gpl_refcount_inc
 NV_CONFTEST_GENERIC_COMPILE_TESTS += is_export_symbol_gpl_refcount_dec_and_test
 NV_CONFTEST_GENERIC_COMPILE_TESTS += drm_alpha_blending_available
+NV_CONFTEST_GENERIC_COMPILE_TESTS += is_export_symbol_present_drm_gem_prime_fd_to_handle
+NV_CONFTEST_GENERIC_COMPILE_TESTS += is_export_symbol_present_drm_gem_prime_handle_to_fd

 NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_dev_unref
 NV_CONFTEST_FUNCTION_COMPILE_TESTS += drm_reinit_primary_mode_group
@@ -123,3 +125,6 @@ NV_CONFTEST_TYPE_COMPILE_TESTS += drm_has_hdr_output_metadata
 NV_CONFTEST_TYPE_COMPILE_TESTS += dma_resv_add_fence
 NV_CONFTEST_TYPE_COMPILE_TESTS += dma_resv_reserve_fences
 NV_CONFTEST_TYPE_COMPILE_TESTS += reservation_object_reserve_shared_has_num_fences_arg
+NV_CONFTEST_TYPE_COMPILE_TESTS += drm_connector_has_override_edid
+NV_CONFTEST_TYPE_COMPILE_TESTS += vm_area_struct_has_const_vm_flags
+NV_CONFTEST_TYPE_COMPILE_TESTS += drm_driver_has_dumb_destroy
--- a/kernel-open/nvidia-modeset/nvidia-modeset-linux.c
+++ b/kernel-open/nvidia-modeset/nvidia-modeset-linux.c
@@ -65,6 +65,9 @@
 static bool output_rounding_fix = true;
 module_param_named(output_rounding_fix, output_rounding_fix, bool, 0400);

+static bool disable_vrr_memclk_switch = false;
+module_param_named(disable_vrr_memclk_switch, disable_vrr_memclk_switch, bool, 0400);
+
 /* These parameters are used for fault injection tests.  Normally the defaults
 * should be used. */
 MODULE_PARM_DESC(fail_malloc, "Fail the Nth call to nvkms_alloc");
@@ -82,6 +85,11 @@ NvBool nvkms_output_rounding_fix(void)
    return output_rounding_fix;
 }

+NvBool nvkms_disable_vrr_memclk_switch(void)
+{
+    return disable_vrr_memclk_switch;
+}
+
 #define NVKMS_SYNCPT_STUBS_NEEDED

 /*************************************************************************
--- a/kernel-open/nvidia-modeset/nvidia-modeset-os-interface.h
+++ b/kernel-open/nvidia-modeset/nvidia-modeset-os-interface.h
@@ -112,6 +112,8 @@ typedef struct {

 NvBool nvkms_output_rounding_fix(void);

+NvBool nvkms_disable_vrr_memclk_switch(void);
+
 void   nvkms_call_rm    (void *ops);
 void*  nvkms_alloc      (size_t size,
                         NvBool zero);
--- a/kernel-open/nvidia-peermem/nv-p2p.h
+++ b/kernel-open/nvidia-peermem/nv-p2p.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2011-2016 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2011-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -94,11 +94,10 @@ struct nvidia_p2p_params {
 } nvidia_p2p_params_t;

 /*
- * Capability flag for users to detect
+ * Macro for users to detect
 * driver support for persistent pages.
 */
-extern int nvidia_p2p_cap_persistent_pages;
-#define NVIDIA_P2P_CAP_PERSISTENT_PAGES
+#define NVIDIA_P2P_CAP_GET_PAGES_PERSISTENT_API

 /*
 * This API is not supported.
@@ -173,11 +172,6 @@ struct nvidia_p2p_page_table {
 *   A pointer to the function to be invoked when the pages
 *   underlying the virtual address range are freed
 *   implicitly.
- *   If NULL, persistent pages will be returned.
- *   This means the pages underlying the range of GPU virtual memory
- *   will persist until explicitly freed by nvidia_p2p_put_pages().
- *   Persistent GPU memory mappings are not supported on PowerPC,
- *   MIG-enabled devices and vGPU.
 * @param[in]     data
 *   A non-NULL opaque pointer to private data to be passed to the
 *   callback function.
@@ -190,12 +184,48 @@ struct nvidia_p2p_page_table {
 *     insufficient resources were available to complete the operation.
 *   -EIO         if an unknown error occurred.
 */
-int nvidia_p2p_get_pages(uint64_t p2p_token, uint32_t va_space,
-        uint64_t virtual_address,
+int nvidia_p2p_get_pages( uint64_t p2p_token, uint32_t va_space,
+        uint64_t virtual_address, uint64_t length,
+        struct nvidia_p2p_page_table **page_table,
+        void (*free_callback)(void *data), void *data);
+
+/*
+ * @brief
+ *   Pin and make the pages underlying a range of GPU virtual memory
+ *   accessible to a third-party device. The pages will persist until
+ *   explicitly freed by nvidia_p2p_put_pages_persistent().
+ *
+ *   Persistent GPU memory mappings are not supported on PowerPC,
+ *   MIG-enabled devices and vGPU.
+ *
+ *   This API only supports pinned, GPU-resident memory, such as that provided
+ *   by cudaMalloc().
+ *
+ *   This API may sleep.
+ *
+ * @param[in]     virtual_address
+ *   The start address in the specified virtual address space.
+ *   Address must be aligned to the 64KB boundary.
+ * @param[in]     length
+ *   The length of the requested P2P mapping.
+ *   Length must be a multiple of 64KB.
+ * @param[out]    page_table
+ *   A pointer to an array of structures with P2P PTEs.
+ * @param[in]     flags
+ *   Must be set to zero for now.
+ *
+ * @return
+ *    0           upon successful completion.
+ *   -EINVAL      if an invalid argument was supplied.
+ *   -ENOTSUPP    if the requested operation is not supported.
+ *   -ENOMEM      if the driver failed to allocate memory or if
+ *     insufficient resources were available to complete the operation.
+ *   -EIO         if an unknown error occurred.
+ */
+int nvidia_p2p_get_pages_persistent(uint64_t virtual_address,
        uint64_t length,
        struct nvidia_p2p_page_table **page_table,
-        void (*free_callback)(void *data),
-        void *data);
+        uint32_t flags);

 #define NVIDIA_P2P_DMA_MAPPING_VERSION   0x00020003

@@ -268,6 +298,8 @@ int nvidia_p2p_dma_unmap_pages(struct pci_dev *peer,
 *   Release a set of pages previously made accessible to
 *   a third-party device.
 *
+ *   This API may sleep.
+ *
 * @param[in]     p2p_token
 *   A token that uniquely identifies the P2P mapping.
 * @param[in]     va_space
@@ -282,10 +314,33 @@ int nvidia_p2p_dma_unmap_pages(struct pci_dev *peer,
 *   -EINVAL      if an invalid argument was supplied.
 *   -EIO         if an unknown error occurred.
 */
-int nvidia_p2p_put_pages(uint64_t p2p_token, uint32_t va_space,
-        uint64_t virtual_address,
+int nvidia_p2p_put_pages(uint64_t p2p_token,
+        uint32_t va_space, uint64_t virtual_address,
        struct nvidia_p2p_page_table *page_table);

+/*
+ * @brief
+ *   Release a set of persistent pages previously made accessible to
+ *   a third-party device.
+ *
+ *   This API may sleep.
+ *
+ * @param[in]     virtual_address
+ *   The start address in the specified virtual address space.
+ * @param[in]     page_table
+ *   A pointer to the array of structures with P2P PTEs.
+ * @param[in]     flags
+ *   Must be set to zero for now.
+ *
+ * @return
+ *    0           upon successful completion.
+ *   -EINVAL      if an invalid argument was supplied.
+ *   -EIO         if an unknown error occurred.
+ */
+int nvidia_p2p_put_pages_persistent(uint64_t virtual_address,
+        struct nvidia_p2p_page_table *page_table,
+        uint32_t flags);
+
 /*
 * @brief
 *    Free a third-party P2P page table. (This function is a no-op.)
--- a/kernel-open/nvidia-peermem/nvidia-peermem.c
+++ b/kernel-open/nvidia-peermem/nvidia-peermem.c
@@ -284,8 +284,9 @@ out:
    return 0;
 }

-
-static void nv_mem_put_pages(struct sg_table *sg_head, void *context)
+static void nv_mem_put_pages_common(int nc,
+                                    struct sg_table *sg_head,
+                                    void *context)
 {
    int ret = 0;
    struct nv_mem_context *nv_mem_context =
@@ -302,8 +303,13 @@ static void nv_mem_put_pages(struct sg_table *sg_head, void *context)
    if (nv_mem_context->callback_task == current)
        return;

-    ret = nvidia_p2p_put_pages(0, 0, nv_mem_context->page_virt_start,
-                               nv_mem_context->page_table);
+    if (nc) {
+        ret = nvidia_p2p_put_pages_persistent(nv_mem_context->page_virt_start,
+                                              nv_mem_context->page_table, 0);
+    } else {
+        ret = nvidia_p2p_put_pages(0, 0, nv_mem_context->page_virt_start,
+                                   nv_mem_context->page_table);
+    }

 #ifdef _DEBUG_ONLY_
    /* Here we expect an error in real life cases that should be ignored - not printed.
@@ -318,6 +324,16 @@ static void nv_mem_put_pages(struct sg_table *sg_head, void *context)
    return;
 }

+static void nv_mem_put_pages(struct sg_table *sg_head, void *context)
+{
+    nv_mem_put_pages_common(0, sg_head, context);
+}
+
+static void nv_mem_put_pages_nc(struct sg_table *sg_head, void *context)
+{
+    nv_mem_put_pages_common(1, sg_head, context);
+}
+
 static void nv_mem_release(void *context)
 {
    struct nv_mem_context *nv_mem_context =
@@ -396,8 +412,9 @@ static int nv_mem_get_pages_nc(unsigned long addr,
    nv_mem_context->core_context = core_context;
    nv_mem_context->page_size = GPU_PAGE_SIZE;

-    ret = nvidia_p2p_get_pages(0, 0, nv_mem_context->page_virt_start, nv_mem_context->mapped_size,
-                               &nv_mem_context->page_table, NULL, NULL);
+    ret = nvidia_p2p_get_pages_persistent(nv_mem_context->page_virt_start,
+                                          nv_mem_context->mapped_size,
+                                          &nv_mem_context->page_table, 0);
    if (ret < 0) {
        peer_err("error %d while calling nvidia_p2p_get_pages() with NULL callback\n", ret);
        return ret;
@@ -407,13 +424,13 @@ static int nv_mem_get_pages_nc(unsigned long addr,
 }

 static struct peer_memory_client nv_mem_client_nc = {
-	.acquire        = nv_mem_acquire,
-	.get_pages      = nv_mem_get_pages_nc,
-	.dma_map        = nv_dma_map,
-	.dma_unmap      = nv_dma_unmap,
-	.put_pages      = nv_mem_put_pages,
-	.get_page_size  = nv_mem_get_page_size,
-	.release        = nv_mem_release,
+    .acquire        = nv_mem_acquire,
+    .get_pages      = nv_mem_get_pages_nc,
+    .dma_map        = nv_dma_map,
+    .dma_unmap      = nv_dma_unmap,
+    .put_pages      = nv_mem_put_pages_nc,
+    .get_page_size  = nv_mem_get_page_size,
+    .release        = nv_mem_release,
 };

 #endif /* NV_MLNX_IB_PEER_MEM_SYMBOLS_PRESENT */
@@ -477,9 +494,6 @@ static int __init nv_mem_client_init(void)
    }

    // The nc client enables support for persistent pages.
-    // Thanks to this check, nvidia-peermem requires the new symbol from nvidia.ko, which 
-    // prevents users to unintentionally load this module with unsupported nvidia.ko.
-    BUG_ON(!nvidia_p2p_cap_persistent_pages);
    strcpy(nv_mem_client_nc.name, DRV_NAME "_nc");
    strcpy(nv_mem_client_nc.version, DRV_VERSION);
    reg_handle_nc = ib_register_peer_memory_client(&nv_mem_client_nc, NULL);
--- a/kernel-open/nvidia-uvm/nvidia-uvm.Kbuild
+++ b/kernel-open/nvidia-uvm/nvidia-uvm.Kbuild
@@ -81,7 +81,6 @@ NV_CONFTEST_FUNCTION_COMPILE_TESTS += set_memory_uc
 NV_CONFTEST_FUNCTION_COMPILE_TESTS += set_pages_uc
 NV_CONFTEST_FUNCTION_COMPILE_TESTS += ktime_get_raw_ts64
 NV_CONFTEST_FUNCTION_COMPILE_TESTS += ioasid_get
-NV_CONFTEST_FUNCTION_COMPILE_TESTS += migrate_vma_setup
 NV_CONFTEST_FUNCTION_COMPILE_TESTS += mmget_not_zero

 NV_CONFTEST_TYPE_COMPILE_TESTS += backing_dev_info
@@ -101,5 +100,7 @@ NV_CONFTEST_TYPE_COMPILE_TESTS += timespec64
 NV_CONFTEST_TYPE_COMPILE_TESTS += mm_has_mmap_lock
 NV_CONFTEST_TYPE_COMPILE_TESTS += migrate_vma_added_flags
 NV_CONFTEST_TYPE_COMPILE_TESTS += make_device_exclusive_range
+NV_CONFTEST_TYPE_COMPILE_TESTS += vm_area_struct_has_const_vm_flags

 NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_int_active_memcg
+NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_migrate_vma_setup
--- a/kernel-open/nvidia-uvm/uvm.c
+++ b/kernel-open/nvidia-uvm/uvm.c
@@ -618,7 +618,7 @@ static int uvm_mmap(struct file *filp, struct vm_area_struct *vma)
    // Using VM_DONTCOPY would be nice, but madvise(MADV_DOFORK) can reset that
    // so we have to handle vm_open on fork anyway. We could disable MADV_DOFORK
    // with VM_IO, but that causes other mapping issues.
-    vma->vm_flags |= VM_MIXEDMAP | VM_DONTEXPAND;
+    nv_vm_flags_set(vma, VM_MIXEDMAP | VM_DONTEXPAND);

    vma->vm_ops = &uvm_vm_ops_managed;

--- a/kernel-open/nvidia-uvm/uvm_ce_test.c
+++ b/kernel-open/nvidia-uvm/uvm_ce_test.c
@@ -179,7 +179,7 @@ static NV_STATUS test_membar(uvm_gpu_t *gpu)

    for (i = 0; i < REDUCTIONS; ++i) {
        uvm_push_set_flag(&push, UVM_PUSH_FLAG_NEXT_MEMBAR_NONE);
-        gpu->parent->ce_hal->semaphore_reduction_inc(&push, host_mem_gpu_va, REDUCTIONS + 1);
+        gpu->parent->ce_hal->semaphore_reduction_inc(&push, host_mem_gpu_va, REDUCTIONS);
    }

    // Without a sys membar the channel tracking semaphore can and does complete
@@ -528,7 +528,7 @@ static NV_STATUS test_semaphore_reduction_inc(uvm_gpu_t *gpu)

    for (i = 0; i < REDUCTIONS; i++) {
        uvm_push_set_flag(&push, UVM_PUSH_FLAG_NEXT_MEMBAR_NONE);
-        gpu->parent->ce_hal->semaphore_reduction_inc(&push, gpu_va, i+1);
+        gpu->parent->ce_hal->semaphore_reduction_inc(&push, gpu_va, REDUCTIONS);
    }

    status = uvm_push_end_and_wait(&push);
--- a/kernel-open/nvidia-uvm/uvm_channel_test.c
+++ b/kernel-open/nvidia-uvm/uvm_channel_test.c
@@ -153,7 +153,6 @@ done:

 static NV_STATUS test_unexpected_completed_values(uvm_va_space_t *va_space)
 {
-    NV_STATUS status;
    uvm_gpu_t *gpu;

    for_each_va_space_gpu(gpu, va_space) {
--- a/kernel-open/nvidia-uvm/uvm_common.c
+++ b/kernel-open/nvidia-uvm/uvm_common.c
@@ -34,7 +34,7 @@ static int uvm_debug_prints = UVM_IS_DEBUG() || UVM_IS_DEVELOP();
 module_param(uvm_debug_prints, int, S_IRUGO|S_IWUSR);
 MODULE_PARM_DESC(uvm_debug_prints, "Enable uvm debug prints.");

-bool uvm_debug_prints_enabled()
+bool uvm_debug_prints_enabled(void)
 {
    return uvm_debug_prints != 0;
 }
--- a/kernel-open/nvidia-uvm/uvm_gpu_access_counters.c
+++ b/kernel-open/nvidia-uvm/uvm_gpu_access_counters.c
@@ -1718,7 +1718,7 @@ bool uvm_va_space_has_access_counter_migrations(uvm_va_space_t *va_space)
    return atomic_read(&va_space_access_counters->params.enable_mimc_migrations);
 }

-NV_STATUS uvm_perf_access_counters_init()
+NV_STATUS uvm_perf_access_counters_init(void)
 {
    uvm_perf_module_init("perf_access_counters",
                         UVM_PERF_MODULE_TYPE_ACCESS_COUNTERS,
@@ -1729,7 +1729,7 @@ NV_STATUS uvm_perf_access_counters_init()
    return NV_OK;
 }

-void uvm_perf_access_counters_exit()
+void uvm_perf_access_counters_exit(void)
 {
 }

--- a/kernel-open/nvidia-uvm/uvm_lock.c
+++ b/kernel-open/nvidia-uvm/uvm_lock.c
@@ -334,7 +334,7 @@ bool __uvm_check_all_unlocked(uvm_thread_context_lock_t *uvm_context)
    return false;
 }

-bool __uvm_thread_check_all_unlocked()
+bool __uvm_thread_check_all_unlocked(void)
 {
    return __uvm_check_all_unlocked(uvm_thread_context_lock_get());
 }
--- a/kernel-open/nvidia-uvm/uvm_migrate.c
+++ b/kernel-open/nvidia-uvm/uvm_migrate.c
@@ -795,7 +795,7 @@ static NV_STATUS semaphore_release(NvU64 semaphore_address,
    return semaphore_release_from_gpu(gpu, semaphore_pool, semaphore_address, semaphore_payload, tracker_ptr);
 }

-NV_STATUS uvm_migrate_init()
+NV_STATUS uvm_migrate_init(void)
 {
    NV_STATUS status = uvm_migrate_pageable_init();
    if (status != NV_OK)
@@ -821,7 +821,7 @@ NV_STATUS uvm_migrate_init()
    return NV_OK;
 }

-void uvm_migrate_exit()
+void uvm_migrate_exit(void)
 {
    uvm_migrate_pageable_exit();
 }
--- a/kernel-open/nvidia-uvm/uvm_migrate_pageable.c
+++ b/kernel-open/nvidia-uvm/uvm_migrate_pageable.c
@@ -1001,7 +1001,7 @@ NV_STATUS uvm_migrate_pageable(uvm_migrate_args_t *uvm_migrate_args)
    return status;
 }

-NV_STATUS uvm_migrate_pageable_init()
+NV_STATUS uvm_migrate_pageable_init(void)
 {
    g_uvm_migrate_vma_state_cache = NV_KMEM_CACHE_CREATE("migrate_vma_state_t", migrate_vma_state_t);
    if (!g_uvm_migrate_vma_state_cache)
@@ -1010,7 +1010,7 @@ NV_STATUS uvm_migrate_pageable_init()
    return NV_OK;
 }

-void uvm_migrate_pageable_exit()
+void uvm_migrate_pageable_exit(void)
 {
    kmem_cache_destroy_safe(&g_uvm_migrate_vma_state_cache);
 }
--- a/kernel-open/nvidia-uvm/uvm_migrate_pageable.h
+++ b/kernel-open/nvidia-uvm/uvm_migrate_pageable.h
@@ -50,7 +50,7 @@ typedef struct
 #if defined(CONFIG_MIGRATE_VMA_HELPER)
 #define UVM_MIGRATE_VMA_SUPPORTED 1
 #else
-#if defined(CONFIG_DEVICE_PRIVATE) && defined(NV_MIGRATE_VMA_SETUP_PRESENT)
+#if NV_IS_EXPORT_SYMBOL_PRESENT_migrate_vma_setup
 #define UVM_MIGRATE_VMA_SUPPORTED 1
 #endif
 #endif
--- a/kernel-open/nvidia-uvm/uvm_mmu.c
+++ b/kernel-open/nvidia-uvm/uvm_mmu.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-    Copyright (c) 2015-2022 NVIDIA Corporation
+    Copyright (c) 2015-2023 NVIDIA Corporation

    Permission is hereby granted, free of charge, to any person obtaining a copy
    of this software and associated documentation files (the "Software"), to
@@ -102,7 +102,7 @@ static NV_STATUS phys_mem_allocate_sysmem(uvm_page_tree_t *tree, NvLength size,
    NvU64 dma_addr;
    unsigned long flags = __GFP_ZERO;
    uvm_memcg_context_t memcg_context;
-    uvm_va_space_t *va_space;
+    uvm_va_space_t *va_space = NULL;
    struct mm_struct *mm = NULL;

    if (tree->type == UVM_PAGE_TREE_TYPE_USER && tree->gpu_va_space && UVM_CGROUP_ACCOUNTING_SUPPORTED()) {
--- a/kernel-open/nvidia-uvm/uvm_perf_heuristics.c
+++ b/kernel-open/nvidia-uvm/uvm_perf_heuristics.c
@@ -28,7 +28,7 @@
 #include "uvm_gpu_access_counters.h"
 #include "uvm_va_space.h"

-NV_STATUS uvm_perf_heuristics_init()
+NV_STATUS uvm_perf_heuristics_init(void)
 {
    NV_STATUS status;

@@ -47,7 +47,7 @@ NV_STATUS uvm_perf_heuristics_init()
    return NV_OK;
 }

-void uvm_perf_heuristics_exit()
+void uvm_perf_heuristics_exit(void)
 {
    uvm_perf_access_counters_exit();
    uvm_perf_thrashing_exit();
--- a/kernel-open/nvidia-uvm/uvm_perf_prefetch.c
+++ b/kernel-open/nvidia-uvm/uvm_perf_prefetch.c
@@ -425,7 +425,7 @@ void uvm_perf_prefetch_get_hint(uvm_va_block_t *va_block,
    }
 }

-NV_STATUS uvm_perf_prefetch_init()
+NV_STATUS uvm_perf_prefetch_init(void)
 {
    g_uvm_perf_prefetch_enable = uvm_perf_prefetch_enable != 0;

--- a/kernel-open/nvidia-uvm/uvm_perf_thrashing.c
+++ b/kernel-open/nvidia-uvm/uvm_perf_thrashing.c
@@ -1943,7 +1943,7 @@ NV_STATUS uvm_perf_thrashing_register_gpu(uvm_va_space_t *va_space, uvm_gpu_t *g
    return NV_OK;
 }

-NV_STATUS uvm_perf_thrashing_init()
+NV_STATUS uvm_perf_thrashing_init(void)
 {
    NV_STATUS status;

@@ -2002,7 +2002,7 @@ error:
    return status;
 }

-void uvm_perf_thrashing_exit()
+void uvm_perf_thrashing_exit(void)
 {
    cpu_thrashing_stats_exit();

--- a/kernel-open/nvidia-uvm/uvm_procfs.c
+++ b/kernel-open/nvidia-uvm/uvm_procfs.c
@@ -46,7 +46,7 @@ static struct proc_dir_entry *uvm_proc_dir;
 static struct proc_dir_entry *uvm_proc_gpus;
 static struct proc_dir_entry *uvm_proc_cpu;

-NV_STATUS uvm_procfs_init()
+NV_STATUS uvm_procfs_init(void)
 {
    if (!uvm_procfs_is_enabled())
        return NV_OK;
@@ -66,17 +66,17 @@ NV_STATUS uvm_procfs_init()
    return NV_OK;
 }

-void uvm_procfs_exit()
+void uvm_procfs_exit(void)
 {
    proc_remove(uvm_proc_dir);
 }

-struct proc_dir_entry *uvm_procfs_get_gpu_base_dir()
+struct proc_dir_entry *uvm_procfs_get_gpu_base_dir(void)
 {
    return uvm_proc_gpus;
 }

-struct proc_dir_entry *uvm_procfs_get_cpu_base_dir()
+struct proc_dir_entry *uvm_procfs_get_cpu_base_dir(void)
 {
    return uvm_proc_cpu;
 }
--- a/kernel-open/nvidia-uvm/uvm_push.c
+++ b/kernel-open/nvidia-uvm/uvm_push.c
@@ -289,12 +289,12 @@ NV_STATUS __uvm_push_begin_acquire_on_reserved_channel_with_info(uvm_channel_t *
    return status;
 }

-bool uvm_push_info_is_tracking_descriptions()
+bool uvm_push_info_is_tracking_descriptions(void)
 {
    return uvm_debug_enable_push_desc != 0;
 }

-bool uvm_push_info_is_tracking_acquires()
+bool uvm_push_info_is_tracking_acquires(void)
 {
    return uvm_debug_enable_push_acquire_info != 0;
 }
--- a/kernel-open/nvidia-uvm/uvm_thread_context.c
+++ b/kernel-open/nvidia-uvm/uvm_thread_context.c
@@ -101,7 +101,7 @@ static DEFINE_PER_CPU(uvm_thread_context_lock_acquired_t, interrupt_thread_conte
 static void thread_context_non_interrupt_remove(uvm_thread_context_t *thread_context,
                                                uvm_thread_context_table_entry_t *thread_context_entry);

-bool uvm_thread_context_wrapper_is_used()
+bool uvm_thread_context_wrapper_is_used(void)
 {
    // The wrapper contains lock information. While uvm_record_lock_X
    // routines are a no-op outside of debug mode, unit tests do invoke their
--- a/kernel-open/nvidia-uvm/uvm_tools.c
+++ b/kernel-open/nvidia-uvm/uvm_tools.c
@@ -2204,7 +2204,7 @@ NV_STATUS uvm_api_tools_get_processor_uuid_table(UVM_TOOLS_GET_PROCESSOR_UUID_TA
    return NV_OK;
 }

-void uvm_tools_flush_events()
+void uvm_tools_flush_events(void)
 {
    tools_schedule_completed_events();

--- a/kernel-open/nvidia-uvm/uvm_va_policy.h
+++ b/kernel-open/nvidia-uvm/uvm_va_policy.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-    Copyright (c) 2022 NVIDIA Corporation
+    Copyright (c) 2022-2023 NVIDIA Corporation

    Permission is hereby granted, free of charge, to any person obtaining a copy
    of this software and associated documentation files (the "Software"), to
@@ -53,7 +53,7 @@ typedef enum
 // The VA range is determined from either the uvm_va_range_t for managed
 // allocations or the uvm_va_policy_node_t for HMM allocations.
 //
-typedef struct uvm_va_policy_struct
+struct uvm_va_policy_struct
 {
    // Read duplication policy for this VA range (unset, enabled, or disabled).
    uvm_read_duplication_policy_t read_duplication;
@@ -66,7 +66,7 @@ typedef struct uvm_va_policy_struct
    // their page tables updated to access the (possibly remote) pages.
    uvm_processor_mask_t accessed_by;

-} uvm_va_policy_t;
+};

 // Policy nodes are used for storing policies in HMM va_blocks.
 // The va_block lock protects the tree so that invalidation callbacks can
--- a/kernel-open/nvidia/i2c_nvswitch.c
+++ b/kernel-open/nvidia/i2c_nvswitch.c
@@ -288,8 +288,9 @@ nvswitch_i2c_add_adapter

    rc = nvswitch_os_snprintf(adapter->name,
                              sizeof(adapter->name),
-                              "NVIDIA NVSwitch i2c adapter %u at %x:%02x.%u",
+                              "NVIDIA NVSwitch i2c adapter %u at %04x:%x:%02x.%u",
                              port,
+                              NV_PCI_DOMAIN_NUMBER(pci_dev),
                              NV_PCI_BUS_NUMBER(pci_dev),
                              NV_PCI_SLOT_NUMBER(pci_dev),
                              PCI_FUNC(pci_dev->devfn));
--- a/kernel-open/nvidia/nv-mmap.c
+++ b/kernel-open/nvidia/nv-mmap.c
@@ -452,7 +452,7 @@ static int nvidia_mmap_numa(
    }

    // Needed for the linux kernel for mapping compound pages
-    vma->vm_flags |= VM_MIXEDMAP;
+    nv_vm_flags_set(vma, VM_MIXEDMAP);

    for (i = 0, addr = mmap_context->page_array[0]; i < pages;
         addr = mmap_context->page_array[++i], start += PAGE_SIZE)
@@ -596,7 +596,7 @@ int nvidia_mmap_helper(
        }
        up(&nvl->mmap_lock);

-        vma->vm_flags |= VM_IO | VM_PFNMAP | VM_DONTEXPAND;
+        nv_vm_flags_set(vma, VM_IO | VM_PFNMAP | VM_DONTEXPAND);
    }
    else
    {
@@ -663,15 +663,15 @@ int nvidia_mmap_helper(

        NV_PRINT_AT(NV_DBG_MEMINFO, at);

-        vma->vm_flags |= (VM_IO | VM_LOCKED | VM_RESERVED);
-        vma->vm_flags |= (VM_DONTEXPAND | VM_DONTDUMP);
+        nv_vm_flags_set(vma, VM_IO | VM_LOCKED | VM_RESERVED);
+        nv_vm_flags_set(vma, VM_DONTEXPAND | VM_DONTDUMP);
    }

    if ((prot & NV_PROTECT_WRITEABLE) == 0)
    {
        vma->vm_page_prot = NV_PGPROT_READ_ONLY(vma->vm_page_prot);
-        vma->vm_flags &= ~VM_WRITE;
-        vma->vm_flags &= ~VM_MAYWRITE;
+        nv_vm_flags_clear(vma, VM_WRITE);
+        nv_vm_flags_clear(vma, VM_MAYWRITE);
    }

    vma->vm_ops = &nv_vm_ops;
--- a/kernel-open/nvidia/nv-nano-timer.c
+++ b/kernel-open/nvidia/nv-nano-timer.c
@@ -213,7 +213,7 @@ void NV_API_CALL nv_cancel_nano_timer(
 #if NV_NANO_TIMER_USE_HRTIMER
    hrtimer_cancel(&nv_nstimer->hr_timer);
 #else
-    del_timer(&nv_nstimer->jiffy_timer);
+    del_timer_sync(&nv_nstimer->jiffy_timer);
 #endif

 }
--- a/kernel-open/nvidia/nv-p2p.c
+++ b/kernel-open/nvidia/nv-p2p.c
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2011-2019 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2011-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -31,6 +31,11 @@
 #include "nv-p2p.h"
 #include "rmp2pdefines.h"

+typedef enum nv_p2p_page_table_type {
+    NV_P2P_PAGE_TABLE_TYPE_NON_PERSISTENT = 0,
+    NV_P2P_PAGE_TABLE_TYPE_PERSISTENT,
+} nv_p2p_page_table_type_t;
+
 typedef struct nv_p2p_dma_mapping {
    struct list_head list_node;
    struct nvidia_p2p_dma_mapping *dma_mapping;
@@ -44,13 +49,9 @@ typedef struct nv_p2p_mem_info {
        struct list_head list_head;
        struct semaphore lock;
    } dma_mapping_list;
-    NvBool bPersistent;
    void *private;
 } nv_p2p_mem_info_t;

-int nvidia_p2p_cap_persistent_pages = 1;
-EXPORT_SYMBOL(nvidia_p2p_cap_persistent_pages);
-
 // declared and created in nv.c
 extern void *nvidia_p2p_page_t_cache;

@@ -238,6 +239,7 @@ static void nv_p2p_free_page_table(
 }

 static NV_STATUS nv_p2p_put_pages(
+    nv_p2p_page_table_type_t pt_type,
    nvidia_stack_t * sp,
    uint64_t p2p_token,
    uint32_t va_space,
@@ -246,9 +248,6 @@ static NV_STATUS nv_p2p_put_pages(
 )
 {
    NV_STATUS status;
-    struct nv_p2p_mem_info *mem_info = NULL;
-
-    mem_info = container_of(*page_table, nv_p2p_mem_info_t, page_table);

    /*
     * rm_p2p_put_pages returns NV_OK if the page_table was found and
@@ -258,8 +257,15 @@ static NV_STATUS nv_p2p_put_pages(
     * rm_p2p_put_pages returns NV_ERR_OBJECT_NOT_FOUND if the page_table
     * was already unlinked.
     */
-    if (mem_info->bPersistent)
+    if (pt_type == NV_P2P_PAGE_TABLE_TYPE_PERSISTENT)
    {
+        struct nv_p2p_mem_info *mem_info = NULL;
+
+        /*
+         * It is safe to access persistent page_table as there is no async
+         * callback which can free it unlike non-persistent page_table.
+         */
+        mem_info = container_of(*page_table, nv_p2p_mem_info_t, page_table);
        status = rm_p2p_put_pages_persistent(sp, mem_info->private, *page_table);
    }
    else
@@ -273,7 +279,8 @@ static NV_STATUS nv_p2p_put_pages(
        nv_p2p_free_page_table(*page_table);
        *page_table = NULL;
    }
-    else if (!mem_info->bPersistent && (status == NV_ERR_OBJECT_NOT_FOUND))
+    else if ((pt_type == NV_P2P_PAGE_TABLE_TYPE_NON_PERSISTENT) &&
+             (status == NV_ERR_OBJECT_NOT_FOUND))
    {
        status = NV_OK;
        *page_table = NULL;
@@ -327,7 +334,8 @@ static void nv_p2p_mem_info_free_callback(void *data)
    nv_p2p_free_platform_data(&mem_info->page_table);
 }

-int nvidia_p2p_get_pages(
+static int nv_p2p_get_pages(
+    nv_p2p_page_table_type_t pt_type,
    uint64_t p2p_token,
    uint32_t va_space,
    uint64_t virtual_address,
@@ -376,9 +384,10 @@ int nvidia_p2p_get_pages(

    *page_table = &(mem_info->page_table);

-    mem_info->bPersistent = (free_callback == NULL);
-
-    //asign length to temporary variable since do_div macro does in-place division
+    /*
+     * assign length to temporary variable since do_div macro does in-place
+     * division
+     */
    temp_length = length;
    do_div(temp_length, page_size);
    page_count = temp_length;
@@ -405,7 +414,7 @@ int nvidia_p2p_get_pages(
        goto failed;
    }

-    if (mem_info->bPersistent)
+    if (pt_type == NV_P2P_PAGE_TABLE_TYPE_PERSISTENT)
    {
        void *gpu_info = NULL;

@@ -415,12 +424,15 @@ int nvidia_p2p_get_pages(
            goto failed;
        }

-        status = rm_p2p_get_gpu_info(sp, virtual_address, length, &gpu_uuid, &gpu_info);
+        status = rm_p2p_get_gpu_info(sp, virtual_address, length,
+                                     &gpu_uuid, &gpu_info);
        if (status != NV_OK)
        {
            goto failed;
        }

+        (*page_table)->gpu_uuid = gpu_uuid;
+
        rc = nvidia_dev_get_uuid(gpu_uuid, sp);
        if (rc != 0)
        {
@@ -432,8 +444,10 @@ int nvidia_p2p_get_pages(

        bGetUuid = NV_TRUE;

-        status = rm_p2p_get_pages_persistent(sp, virtual_address, length, &mem_info->private,
-                                             physical_addresses, &entries, *page_table, gpu_info);
+        status = rm_p2p_get_pages_persistent(sp, virtual_address, length,
+                                             &mem_info->private,
+                                             physical_addresses, &entries,
+                                             *page_table, gpu_info);
        if (status != NV_OK)
        {
            goto failed;
@@ -449,10 +463,11 @@ int nvidia_p2p_get_pages(
        {
            goto failed;
        }
+
+        (*page_table)->gpu_uuid = gpu_uuid;
    }

    bGetPages = NV_TRUE;
-    (*page_table)->gpu_uuid = gpu_uuid;

    status = os_alloc_mem((void *)&(*page_table)->pages,
             (entries * sizeof(page)));
@@ -491,8 +506,13 @@ int nvidia_p2p_get_pages(
    (*page_table)->page_size = page_size_index;

    os_free_mem(physical_addresses);
+    physical_addresses = NULL;
+
    os_free_mem(wreqmb_h);
+    wreqmb_h = NULL;
+
    os_free_mem(rreqmb_h);
+    rreqmb_h = NULL;

    if (free_callback != NULL)
    {
@@ -516,10 +536,12 @@ failed:
    {
        os_free_mem(physical_addresses);
    }
+
    if (wreqmb_h != NULL)
    {
        os_free_mem(wreqmb_h);
    }
+
    if (rreqmb_h != NULL)
    {
        os_free_mem(rreqmb_h);
@@ -527,7 +549,7 @@ failed:

    if (bGetPages)
    {
-        (void)nv_p2p_put_pages(sp, p2p_token, va_space,
+        (void)nv_p2p_put_pages(pt_type, sp, p2p_token, va_space,
                               virtual_address, page_table);
    }

@@ -546,8 +568,45 @@ failed:
    return nvidia_p2p_map_status(status);
 }

+int nvidia_p2p_get_pages(
+    uint64_t p2p_token,
+    uint32_t va_space,
+    uint64_t virtual_address,
+    uint64_t length,
+    struct nvidia_p2p_page_table **page_table,
+    void (*free_callback)(void * data),
+    void *data
+)
+{
+    if (free_callback == NULL)
+    {
+        return -EINVAL;
+    }
+
+    return nv_p2p_get_pages(NV_P2P_PAGE_TABLE_TYPE_NON_PERSISTENT,
+                            p2p_token, va_space, virtual_address,
+                            length, page_table, free_callback, data);
+}
 EXPORT_SYMBOL(nvidia_p2p_get_pages);

+int nvidia_p2p_get_pages_persistent(
+    uint64_t virtual_address,
+    uint64_t length,
+    struct nvidia_p2p_page_table **page_table,
+    uint32_t flags
+)
+{
+    if (flags != 0)
+    {
+        return -EINVAL;
+    }
+
+    return nv_p2p_get_pages(NV_P2P_PAGE_TABLE_TYPE_PERSISTENT, 0, 0,
+                            virtual_address, length, page_table,
+                            NULL, NULL);
+}
+EXPORT_SYMBOL(nvidia_p2p_get_pages_persistent);
+
 /*
 * This function is a no-op, but is left in place (for now), in order to allow
 * third-party callers to build and run without errors or warnings. This is OK,
@@ -568,15 +627,14 @@ int nvidia_p2p_put_pages(
    struct nvidia_p2p_page_table *page_table
 )
 {
-    struct nv_p2p_mem_info *mem_info = NULL;
-    NvU8 uuid[NVIDIA_P2P_GPU_UUID_LEN] = {0};
    NV_STATUS status;
    nvidia_stack_t *sp = NULL;
    int rc = 0;

-    os_mem_copy(uuid, page_table->gpu_uuid, NVIDIA_P2P_GPU_UUID_LEN);
-
-    mem_info = container_of(page_table, nv_p2p_mem_info_t, page_table);
+    if (page_table == NULL)
+    {
+        return 0;
+    }

    rc = nv_kmem_cache_alloc_stack(&sp);
    if (rc != 0)
@@ -584,21 +642,56 @@ int nvidia_p2p_put_pages(
        return -ENOMEM;
    }

-    status = nv_p2p_put_pages(sp, p2p_token, va_space,
+    status = nv_p2p_put_pages(NV_P2P_PAGE_TABLE_TYPE_NON_PERSISTENT,
+                              sp, p2p_token, va_space,
                              virtual_address, &page_table);

-    if (mem_info->bPersistent)
-    {
-        nvidia_dev_put_uuid(uuid, sp);
-    }
-
    nv_kmem_cache_free_stack(sp);

    return nvidia_p2p_map_status(status);
 }
-
 EXPORT_SYMBOL(nvidia_p2p_put_pages);

+int nvidia_p2p_put_pages_persistent(
+    uint64_t virtual_address,
+    struct nvidia_p2p_page_table *page_table,
+    uint32_t flags
+)
+{
+    NvU8 uuid[NVIDIA_P2P_GPU_UUID_LEN] = {0};
+    NV_STATUS status;
+    nvidia_stack_t *sp = NULL;
+    int rc = 0;
+
+    if (flags != 0)
+    {
+        return -EINVAL;
+    }
+
+    if (page_table == NULL)
+    {
+        return 0;
+    }
+
+    rc = nv_kmem_cache_alloc_stack(&sp);
+    if (rc != 0)
+    {
+        return -ENOMEM;
+    }
+
+    os_mem_copy(uuid, page_table->gpu_uuid, NVIDIA_P2P_GPU_UUID_LEN);
+
+    status = nv_p2p_put_pages(NV_P2P_PAGE_TABLE_TYPE_PERSISTENT,
+                              sp, 0, 0, virtual_address, &page_table);
+
+    nvidia_dev_put_uuid(uuid, sp);
+
+    nv_kmem_cache_free_stack(sp);
+
+    return nvidia_p2p_map_status(status);
+}
+EXPORT_SYMBOL(nvidia_p2p_put_pages_persistent);
+
 int nvidia_p2p_dma_map_pages(
    struct pci_dev *peer,
    struct nvidia_p2p_page_table *page_table,
--- a/kernel-open/nvidia/nv-p2p.h
+++ b/kernel-open/nvidia/nv-p2p.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2011-2016 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2011-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -94,11 +94,10 @@ struct nvidia_p2p_params {
 } nvidia_p2p_params_t;

 /*
- * Capability flag for users to detect
+ * Macro for users to detect
 * driver support for persistent pages.
 */
-extern int nvidia_p2p_cap_persistent_pages;
-#define NVIDIA_P2P_CAP_PERSISTENT_PAGES
+#define NVIDIA_P2P_CAP_GET_PAGES_PERSISTENT_API

 /*
 * This API is not supported.
@@ -173,11 +172,6 @@ struct nvidia_p2p_page_table {
 *   A pointer to the function to be invoked when the pages
 *   underlying the virtual address range are freed
 *   implicitly.
- *   If NULL, persistent pages will be returned.
- *   This means the pages underlying the range of GPU virtual memory
- *   will persist until explicitly freed by nvidia_p2p_put_pages().
- *   Persistent GPU memory mappings are not supported on PowerPC,
- *   MIG-enabled devices and vGPU.
 * @param[in]     data
 *   A non-NULL opaque pointer to private data to be passed to the
 *   callback function.
@@ -190,12 +184,48 @@ struct nvidia_p2p_page_table {
 *     insufficient resources were available to complete the operation.
 *   -EIO         if an unknown error occurred.
 */
-int nvidia_p2p_get_pages(uint64_t p2p_token, uint32_t va_space,
-        uint64_t virtual_address,
+int nvidia_p2p_get_pages( uint64_t p2p_token, uint32_t va_space,
+        uint64_t virtual_address, uint64_t length,
+        struct nvidia_p2p_page_table **page_table,
+        void (*free_callback)(void *data), void *data);
+
+/*
+ * @brief
+ *   Pin and make the pages underlying a range of GPU virtual memory
+ *   accessible to a third-party device. The pages will persist until
+ *   explicitly freed by nvidia_p2p_put_pages_persistent().
+ *
+ *   Persistent GPU memory mappings are not supported on PowerPC,
+ *   MIG-enabled devices and vGPU.
+ *
+ *   This API only supports pinned, GPU-resident memory, such as that provided
+ *   by cudaMalloc().
+ *
+ *   This API may sleep.
+ *
+ * @param[in]     virtual_address
+ *   The start address in the specified virtual address space.
+ *   Address must be aligned to the 64KB boundary.
+ * @param[in]     length
+ *   The length of the requested P2P mapping.
+ *   Length must be a multiple of 64KB.
+ * @param[out]    page_table
+ *   A pointer to an array of structures with P2P PTEs.
+ * @param[in]     flags
+ *   Must be set to zero for now.
+ *
+ * @return
+ *    0           upon successful completion.
+ *   -EINVAL      if an invalid argument was supplied.
+ *   -ENOTSUPP    if the requested operation is not supported.
+ *   -ENOMEM      if the driver failed to allocate memory or if
+ *     insufficient resources were available to complete the operation.
+ *   -EIO         if an unknown error occurred.
+ */
+int nvidia_p2p_get_pages_persistent(uint64_t virtual_address,
        uint64_t length,
        struct nvidia_p2p_page_table **page_table,
-        void (*free_callback)(void *data),
-        void *data);
+        uint32_t flags);

 #define NVIDIA_P2P_DMA_MAPPING_VERSION   0x00020003

@@ -268,6 +298,8 @@ int nvidia_p2p_dma_unmap_pages(struct pci_dev *peer,
 *   Release a set of pages previously made accessible to
 *   a third-party device.
 *
+ *   This API may sleep.
+ *
 * @param[in]     p2p_token
 *   A token that uniquely identifies the P2P mapping.
 * @param[in]     va_space
@@ -282,10 +314,33 @@ int nvidia_p2p_dma_unmap_pages(struct pci_dev *peer,
 *   -EINVAL      if an invalid argument was supplied.
 *   -EIO         if an unknown error occurred.
 */
-int nvidia_p2p_put_pages(uint64_t p2p_token, uint32_t va_space,
-        uint64_t virtual_address,
+int nvidia_p2p_put_pages(uint64_t p2p_token,
+        uint32_t va_space, uint64_t virtual_address,
        struct nvidia_p2p_page_table *page_table);

+/*
+ * @brief
+ *   Release a set of persistent pages previously made accessible to
+ *   a third-party device.
+ *
+ *   This API may sleep.
+ *
+ * @param[in]     virtual_address
+ *   The start address in the specified virtual address space.
+ * @param[in]     page_table
+ *   A pointer to the array of structures with P2P PTEs.
+ * @param[in]     flags
+ *   Must be set to zero for now.
+ *
+ * @return
+ *    0           upon successful completion.
+ *   -EINVAL      if an invalid argument was supplied.
+ *   -EIO         if an unknown error occurred.
+ */
+int nvidia_p2p_put_pages_persistent(uint64_t virtual_address,
+        struct nvidia_p2p_page_table *page_table,
+        uint32_t flags);
+
 /*
 * @brief
 *    Free a third-party P2P page table. (This function is a no-op.)
--- a/kernel-open/nvidia/nv.c
+++ b/kernel-open/nvidia/nv.c
@@ -165,7 +165,7 @@ NvBool nv_ats_supported = NVCPU_IS_PPC64LE
 /* nvos_ functions.. do not take a state device parameter  */
 static int      nvos_count_devices(void);

-static nv_alloc_t  *nvos_create_alloc(struct device *, int);
+static nv_alloc_t  *nvos_create_alloc(struct device *, NvU64);
 static int          nvos_free_alloc(nv_alloc_t *);

 /***
@@ -280,11 +280,12 @@ void nv_sev_init(
 static
 nv_alloc_t *nvos_create_alloc(
    struct device *dev,
-    int num_pages
+    NvU64          num_pages
 )
 {
-    nv_alloc_t *at;
-    unsigned int pt_size, i;
+    nv_alloc_t  *at;
+    NvU64        pt_size;
+    unsigned int i;

    NV_KZALLOC(at, sizeof(nv_alloc_t));
    if (at == NULL)
@@ -295,6 +296,24 @@ nv_alloc_t *nvos_create_alloc(

    at->dev = dev;
    pt_size = num_pages *  sizeof(nvidia_pte_t *);
+    //
+    // Check for multiplication overflow and check whether num_pages value can fit in at->num_pages.
+    //
+    if ((num_pages != 0) && ((pt_size / num_pages) != sizeof(nvidia_pte_t*)))
+    {
+        nv_printf(NV_DBG_ERRORS, "NVRM: Invalid page table allocation - Number of pages exceeds max value.\n");
+        NV_KFREE(at, sizeof(nv_alloc_t));
+        return NULL;
+    }
+
+    at->num_pages = num_pages;
+    if (at->num_pages != num_pages)
+    {
+        nv_printf(NV_DBG_ERRORS, "NVRM: Invalid page table allocation - requested size overflows.\n");
+        NV_KFREE(at, sizeof(nv_alloc_t));
+        return NULL;
+    }
+
    if (os_alloc_mem((void **)&at->page_table, pt_size) != NV_OK)
    {
        nv_printf(NV_DBG_ERRORS, "NVRM: failed to allocate page table\n");
@@ -303,7 +322,6 @@ nv_alloc_t *nvos_create_alloc(
    }

    memset(at->page_table, 0, pt_size);
-    at->num_pages = num_pages;
    NV_ATOMIC_SET(at->usage_count, 0);

    for (i = 0; i < at->num_pages; i++)
@@ -4487,19 +4505,19 @@ NvU64 NV_API_CALL nv_get_dma_start_address(
     * as the starting address for all DMA mappings.
     */
    saved_dma_mask = pci_dev->dma_mask;
-    if (pci_set_dma_mask(pci_dev, DMA_BIT_MASK(64)) != 0)
+    if (dma_set_mask(&pci_dev->dev, DMA_BIT_MASK(64)) != 0)
    {
        goto done;
    }

-    dma_addr = pci_map_single(pci_dev, NULL, 1, DMA_BIDIRECTIONAL);
-    if (pci_dma_mapping_error(pci_dev, dma_addr))
+    dma_addr = dma_map_single(&pci_dev->dev, NULL, 1, DMA_BIDIRECTIONAL);
+    if (dma_mapping_error(&pci_dev->dev, dma_addr))
    {
-        pci_set_dma_mask(pci_dev, saved_dma_mask);
+        dma_set_mask(&pci_dev->dev, saved_dma_mask);
        goto done;
    }

-    pci_unmap_single(pci_dev, dma_addr, 1, DMA_BIDIRECTIONAL);
+    dma_unmap_single(&pci_dev->dev, dma_addr, 1, DMA_BIDIRECTIONAL);

    /*
     * From IBM: "For IODA2, native DMA bypass or KVM TCE-based implementation
@@ -4531,7 +4549,7 @@ NvU64 NV_API_CALL nv_get_dma_start_address(
         */
        nv_printf(NV_DBG_WARNINGS,
            "NVRM: DMA window limited by platform\n");
-        pci_set_dma_mask(pci_dev, saved_dma_mask);
+        dma_set_mask(&pci_dev->dev, saved_dma_mask);
        goto done;
    }
    else if ((dma_addr & saved_dma_mask) != 0)
@@ -4550,7 +4568,7 @@ NvU64 NV_API_CALL nv_get_dma_start_address(
             */
            nv_printf(NV_DBG_WARNINGS,
                "NVRM: DMA window limited by memory size\n");
-            pci_set_dma_mask(pci_dev, saved_dma_mask);
+            dma_set_mask(&pci_dev->dev, saved_dma_mask);
            goto done;
        }
    }
--- a/kernel-open/nvidia/nvidia.Kbuild
+++ b/kernel-open/nvidia/nvidia.Kbuild
@@ -230,6 +230,7 @@ NV_CONFTEST_TYPE_COMPILE_TESTS += remove_memory_has_nid_arg
 NV_CONFTEST_TYPE_COMPILE_TESTS += add_memory_driver_managed_has_mhp_flags_arg
 NV_CONFTEST_TYPE_COMPILE_TESTS += num_registered_fb
 NV_CONFTEST_TYPE_COMPILE_TESTS += pci_driver_has_driver_managed_dma
+NV_CONFTEST_TYPE_COMPILE_TESTS += vm_area_struct_has_const_vm_flags

 NV_CONFTEST_GENERIC_COMPILE_TESTS += dom0_kernel_present
 NV_CONFTEST_GENERIC_COMPILE_TESTS += nvidia_vgpu_kvm_build
--- a/kernel-open/nvidia/nvlink_export.h
+++ b/kernel-open/nvidia/nvlink_export.h
@@ -46,6 +46,11 @@ NvlStatus nvlink_lib_unload(void);
 */
 NvlStatus nvlink_lib_ioctl_ctrl(nvlink_ioctrl_params *ctrl_params);

+/*
+* Gets number of devices with type deviceType
+*/
+NvlStatus nvlink_lib_return_device_count_by_type(NvU32 deviceType, NvU32 *numDevices);
+
 #ifdef __cplusplus
 }
 #endif
--- a/kernel-open/nvidia/nvlink_linux.c
+++ b/kernel-open/nvidia/nvlink_linux.c
@@ -560,7 +560,7 @@ void nvlink_assert(int cond)
    }
 }

-void * nvlink_allocLock()
+void * nvlink_allocLock(void)
 {
    struct semaphore *sema;

--- a/kernel-open/nvidia/nvlink_os.h
+++ b/kernel-open/nvidia/nvlink_os.h
@@ -30,6 +30,9 @@ extern "C" {

 #include "nvlink_common.h"

+#define TOP_LEVEL_LOCKING_DISABLED 1 
+#define PER_LINK_LOCKING_DISABLED 1 
+
 #define NVLINK_FREE(x) nvlink_free((void *)x)

 // Memory management functions
--- a/kernel-open/nvidia/os-interface.c
+++ b/kernel-open/nvidia/os-interface.c
@@ -1170,14 +1170,14 @@ void NV_API_CALL os_dbg_breakpoint(void)
 #endif // CONFIG_X86_REMOTE_DEBUG || CONFIG_KGDB || CONFIG_XMON
 }

-NvU32 NV_API_CALL os_get_cpu_number()
+NvU32 NV_API_CALL os_get_cpu_number(void)
 {
    NvU32 cpu_id = get_cpu();
    put_cpu();
    return cpu_id;
 }

-NvU32 NV_API_CALL os_get_cpu_count()
+NvU32 NV_API_CALL os_get_cpu_count(void)
 {
    return NV_NUM_CPUS();
 }
@@ -1273,7 +1273,7 @@ void NV_API_CALL os_get_screen_info(
 #endif
 }

-void NV_API_CALL os_dump_stack()
+void NV_API_CALL os_dump_stack(void)
 {
    dump_stack();
 }
--- a/src/common/displayport/inc/dp_configcaps.h
+++ b/src/common/displayport/inc/dp_configcaps.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -245,6 +245,7 @@ namespace DisplayPort
    public:
        virtual bool             getOuiSupported() = 0;
        virtual AuxRetry::status setOuiSource(unsigned ouiId, const char * model, size_t modelNameLength, NvU8 chipRevision) = 0;
+        virtual bool             getOuiSource(unsigned &ouiId, char * modelName, size_t modelNameBufferSize, NvU8 & chipRevision) = 0;
        virtual bool             getOuiSink(unsigned &ouiId, char * modelName, size_t modelNameBufferSize, NvU8 & chipRevision) = 0;
    };

--- a/src/common/displayport/inc/dp_connector.h
+++ b/src/common/displayport/inc/dp_connector.h
@@ -213,6 +213,10 @@ namespace DisplayPort

        virtual NvBool isDSCSupported() = 0;

+        virtual NvBool isDSCDecompressionSupported() = 0;
+
+        virtual NvBool isDSCPassThroughSupported() = 0;
+
        virtual DscCaps getDscCaps() = 0;

        //
--- a/src/common/displayport/inc/dp_connectorimpl.h
+++ b/src/common/displayport/inc/dp_connectorimpl.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -89,6 +89,11 @@ namespace DisplayPort
        Timer * timer;                          // OS provided timer services
        Connector::EventSink * sink;            // Event Sink

+        // Cached Source OUI for restoring eDP OUI when powering up
+        unsigned cachedSourceOUI;
+        char     cachedSourceModelName[NV_DPCD_SOURCE_DEV_ID_STRING__SIZE + 1];
+        NvU8     cachedSourceChipRevision;
+
        unsigned ouiId;                                             // Sink ouiId
        char modelName[NV_DPCD_SOURCE_DEV_ID_STRING__SIZE + 1];     // Device Model-name
        bool    bIgnoreSrcOuiHandshake;                             // Skip writing source OUI
@@ -120,6 +125,7 @@ namespace DisplayPort
        bool    bPConConnected;                 // HDMI2.1-Protocol Converter (Support SRC control mode) connected.
        bool    bSkipAssessLinkForPCon;         // Skip assessLink() for PCON. DD will call assessFRLLink later.
        bool    bHdcpAuthOnlyOnDemand;          // True if only initiate Hdcp authentication on demand and MST won't auto-trigger authenticate at device attach.
+        bool    bReassessMaxLink;               // Retry assessLink() if the first assessed link config is lower than the panel max config.

        bool    constructorFailed;

@@ -294,6 +300,8 @@ namespace DisplayPort
        bool        bEnableFastLT;
        NvU32       maxLinkRateFromRegkey;

+        bool        bEnableOuiRestoring;
+
        //
        // Latency(ms) to apply between link-train and FEC enable for bug
        // 2561206.
@@ -322,6 +330,20 @@ namespace DisplayPort
        //
        bool        bDscCapBasedOnParent;

+        //
+        // MST device connnected to dock may issue IRQ for link lost.
+        // Send PowerDown path msg to suppress that.
+        //
+        bool        bPowerDownPhyBeforeD3;
+
+        //
+        // Reset the MSTM_CTRL registers on Synaptics branch device irrespective of
+        // IRQ VECTOR register having stale message. Synaptics device needs to reset
+        // the topology before issue of new LAM message if previous LAM was not finished
+        // bug 3928070
+        //
+        bool bForceClearPendingMsg;
+
        void sharedInit();
        ConnectorImpl(MainLink * main, AuxBus * auxBus, Timer * timer, Connector::EventSink * sink);

--- a/src/common/displayport/inc/dp_deviceimpl.h
+++ b/src/common/displayport/inc/dp_deviceimpl.h
@@ -447,6 +447,7 @@ namespace DisplayPort
        bool getFECSupport();
        NvBool isDSCPassThroughSupported();
        NvBool isDSCSupported();
+        NvBool isDSCDecompressionSupported();
        NvBool isDSCPossible();
        bool isFECSupported();
        bool readAndParseDSCCaps();
--- a/src/common/displayport/inc/dp_discovery.h
+++ b/src/common/displayport/inc/dp_discovery.h
@@ -57,7 +57,7 @@ namespace DisplayPort
            bool        videoSink;          // Should be true when a video sink is supported
            NvU64       maxTmdsClkRate;

-            Device():peerDevice(None),SDPStreams(0),SDPStreamSinks(0),dirty(false),videoSink(false)
+            Device():peerDevice(None),SDPStreams(0),SDPStreamSinks(0),dirty(false),videoSink(false),maxTmdsClkRate(0)
            {
                portMap.validMap = portMap.inputMap = portMap.internalMap = 0;
            }
--- a/src/common/displayport/inc/dp_evoadapter.h
+++ b/src/common/displayport/inc/dp_evoadapter.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -160,6 +160,7 @@ namespace DisplayPort
        bool _applyLinkBwOverrideWarRegVal;
        bool _isDynamicMuxCapable;
        bool _enableMSAOverrideOverMST;
+        bool _enableFecCheckForDDS;

        bool _isLTPhyRepeaterSupported;
        //
--- a/src/common/displayport/inc/dp_linkconfig.h
+++ b/src/common/displayport/inc/dp_linkconfig.h
@@ -385,6 +385,11 @@ namespace DisplayPort
        void pbnRequired(const ModesetInfo & modesetInfo, unsigned & base_pbn, unsigned & slots, unsigned & slots_pbn)
        {
            base_pbn = pbnForMode(modesetInfo);
+            if (bEnableFEC)
+            {
+                // IF FEC is enabled, we need to consider 3% overhead as per DP1.4 spec.
+                base_pbn = (NvU32)(divide_ceil(base_pbn * 100, 97));
+            }
            slots = slotsForPBN(base_pbn);
            slots_pbn = PBNForSlots(slots);
        }
--- a/src/common/displayport/inc/dp_regkeydatabase.h
+++ b/src/common/displayport/inc/dp_regkeydatabase.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -59,12 +59,28 @@

 #define NV_DP_REGKEY_FORCE_EDP_ILR                    "DP_BYPASS_EDP_ILR_REV_CHECK"

+// Regkey to enable OUI caching/restoring in release branch.
+#define NV_DP_REGKEY_ENABLE_OUI_RESTORING             "DP_ENABLE_OUI_RESTORING"
+
+// Regkey to make sure enable FEC only when RM notified sink successfully
+#define NV_DP_CHECK_FEC_FOR_DDS_DSC_PANEL             "DP_DDS_CHECK_FEC_TO_ENABLE"
+
+// Message to power down video stream before power down link (set D3)
+#define NV_DP_REGKEY_POWER_DOWN_PHY                   "DP_POWER_DOWN_PHY"
+
+//
+// Regkey to re-assess max link if the first assessed link config 
+// is lower than the panel max
+//
+#define NV_DP_REGKEY_REASSESS_MAX_LINK                "DP_REASSESS_MAX_LINK"
+
 //
 // DSC capability of downstream device should be decided based on device's own
 // and its parent's DSC capability.
 //
 #define NV_DP_DSC_MST_CAP_BUG_3143315                  "DP_DSC_MST_CAP_BUG_3143315"

+
 //
 // Data Base used to store all the regkey values.
 // The actual data base is declared statically in dp_evoadapter.cpp.
@@ -96,6 +112,10 @@ struct DP_REGKEY_DATABASE
    bool  bOptLinkKeptAliveSst;
    bool  bBypassEDPRevCheck;
    bool  bDscMstCapBug3143315;
+    bool  bEnableOuiRestoring;
+    bool  bPowerDownPhyBeforeD3;
+    bool  bCheckFECForDynamicMuxDSCPanel;
+    bool  bReassessMaxLink;
 };

 #endif //INCLUDED_DP_REGKEYDATABASE_H
--- a/src/common/displayport/src/dp_configcaps.cpp
+++ b/src/common/displayport/src/dp_configcaps.cpp
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -830,6 +830,7 @@ struct DPCDHALImpl : DPCDHAL
        return bSDPExtnForColorimetry;
    }

+
    virtual AuxRetry::status setOuiSource(unsigned ouiId, const char * model, size_t modelNameLength, NvU8 chipRevision)
    {
        NvU8 ouiBuffer[16];
@@ -863,6 +864,42 @@ struct DPCDHALImpl : DPCDHAL
        return bus.write(NV_DPCD_SOURCE_IEEE_OUI, &ouiBuffer[0], sizeof ouiBuffer);
    }

+    virtual bool getOuiSource(unsigned &ouiId, char * modelName,
+                              size_t modelNameBufferSize, NvU8 & chipRevision)
+    {
+        NvU8 ouiBuffer[16];
+        int address = NV_DPCD_SOURCE_IEEE_OUI;
+
+        if (caps.revisionMajor <= 0)
+            DP_ASSERT(0 && "Something is wrong, revision major should be > 0");
+
+        // If buffer size is larger than dev_id size, the extras are not used.
+        // If buffer size is smaller, than we can only get certain bytes.
+        if (modelNameBufferSize > NV_DPCD_SOURCE_DEV_ID_STRING__SIZE)
+        {
+            modelNameBufferSize = NV_DPCD_SOURCE_DEV_ID_STRING__SIZE;
+        }
+
+        if (AuxRetry::ack != bus.read(address, &ouiBuffer[0], sizeof ouiBuffer))
+        {
+            *modelName = 0;
+            ouiId = 0;
+            chipRevision = 0;
+            return false;
+        }
+        //  The first 3 bytes are IEEE_OUI. 2 hex digits per register.
+        ouiId = ouiBuffer[2] | (ouiBuffer[1] << 8) | (ouiBuffer[0] << 16);
+
+        // Next 6 bytes are Device Identification String, copy as much as we can (limited buffer case).
+        unsigned int i;
+        for (i = 0; i < modelNameBufferSize; i++)
+            modelName[i] = ouiBuffer[3+i];
+
+        chipRevision = ouiBuffer[9];
+
+        return true;
+    }
+
    virtual bool getOuiSink(unsigned &ouiId, char * modelName, size_t modelNameBufferSize, NvU8 & chipRevision)
    {
        NvU8 ouiBuffer[16];
--- a/src/common/displayport/src/dp_connectorimpl.cpp
+++ b/src/common/displayport/src/dp_connectorimpl.cpp
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 1993-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -188,6 +188,9 @@ void ConnectorImpl::applyRegkeyOverrides(const DP_REGKEY_DATABASE& dpRegkeyDatab
    this->bDisableSSC                   = dpRegkeyDatabase.bSscDisabled;
    this->bEnableFastLT                 = dpRegkeyDatabase.bFastLinkTrainingEnabled;
    this->bDscMstCapBug3143315          = dpRegkeyDatabase.bDscMstCapBug3143315;
+    this->bEnableOuiRestoring           = dpRegkeyDatabase.bEnableOuiRestoring;
+    this->bPowerDownPhyBeforeD3         = dpRegkeyDatabase.bPowerDownPhyBeforeD3;
+    this->bReassessMaxLink              = dpRegkeyDatabase.bReassessMaxLink;
 }

 void ConnectorImpl::setPolicyModesetOrderMitigation(bool enabled)
@@ -704,6 +707,13 @@ create:

    newDev->applyOUIOverrides();

+    if (main->isEDP() && this->bEnableOuiRestoring)
+    {
+        // Save Source OUI information for eDP.
+        hal->getOuiSource(cachedSourceOUI, &cachedSourceModelName[0],
+                          sizeof(cachedSourceModelName), cachedSourceChipRevision);
+    }
+
    fireEvents();
 }

@@ -1178,7 +1188,7 @@ bool ConnectorImpl::compoundQueryAttach(Group * target,
                this->isFECSupported() &&                           // If GPU supports FEC
                pDscParams &&                                       // If client sent DSC info
                pDscParams->bCheckWithDsc &&                        // If client wants to check with DSC
-                (dev && dev->isDSCPossible()) &&                    // Either device or it's parent supports DSC
+                (dev && dev->devDoingDscDecompression) &&           // Either device or it's parent supports DSC
                bFecCapable &&                                      // If path up to dsc decoding device supports FEC
                (modesetParams.modesetInfo.bitsPerComponent != 6))  // DSC doesn't support bpc = 6
            {
@@ -1239,9 +1249,13 @@ bool ConnectorImpl::compoundQueryAttach(Group * target,
                            (modesetParams.colorFormat == dpColorFormat_YCbCr444 && !dev->parent->dscCaps.dscDecoderColorFormatCaps.bYCbCr444) ||
                            (modesetParams.colorFormat == dpColorFormat_YCbCr422 && !dev->parent->dscCaps.dscDecoderColorFormatCaps.bYCbCrSimple422))
                        {
-                            if (pDscParams->forceDsc == DSC_FORCE_ENABLE)
+                            if ((pDscParams->forceDsc == DSC_FORCE_ENABLE) ||
+                                (modesetParams.modesetInfo.mode == DSC_DUAL))
                            {
-                                // If DSC is force enabled then return failure here
+                                //
+                                // If DSC is force enabled or DSC_DUAL mode is requested,
+                                // then return failure here
+                                //
                                compoundQueryResult = false;
                                pDscParams->bEnableDsc = false;
                                return false;
@@ -1270,9 +1284,24 @@ bool ConnectorImpl::compoundQueryAttach(Group * target,
                                     (NvU32*)(PPS),
                                     (NvU32*)(&bitsPerPixelX16))) != NVT_STATUS_SUCCESS)
                {
-                    if (pDscParams->forceDsc == DSC_FORCE_ENABLE)
+                    //
+                    // If generating PPS failed
+                    //          AND
+                    //    (DSC is force enabled
+                    //          OR
+                    //    the requested DSC mode = DUAL)
+                    //then
+                    //    return failure here
+                    // Else
+                    //    we will check if non DSC path is possible.
+                    //
+                    // If dsc mode = DUAL failed to generate PPS and if we pursue
+                    // non DSC path, DD will still follow 2Head1OR modeset path with
+                    // DSC disabled, eventually leading to HW hang. Bug 3632901
+                    //
+                    if ((pDscParams->forceDsc == DSC_FORCE_ENABLE) ||
+                        (modesetParams.modesetInfo.mode == DSC_DUAL))
                    {
-                        // If DSC is force enabled then return failure here
                        compoundQueryResult = false;
                        pDscParams->bEnableDsc = false;
                        return false;
@@ -2571,7 +2600,7 @@ bool ConnectorImpl::notifyAttachBegin(Group *                target,       // Gr
        if (main->isEDP() && nativeDev)
        {
            // eDP can support DSC with and without FEC
-            bEnableFEC = bEnableDsc && nativeDev->isFECSupported();
+            bEnableFEC = bEnableDsc && nativeDev->getFECSupport();
        }
        else
        {
@@ -2663,10 +2692,24 @@ bool ConnectorImpl::notifyAttachBegin(Group *                target,       // Gr

    DP_ASSERT(!this->isLinkQuiesced && "TMDS is attached, NABegin is impossible!");

+    //
    // Update the FEC enabled flag according to the mode requested.
+    //
+    // In MST config, if one panel needs DSC/FEC and the other one does not,
+    // we still need to keep FEC enabled on the connector since at least one
+    // stream needs it.
+    //
    this->bFECEnable |= bEnableFEC;
+
    highestAssessedLC.enableFEC(this->bFECEnable);

+    if (main->isEDP() && this->bEnableOuiRestoring)
+    {
+      main->configurePowerState(true);
+      hal->setOuiSource(cachedSourceOUI, &cachedSourceModelName[0], 6 /* string length of ieeeOuiDevId */,
+                        cachedSourceChipRevision);
+    }
+
    // if failed, we're guaranteed that assessed link rate didn't meet the mode requirements
    // isZombie() will catch this
    bLinkTrainingStatus = trainLinkOptimized(getMaxLinkConfig());
@@ -3248,6 +3291,22 @@ void ConnectorImpl::powerdownLink(bool bPowerdownPanel)
    powerOff.lanes = 0;
    // Inform Sink about Main Link Power Down.

+    if (linkUseMultistream() && bPowerDownPhyBeforeD3)
+    {
+        PowerDownPhyMessage powerDownPhyMsg;
+        NakData nack;
+
+        for (Device * i = enumDevices(0); i; i=enumDevices(i))
+        {
+            if (i->isPlugged() && i->isVideoSink())
+            {
+                Address devAddress = ((DeviceImpl*)i)->address;
+                powerDownPhyMsg.set(devAddress.parent(), devAddress.tail(), NV_TRUE);
+                this->messageManager->send(&powerDownPhyMsg, nack);
+            }
+        }
+    }
+
    //
    // 1> If it is eDP and the power is not on, we don't need to put it into D3 here
    // 2> If FEC is enabled then we have to put panel in D3 after powering down mainlink
@@ -4595,6 +4654,7 @@ bool ConnectorImpl::train(const LinkConfiguration & lConfig, bool force,
 {
    LinkTrainingType preferredTrainingType = trainType;
    bool result;
+    bool bEnableFecOnSor;
    //
    //  Validate link config against caps
    //
@@ -4681,14 +4741,22 @@ bool ConnectorImpl::train(const LinkConfiguration & lConfig, bool force,
        this->hal->setDirtyLinkStatus(true);

    // We don't need post LQA while powering down the lanes.
-    if ((lConfig.lanes != 0) &&
-        hal->isPostLtAdjustRequestSupported() &&
-        result)
+    if ((lConfig.lanes != 0) && hal->isPostLtAdjustRequestSupported() && result)
    {
        result = postLTAdjustment(activeLinkConfig, force);
    }

-    if((lConfig.lanes != 0) && result && lConfig.bEnableFEC)
+    bEnableFecOnSor = lConfig.bEnableFEC;
+
+    if (main->isEDP())
+    {
+        DeviceImpl * nativeDev = findDeviceInList(Address());
+
+        if (nativeDev && nativeDev->bIsPreviouslyFakedMuxDevice)
+            bEnableFecOnSor = activeLinkConfig.bEnableFEC;
+    }
+
+    if((lConfig.lanes != 0) && result && bEnableFecOnSor)
    {
        //
        // Extended latency from link-train end to FEC enable pattern
@@ -4704,7 +4772,14 @@ bool ConnectorImpl::train(const LinkConfiguration & lConfig, bool force,
        DP_ASSERT(result);
    }

-    if (lConfig != activeLinkConfig)
+    //
+    // Do not compare bEnableFEC here. In DDS case FEC might be requested but
+    // not performed in RM.
+    //
+    if ((lConfig.lanes != activeLinkConfig.lanes) ||
+        (lConfig.peakRate != activeLinkConfig.peakRate) ||
+        (lConfig.enhancedFraming != activeLinkConfig.enhancedFraming) ||
+        (lConfig.multistream != activeLinkConfig.multistream))
    {
        // fallback happens, returns fail to make sure clients notice it.
        result = false;
@@ -5488,7 +5563,8 @@ void ConnectorImpl::notifyLongPulse(bool statusConnected)

        if (existingDev && existingDev->isFakedMuxDevice() && !bIsMuxOnDgpu)
        {
-            DP_LOG((" NotifyLongPulse ignored as mux is not pointing to dGPU and there is a faked device"));
+            DP_LOG((" NotifyLongPulse ignored as mux is not pointing to dGPU and there is a faked device. Marking detect complete"));
+            sink->notifyDetectComplete();
            return;
        }

@@ -5704,7 +5780,7 @@ void ConnectorImpl::notifyLongPulseInternal(bool statusConnected)
            discoveryManager = new DiscoveryManager(messageManager, this, timer, hal);

            // Check and clear if any pending message here
-            if (hal->clearPendingMsg())
+            if (hal->clearPendingMsg() || bForceClearPendingMsg)
            {
                DP_LOG(("DP> Stale MSG found: set branch to D3 and back to D0..."));
                if (hal->isAtLeastVersion(1, 4))
@@ -5871,11 +5947,13 @@ void ConnectorImpl::notifyLongPulseInternal(bool statusConnected)
                bPConConnected = true;
            }

+            LinkConfiguration maxLinkConfig = getMaxLinkConfig();
+
            if (bPConConnected ||
                (main->isEDP() && this->bSkipAssessLinkForEDP) ||
                (main->isInternalPanelDynamicMuxCapable()))
            {
-                this->highestAssessedLC = getMaxLinkConfig();
+                this->highestAssessedLC = maxLinkConfig;
                this->linkGuessed = bPConConnected;
                this->bSkipAssessLinkForPCon = bPConConnected;
            }
@@ -5890,6 +5968,22 @@ void ConnectorImpl::notifyLongPulseInternal(bool statusConnected)
                    hal->setPowerState(PowerStateD0);
                }
                this->assessLink();
+
+                if (this->bReassessMaxLink)
+                {
+                    //
+                    // If the highest assessed LC is not equal to 
+                    // max possible link config, re-assess link
+                    //
+                    NvU8 retries = 0U;
+
+                    while((retries < WAR_MAX_REASSESS_ATTEMPT) && (highestAssessedLC != maxLinkConfig))
+                    {
+                        DP_LOG(("DP> Assessed link is not equal to highest possible config. Reassess link."));
+                        this->assessLink();
+                        retries++;
+                    }
+                }
            }

            if (hal->getLegacyPortCount() != 0)
@@ -6462,6 +6556,7 @@ void ConnectorImpl::createFakeMuxDevice(const NvU8 *buffer, NvU32 bufferSize)

    // Initialize DSC state
    newDev->dscCaps.bDSCSupported = true;
+    newDev->dscCaps.bDSCDecompressionSupported = true;
    newDev->parseDscCaps(buffer, bufferSize);
    dpMemCopy(newDev->rawDscCaps, buffer, DP_MIN(bufferSize, 16));
    newDev->bDSCPossible = true;
@@ -6746,6 +6841,7 @@ bool ConnectorImpl::updatePsrLinkState(bool bTrainLink)
    {
        // Bug 3438892 If the panel is turned off the reciever on its side,
        // force panel link on by writting 600 = 1
+        this->hal->setDirtyLinkStatus(true);
        if (this->isLinkLost())
        {
            hal->setPowerState(PowerStateD0);
@@ -6910,5 +7006,6 @@ void ConnectorImpl::configInit()
    bNoFallbackInPostLQA = 0;
    LT2FecLatencyMs = 0;
    bDscCapBasedOnParent = false;
+    bForceClearPendingMsg = false;
 }

--- a/src/common/displayport/src/dp_deviceimpl.cpp
+++ b/src/common/displayport/src/dp_deviceimpl.cpp
@@ -920,23 +920,31 @@ void DeviceImpl::applyOUIOverrides()
            if ((buffer[3] == 0x53) && (buffer[4] == 0x59) && (buffer[5] == 0x4E) && (buffer[6] == 0x41))
            {
                // For Synaptic VMM5331 and VMM5320, it only support MSA-Over-MST for DP after Firmware 5.4.5
-                if (buffer[7] == 0x53 &&
-                    (buffer[8] == 0x31 || buffer[8] == 0x20))
+                if (buffer[7] == 0x53)
                {
-                    this->bSdpExtCapable = False;
+                    //
+                    // This flag will be checked only in DSC Pass through cases (MST).
+                    // All Synaptics VMM53XX chips which support pass through can only support
+                    // color formats that are listed in 0x69h even in pass through mode.
+                    //
                    this->bDscPassThroughColorFormatWar = true;
-
-                    //
-                    // Check firmware version
-                    // 0x50A: FW/SW Major Revision.
-                    // 0x50B: FW/SW Minor Revision.
-                    // 0x50C: Build Number.
-                    //
-                    if ((buffer[10] >= 0x06) ||
-                        ((buffer[10] == 0x05) && (buffer[11] >= 0x05)) ||
-                        ((buffer[10] == 0x05) && (buffer[11] == 0x04) && (buffer[12] >= 0x05)))
+            
+                    if ((buffer[8] == 0x31) || (buffer[8] == 0x20))
                    {
-                        this->bSdpExtCapable = True;
+                        this->bSdpExtCapable = False;
+
+                        //
+                        // Check firmware version
+                        // 0x50A: FW/SW Major Revision.
+                        // 0x50B: FW/SW Minor Revision.
+                        // 0x50C: Build Number.
+                        //
+                        if ((buffer[10] >= 0x06) ||
+                            ((buffer[10] == 0x05) && (buffer[11] >= 0x05)) ||
+                            ((buffer[10] == 0x05) && (buffer[11] == 0x04) && (buffer[12] >= 0x05)))
+                        {
+                            this->bSdpExtCapable = True;
+                        }
                    }
                }
            }
@@ -1500,7 +1508,11 @@ NvBool DeviceImpl::getDSCSupport()
    {
        if (FLD_TEST_DRF(_DPCD14, _DSC_SUPPORT, _DSC_SUPPORT, _YES, byte))
        {
-            dscCaps.bDSCSupported = true;
+            dscCaps.bDSCDecompressionSupported = true;
+        }
+        if (FLD_TEST_DRF(_DPCD20, _DSC_SUPPORT, _PASS_THROUGH_SUPPORT, _YES, byte))
+        {
+            dscCaps.bDSCPassThroughSupported = true;
        }
    }

@@ -1509,6 +1521,11 @@ NvBool DeviceImpl::getDSCSupport()
        DP_LOG(("DP-DEV> DSC Support AUX READ failed for %s!", address.toString(sb)));
    }

+    if (dscCaps.bDSCDecompressionSupported || dscCaps.bDSCPassThroughSupported)
+    {
+        dscCaps.bDSCSupported = true;
+    }
+
    return dscCaps.bDSCSupported;
 }

@@ -1628,6 +1645,11 @@ NvBool DeviceImpl::isDSCSupported()
    return dscCaps.bDSCSupported;
 }

+NvBool DeviceImpl::isDSCDecompressionSupported()
+{
+    return dscCaps.bDSCDecompressionSupported;
+}
+
 NvBool DeviceImpl::isDSCPassThroughSupported()
 {
    return dscCaps.bDSCPassThroughSupported;
@@ -1966,7 +1988,7 @@ void DeviceImpl::setDscDecompressionDevice(bool bDscCapBasedOnParent)
                        this->devDoingDscDecompression = this;
                        this->bDSCPossible = true;
                    }
-                    else if (this->parent->isDSCSupported())
+                    else if (this->parent->isDSCDecompressionSupported())
                    {
                        //
                        // This condition takes care of DSC capable sink devices 
@@ -1979,12 +2001,15 @@ void DeviceImpl::setDscDecompressionDevice(bool bDscCapBasedOnParent)
                }
                else
                {
-                    // This condition takes care of branch device capable of DSC.
-                    this->devDoingDscDecompression = this;
-                    this->bDSCPossible = true;
+                    if (this->isDSCDecompressionSupported())
+                    {
+                        // This condition takes care of branch device capable of DSC decoding.
+                        this->devDoingDscDecompression = this;
+                        this->bDSCPossible = true;
+                    }
                }
-            }           
-            else if (this->parent && this->parent->isDSCSupported())
+            }
+            else if (this->parent && this->parent->isDSCDecompressionSupported())
            {
                //
                // This condition takes care of sink devices not capable of DSC 
@@ -1997,7 +2022,7 @@ void DeviceImpl::setDscDecompressionDevice(bool bDscCapBasedOnParent)
    }
    else
    {
-        if (this->isDSCSupported())
+        if (this->isDSCDecompressionSupported())
        {
            this->bDSCPossible = true;
            this->devDoingDscDecompression = this;
--- a/src/common/displayport/src/dp_evoadapter.cpp
+++ b/src/common/displayport/src/dp_evoadapter.cpp
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 1993-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 1993-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -93,7 +93,11 @@ const struct
    {NV_DP_REGKEY_KEEP_OPT_LINK_ALIVE_MST,          &dpRegkeyDatabase.bOptLinkKeptAliveMst,            DP_REG_VAL_BOOL},
    {NV_DP_REGKEY_KEEP_OPT_LINK_ALIVE_SST,          &dpRegkeyDatabase.bOptLinkKeptAliveSst,            DP_REG_VAL_BOOL},
    {NV_DP_REGKEY_FORCE_EDP_ILR,                    &dpRegkeyDatabase.bBypassEDPRevCheck,              DP_REG_VAL_BOOL},
-    {NV_DP_DSC_MST_CAP_BUG_3143315,                 &dpRegkeyDatabase.bDscMstCapBug3143315,            DP_REG_VAL_BOOL}
+    {NV_DP_DSC_MST_CAP_BUG_3143315,                 &dpRegkeyDatabase.bDscMstCapBug3143315,            DP_REG_VAL_BOOL},
+    {NV_DP_REGKEY_ENABLE_OUI_RESTORING,             &dpRegkeyDatabase.bEnableOuiRestoring,             DP_REG_VAL_BOOL},
+    {NV_DP_CHECK_FEC_FOR_DDS_DSC_PANEL,             &dpRegkeyDatabase.bCheckFECForDynamicMuxDSCPanel,  DP_REG_VAL_BOOL},
+    {NV_DP_REGKEY_POWER_DOWN_PHY,                   &dpRegkeyDatabase.bPowerDownPhyBeforeD3,           DP_REG_VAL_BOOL},
+    {NV_DP_REGKEY_REASSESS_MAX_LINK,                &dpRegkeyDatabase.bReassessMaxLink,                DP_REG_VAL_BOOL}
 };

 EvoMainLink::EvoMainLink(EvoInterface * provider, Timer * timer) :
@@ -894,6 +898,7 @@ void EvoMainLink::applyRegkeyOverrides()
    _skipPowerdownEDPPanelWhenHeadDetach = dpRegkeyDatabase.bPoweroffEdpInHeadDetachSkipped;
    _applyLinkBwOverrideWarRegVal        = dpRegkeyDatabase.bLinkBwOverrideWarApplied;
    _enableMSAOverrideOverMST            = dpRegkeyDatabase.bMsaOverMstEnabled;
+    _enableFecCheckForDDS                = dpRegkeyDatabase.bCheckFECForDynamicMuxDSCPanel;
 }

 NvU32 EvoMainLink::getRegkeyValue(const char *key)
@@ -1160,8 +1165,12 @@ bool EvoMainLink::train(const LinkConfiguration & link, bool force,
                // 1. CR or EQ phase failed.
                // 2. The request link bandwidth is NOT RBR
                //
+                if (!requestRmLC.lowerConfig())
+                {
+                    // If no valid link config could be found, break here. 
+                    break;
+                }
                fallback = true;
-                requestRmLC.lowerConfig();
            }
            else
            {
@@ -1233,6 +1242,16 @@ bool EvoMainLink::train(const LinkConfiguration & link, bool force,
    retLink->setLaneRate(requestRmLC.peakRate, result ? requestRmLC.lanes : 0);
    retLink->setLTCounter(ltCounter);

+    // For release branch only, check FEC return values and update to "retLink"
+    if (_enableFecCheckForDDS)
+    {
+        if (requestRmLC.bEnableFEC && (FLD_TEST_DRF(0073_CTRL_DP, _ERR, _ENABLE_FEC, _ERR, err)))
+        {
+            retLink->bEnableFEC = false;
+            DP_ASSERT(0);
+        }
+    }
+
    NV_DPTRACE_INFO(LINK_TRAINING_DONE, status, requestRmLC.peakRate, requestRmLC.lanes);

    return result;
--- a/src/common/displayport/src/dp_wardatabase.cpp
+++ b/src/common/displayport/src/dp_wardatabase.cpp
@@ -84,6 +84,17 @@ void ConnectorImpl::applyOuiWARs()
                //
                LT2FecLatencyMs = 57;

+                //
+                // This is to reset the MSTM control bit on the branch device. On this
+                // device, if continuous LAM message are sent very close then IRQ vector
+                // will fail to see stale/pending message and will not reset the MSTM_CTRL
+                // register. Currently making this specific to linux so as to have minimum
+                // effect on windows. Later proper fix for this will be generic.
+                //
+#if defined(NV_UNIX)
+                bForceClearPendingMsg = true;
+#endif
+
                if (bDscMstCapBug3143315)
                {
                    //
--- a/src/common/displayport/src/dp_watermark.cpp
+++ b/src/common/displayport/src/dp_watermark.cpp
@@ -852,21 +852,16 @@ bool DisplayPort::isModePossibleMSTWithFEC

 unsigned DisplayPort::pbnForMode(const ModesetInfo & modesetInfo)
 {
+    // When DSC is enabled consider depth will multiplied by 16 
+    unsigned dsc_factor = modesetInfo.bEnableDsc ? 16 : 1;
+
    //
    // Calculate PBN in terms of 54/64 mbyte/sec
    // round up by .6% for spread de-rate. Note: if we're not spreading our link
    // this MUST still be counted.  It's also to allow downstream links to be spread.
    //
    unsigned pbnForMode = (NvU32)(divide_ceil(modesetInfo.pixelClockHz * modesetInfo.depth * 1006 * 64 / 8,
-                                    (NvU64)54000000 *1000));
-
-    if(modesetInfo.bEnableDsc)
-    {
-        //
-        // When DSC is enabled consider depth will multiplied by 16 and also 3% FEC Overhead
-        // as per DP1.4 spec
-        pbnForMode = (NvU32)(divide_ceil(pbnForMode * 100, 97 * DSC_DEPTH_FACTOR));
-    }
+                                    (NvU64)54000000 * 1000 * dsc_factor));

    return pbnForMode;
 }
--- a/src/common/inc/displayport/displayport.h
+++ b/src/common/inc/displayport/displayport.h
@@ -240,6 +240,7 @@ typedef enum
 typedef struct DscCaps
 {
    NvBool bDSCSupported;
+    NvBool bDSCDecompressionSupported;
    NvBool bDSCPassThroughSupported;
    unsigned versionMajor, versionMinor;
    unsigned rcBufferBlockSize;
--- a/src/common/inc/nvBldVer.h
+++ b/src/common/inc/nvBldVer.h
@@ -36,25 +36,25 @@
 // and then checked back in. You cannot make changes to these sections without
 // corresponding changes to the buildmeister script
 #ifndef NV_BUILD_BRANCH
-    #define NV_BUILD_BRANCH             r526_91
+    #define NV_BUILD_BRANCH             r529_18
 #endif
 #ifndef NV_PUBLIC_BRANCH
-    #define NV_PUBLIC_BRANCH             r526_91
+    #define NV_PUBLIC_BRANCH             r529_18
 #endif

 #if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS)
-#define NV_BUILD_BRANCH_VERSION         "rel/gpu_drv/r525/r526_91-183"
-#define NV_BUILD_CHANGELIST_NUM         (32139144)
+#define NV_BUILD_BRANCH_VERSION         "rel/gpu_drv/r525/r529_18-534"
+#define NV_BUILD_CHANGELIST_NUM         (33451322)
 #define NV_BUILD_TYPE                   "Official"
-#define NV_BUILD_NAME                   "rel/gpu_drv/r525/r526_91-183"
-#define NV_LAST_OFFICIAL_CHANGELIST_NUM (32139144)
+#define NV_BUILD_NAME                   "rel/gpu_drv/r525/r529_18-534"
+#define NV_LAST_OFFICIAL_CHANGELIST_NUM (33451322)

 #else     /* Windows builds */
-#define NV_BUILD_BRANCH_VERSION         "r526_91-9"
-#define NV_BUILD_CHANGELIST_NUM         (32103636)
+#define NV_BUILD_BRANCH_VERSION         "r529_18-2"
+#define NV_BUILD_CHANGELIST_NUM         (33403873)
 #define NV_BUILD_TYPE                   "Official"
-#define NV_BUILD_NAME                   "527.27"
-#define NV_LAST_OFFICIAL_CHANGELIST_NUM (32103636)
+#define NV_BUILD_NAME                   "529.19"
+#define NV_LAST_OFFICIAL_CHANGELIST_NUM (33403873)
 #define NV_BUILD_BRANCH_BASE_VERSION    R525
 #endif
 // End buildmeister python edited section
--- a/src/common/inc/nvPNPVendorIds.h
+++ b/src/common/inc/nvPNPVendorIds.h
@@ -120,6 +120,7 @@ static const PNPVendorId PNPVendorIds[] =
    { "BCD",    _VENDOR_NAME_ENTRY("Dr. Seufert GmbH")                  },
    { "BEO",    _VENDOR_NAME_ENTRY("Bang & Olufsen")                    },
    { "BGT",    _VENDOR_NAME_ENTRY("Budzetron")                         },
+    { "BIG",    _VENDOR_NAME_ENTRY("Bigscreen, Inc.")                   },
    { "BMM",    _VENDOR_NAME_ENTRY("MAG Technology")                    },
    { "BNQ",    _VENDOR_NAME_ENTRY("BenQ")                              },
    { "BOE",    _VENDOR_NAME_ENTRY("BOE Technology Group Co., Ltd")     },
@@ -276,6 +277,7 @@ static const PNPVendorId PNPVendorIds[] =
    { "IMA",    _VENDOR_NAME_ENTRY("Imagraph")                          },
    { "IMC",    _VENDOR_NAME_ENTRY("IMC Networks")                      },
    { "IMP",    _VENDOR_NAME_ENTRY("Impression")                        },
+    { "IMX",    _VENDOR_NAME_ENTRY("Arpara Technology Co., Ltd.")       },
    { "INF",    _VENDOR_NAME_ENTRY("Inframetrics")                      },
    { "INL",    _VENDOR_NAME_ENTRY("InnoLux Display Corporation")       },
    { "INP",    _VENDOR_NAME_ENTRY("Interphase")                        },
--- a/src/common/inc/nvUnixVersion.h
+++ b/src/common/inc/nvUnixVersion.h
@@ -4,7 +4,7 @@
 #if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) || defined(NV_VMWARE) || defined(NV_QNX) || defined(NV_INTEGRITY) || \
    (defined(RMCFG_FEATURE_PLATFORM_GSP) && RMCFG_FEATURE_PLATFORM_GSP == 1)

-#define NV_VERSION_STRING               "525.60.13"
+#define NV_VERSION_STRING               "525.147.05"

 #else

--- a/src/common/inc/nvVer.h
+++ b/src/common/inc/nvVer.h
@@ -3,7 +3,7 @@
 #define NV_COMPANY_NAME_STRING_SHORT    "NVIDIA"
 #define NV_COMPANY_NAME_STRING_FULL     "NVIDIA Corporation"
 #define NV_COMPANY_NAME_STRING          NV_COMPANY_NAME_STRING_FULL
-#define NV_COPYRIGHT_YEAR               "2022"
+#define NV_COPYRIGHT_YEAR               "2023"
 #define NV_COPYRIGHT                    "(C) " NV_COPYRIGHT_YEAR " NVIDIA Corporation. All rights reserved."  // Please do not use the non-ascii copyright symbol for (C).

 #if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) || defined(NV_VMWARE) || defined(NV_QNX) || defined(NV_INTEGRITY) || \
--- a/src/common/inc/nvlog_defs.h
+++ b/src/common/inc/nvlog_defs.h
@@ -112,21 +112,12 @@ struct _NVLOG_BUFFER
 #endif // NVOS_IS_UNIX


-//
 // Due to this file's peculiar location, NvPort may or may not be includable
-// This hack will go away when NvLog is moved into common/shared
-//
-#if NVOS_IS_MACINTOSH
-
-#if !PORT_IS_KERNEL_BUILD
 typedef struct PORT_SPINLOCK PORT_SPINLOCK;
-#else
-#include "nvport/nvport.h"
-#endif
+typedef struct PORT_MUTEX PORT_MUTEX;
+typedef struct PORT_RWLOCK PORT_RWLOCK;

-#elif !defined(PORT_IS_KERNEL_BUILD)
-typedef struct PORT_SPINLOCK PORT_SPINLOCK;
-#else
+#if PORT_IS_KERNEL_BUILD
 #include "nvport/nvport.h"
 #endif

@@ -143,11 +134,35 @@ typedef struct _NVLOG_LOGGER
    NvU32           nextFree;
    /** Total number of free buffer slots */
    NvU32           totalFree;
-    /** Lock for all buffer oprations */
+    /** Lock for some buffer oprations */
    PORT_SPINLOCK*  mainLock;
+    /** Lock for creating/deleting pBuffers and accessing them from RmCtrls */
+    PORT_MUTEX*  buffersLock;
+    /** Lock for registering/deregistering flush callbacks */
+    PORT_RWLOCK  *flushCbsLock;
 } NVLOG_LOGGER;
 extern NVLOG_LOGGER NvLogLogger;

+/**
+ * NvLog uses two locks:
+ * - NVLOG_LOGGER::mainLock is used to protect some accesses to pBuffers, or
+ * an individual pBuffers entry depending on locking flags.
+ * - NVLOG_LOGGER::buffersLock is used to protect creating/deleting pBuffers and accessing them
+ * from certain RmCtrl handlers.
+ *
+ * Historically in most contexts obtaining RMAPI lock would suffice, and mainLock would optionally
+ * be used for certain buffers. Ioctl NV_ESC_RM_NVLOG_CTRL cannot touch RMAPI lock and needs
+ * to access NvLog. The latter operation might race if called at an inopportune time: e.g. if the
+ * ioctl is called during RM init when KGSP creates/deletes GSP NvLog buffers. Using buffersLock is
+ * thus necessary to resolve the potential race.
+ *
+ * This leads to an unfortunate sequence where mainLock and buffersLock are nested. The latter lock
+ * cannot be removed as it is used in IRQ paths.
+ *
+ * This should be refactored to use a single RWLock that does conditional acquire in possible IRQ
+ * paths.
+ */
+
 //
 // Buffer flags
 //
--- a/src/common/inc/swref/published/ada/ad102/dev_gc6_island.h
+++ b/src/common/inc/swref/published/ada/ad102/dev_gc6_island.h
@@ -0,0 +1,29 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __ad102_dev_gc6_island_h__
+#define __ad102_dev_gc6_island_h__
+
+#define NV_PGC6_BSI_SECURE_SCRATCH_15                                             0x001180fc /* RW-4R */
+
+#endif // __ad102_dev_gc6_island_h__
--- a/src/common/inc/swref/published/ada/ad102/dev_gc6_island_addendum.h
+++ b/src/common/inc/swref/published/ada/ad102/dev_gc6_island_addendum.h
@@ -0,0 +1,32 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __ad102_dev_gc6_island_addendum_h__
+#define __ad102_dev_gc6_island_addendum_h__
+
+#define NV_PGC6_BSI_VPR_SECURE_SCRATCH_15                                           NV_PGC6_BSI_SECURE_SCRATCH_15
+#define NV_PGC6_BSI_VPR_SECURE_SCRATCH_15_SCRUBBER_HANDOFF                                                  31:29
+#define NV_PGC6_BSI_VPR_SECURE_SCRATCH_15_SCRUBBER_HANDOFF_DONE                                        0x00000003
+
+#endif // __ad102_dev_gc6_island_addendum_h__
+
--- a/src/common/inc/swref/published/hopper/gh100/dev_fb.h
+++ b/src/common/inc/swref/published/hopper/gh100/dev_fb.h
@@ -20,7 +20,7 @@
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 */
- 
+
 #ifndef __gh100_dev_fb_h
 #define __gh100_dev_fb_h_
 #define NV_PFB_NISO_FLUSH_SYSMEM_ADDR_SHIFT                       8 /*       */
@@ -29,4 +29,25 @@
 #define NV_PFB_FBHUB_PCIE_FLUSH_SYSMEM_ADDR_HI           0x00100A38 /* RW-4R */
 #define NV_PFB_FBHUB_PCIE_FLUSH_SYSMEM_ADDR_HI_ADR             31:0 /* RWIVF */
 #define NV_PFB_FBHUB_PCIE_FLUSH_SYSMEM_ADDR_HI_ADR_MASK  0x000FFFFF /* ----V */
+
+#define NV_PFB_PRI_MMU_L2TLB_ECC_UNCORRECTED_ERR_COUNT               0x00100E78 /* RW-4R */
+#define NV_PFB_PRI_MMU_L2TLB_ECC_UNCORRECTED_ERR_COUNT               0x00100E78 /* RW-4R */
+#define NV_PFB_PRI_MMU_L2TLB_ECC_UNCORRECTED_ERR_COUNT_TOTAL               15:0 /* RWEVF */
+#define NV_PFB_PRI_MMU_L2TLB_ECC_UNCORRECTED_ERR_COUNT_TOTAL_INIT             0 /* RWE-V */
+#define NV_PFB_PRI_MMU_L2TLB_ECC_UNCORRECTED_ERR_COUNT_UNIQUE             31:16 /* RWEVF */
+#define NV_PFB_PRI_MMU_L2TLB_ECC_UNCORRECTED_ERR_COUNT_UNIQUE_INIT            0 /* RWE-V */
+
+#define NV_PFB_PRI_MMU_HUBTLB_ECC_UNCORRECTED_ERR_COUNT               0x00100E8C /* RW-4R */
+#define NV_PFB_PRI_MMU_HUBTLB_ECC_UNCORRECTED_ERR_COUNT               0x00100E8C /* RW-4R */
+#define NV_PFB_PRI_MMU_HUBTLB_ECC_UNCORRECTED_ERR_COUNT_TOTAL               15:0 /* RWEVF */
+#define NV_PFB_PRI_MMU_HUBTLB_ECC_UNCORRECTED_ERR_COUNT_TOTAL_INIT             0 /* RWE-V */
+#define NV_PFB_PRI_MMU_HUBTLB_ECC_UNCORRECTED_ERR_COUNT_UNIQUE             31:16 /* RWEVF */
+#define NV_PFB_PRI_MMU_HUBTLB_ECC_UNCORRECTED_ERR_COUNT_UNIQUE_INIT            0 /* RWE-V */
+
+#define NV_PFB_PRI_MMU_FILLUNIT_ECC_UNCORRECTED_ERR_COUNT               0x00100EA0 /* RW-4R */
+#define NV_PFB_PRI_MMU_FILLUNIT_ECC_UNCORRECTED_ERR_COUNT               0x00100EA0 /* RW-4R */
+#define NV_PFB_PRI_MMU_FILLUNIT_ECC_UNCORRECTED_ERR_COUNT_TOTAL               15:0 /* RWEVF */
+#define NV_PFB_PRI_MMU_FILLUNIT_ECC_UNCORRECTED_ERR_COUNT_TOTAL_INIT             0 /* RWE-V */
+#define NV_PFB_PRI_MMU_FILLUNIT_ECC_UNCORRECTED_ERR_COUNT_UNIQUE             31:16 /* RWEVF */
+#define NV_PFB_PRI_MMU_FILLUNIT_ECC_UNCORRECTED_ERR_COUNT_UNIQUE_INIT            0 /* RWE-V */
 #endif // __gh100_dev_fb_h__
--- a/src/common/inc/swref/published/hopper/gh100/dev_fbpa.h
+++ b/src/common/inc/swref/published/hopper/gh100/dev_fbpa.h
@@ -0,0 +1,29 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __gh100_dev_fbpa_h_
+#define __gh100_dev_fbpa_h_
+
+#define NV_PFB_FBPA_0_ECC_DED_COUNT__SIZE_1               4 /*       */
+#define NV_PFB_FBPA_0_ECC_DED_COUNT(i)                   (0x009025A0+(i)*4) /* RW-4A */
+#endif // __gh100_dev_fbpa_h_
--- a/src/common/inc/swref/published/hopper/gh100/dev_fsp_addendum.h
+++ b/src/common/inc/swref/published/hopper/gh100/dev_fsp_addendum.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2003-2021 NVIDIA CORPORATION & AFFILIATES
+ * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -24,6 +24,11 @@
 #ifndef __gh100_dev_fsp_addendum_h__
 #define __gh100_dev_fsp_addendum_h__

+#define NV_GFW_FSP_UCODE_VERSION        NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_3(1)
+#define NV_GFW_FSP_UCODE_VERSION_FULL   11:0
+#define NV_GFW_FSP_UCODE_VERSION_MAJOR  11:8
+#define NV_GFW_FSP_UCODE_VERSION_MINOR  7:0
+
 //
 // RM uses channel 0 for FSP EMEM on GH100.
 //
--- a/src/common/inc/swref/published/hopper/gh100/dev_fsp_pri.h
+++ b/src/common/inc/swref/published/hopper/gh100/dev_fsp_pri.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2003-2021 NVIDIA CORPORATION & AFFILIATES
+ * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -64,5 +64,9 @@
 #define NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_2__DEVICE_MAP                                                0x00000016 /*       */
 #define NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_2_VAL                                                        31:0           /* RWIVF */
 #define NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_2_VAL_INIT                                                   0x00000000     /* RWI-V */
+#define NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_3(i)                                                         (0x008f0330+(i)*4) /* RW-4A */
+#define NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_3__SIZE_1                                                    4              /*       */
+#define NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_3_VAL                                                        31:0           /* RWIVF */
+#define NV_PFSP_FALCON_COMMON_SCRATCH_GROUP_3_VAL_INIT                                                   0x00000000     /* RWI-V */

 #endif // __gh100_dev_fsp_pri_h__
--- a/src/common/inc/swref/published/hopper/gh100/dev_gc6_island.h
+++ b/src/common/inc/swref/published/hopper/gh100/dev_gc6_island.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES
+ * SPDX-FileCopyrightText: Copyright (c) 2022-2023 NVIDIA CORPORATION & AFFILIATES
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -24,6 +24,14 @@
 #ifndef __gh100_dev_gc6_island_h__
 #define __gh100_dev_gc6_island_h__

+#define NV_PGC6_SCI_SEC_TIMER_TIME_0                             0x00118f54 /* RW-4R */
+#define NV_PGC6_SCI_SEC_TIMER_TIME_0_NSEC                              31:5 /* RWEUF */
+#define NV_PGC6_SCI_SEC_TIMER_TIME_0_NSEC_ZERO                   0x00000000 /* RWE-V */
+
+#define NV_PGC6_SCI_SEC_TIMER_TIME_1                             0x00118f58 /* RW-4R */
+#define NV_PGC6_SCI_SEC_TIMER_TIME_1_NSEC                              28:0 /* RWEUF */
+#define NV_PGC6_SCI_SEC_TIMER_TIME_1_NSEC_ZERO                   0x00000000 /* RWE-V */
+
 #define NV_PGC6_SCI_SYS_TIMER_OFFSET_0                           0x00118df4 /* RW-4R */
 #define NV_PGC6_SCI_SYS_TIMER_OFFSET_0_UPDATE                           0:0 /* RWEVF */
 #define NV_PGC6_SCI_SYS_TIMER_OFFSET_0_UPDATE_DONE               0x00000000 /* R-E-V */
--- a/src/common/inc/swref/published/hopper/gh100/dev_ltc.h
+++ b/src/common/inc/swref/published/hopper/gh100/dev_ltc.h
@@ -0,0 +1,33 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __gh100_dev_ltc_h_
+#define __gh100_dev_ltc_h_
+
+#define NV_PLTCG_LTC0_LTS0_L2_CACHE_ECC_UNCORRECTED_ERR_COUNT                  0x001404f8 /* RW-4R */
+#define NV_PLTCG_LTC0_LTS0_L2_CACHE_ECC_UNCORRECTED_ERR_COUNT_TOTAL                  15:0 /* RWIVF */
+#define NV_PLTCG_LTC0_LTS0_L2_CACHE_ECC_UNCORRECTED_ERR_COUNT_TOTAL_INIT           0x0000 /* RWI-V */
+#define NV_PLTCG_LTC0_LTS0_L2_CACHE_ECC_UNCORRECTED_ERR_COUNT_UNIQUE                31:16 /* RWIVF */
+#define NV_PLTCG_LTC0_LTS0_L2_CACHE_ECC_UNCORRECTED_ERR_COUNT_UNIQUE_INIT          0x0000 /* RWI-V */
+
+#endif // __gh100_dev_ltc_h_
--- a/src/common/inc/swref/published/hopper/gh100/dev_nv_xpl.h
+++ b/src/common/inc/swref/published/hopper/gh100/dev_nv_xpl.h
@@ -0,0 +1,52 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __gh100_dev_nv_xpl_h_
+#define __gh100_dev_nv_xpl_h_
+#define NV_XPL_DL_ERR_COUNT_RBUF                                               0x00000a54 /* R--4R */
+#define NV_XPL_DL_ERR_COUNT_RBUF__PRIV_LEVEL_MASK                              0x00000b08 /*       */
+#define NV_XPL_DL_ERR_COUNT_RBUF_CORR_ERR                                            15:0 /* R-EVF */
+#define NV_XPL_DL_ERR_COUNT_RBUF_CORR_ERR_INIT                                     0x0000 /* R-E-V */
+#define NV_XPL_DL_ERR_COUNT_RBUF_UNCORR_ERR                                         31:16 /* R-EVF */
+#define NV_XPL_DL_ERR_COUNT_RBUF_UNCORR_ERR_INIT                                   0x0000 /* R-E-V */
+#define NV_XPL_DL_ERR_COUNT_SEQ_LUT                                            0x00000a58 /* R--4R */
+#define NV_XPL_DL_ERR_COUNT_SEQ_LUT__PRIV_LEVEL_MASK                           0x00000b08 /*       */
+#define NV_XPL_DL_ERR_COUNT_SEQ_LUT_CORR_ERR                                         15:0 /* R-EVF */
+#define NV_XPL_DL_ERR_COUNT_SEQ_LUT_CORR_ERR_INIT                                  0x0000 /* R-E-V */
+#define NV_XPL_DL_ERR_COUNT_SEQ_LUT_UNCORR_ERR                                      31:16 /* R-EVF */
+#define NV_XPL_DL_ERR_COUNT_SEQ_LUT_UNCORR_ERR_INIT                                0x0000 /* R-E-V */
+
+#define NV_XPL_DL_ERR_RESET                                                    0x00000a5c /* RW-4R */
+#define NV_XPL_DL_ERR_RESET_RBUF_CORR_ERR_COUNT                                       0:0 /* RWCVF */
+#define NV_XPL_DL_ERR_RESET_RBUF_CORR_ERR_COUNT_DONE                                  0x0 /* RWC-V */
+#define NV_XPL_DL_ERR_RESET_RBUF_CORR_ERR_COUNT_PENDING                               0x1 /* -W--T */
+#define NV_XPL_DL_ERR_RESET_SEQ_LUT_CORR_ERR_COUNT                                    1:1 /* RWCVF */
+#define NV_XPL_DL_ERR_RESET_SEQ_LUT_CORR_ERR_COUNT_DONE                               0x0 /* RWC-V */
+#define NV_XPL_DL_ERR_RESET_SEQ_LUT_CORR_ERR_COUNT_PENDING                            0x1 /* -W--T */
+#define NV_XPL_DL_ERR_RESET_RBUF_UNCORR_ERR_COUNT                                   16:16 /* RWCVF */
+#define NV_XPL_DL_ERR_RESET_RBUF_UNCORR_ERR_COUNT_DONE                                0x0 /* RWC-V */
+#define NV_XPL_DL_ERR_RESET_RBUF_UNCORR_ERR_COUNT_PENDING                             0x1 /* -W--T */
+#define NV_XPL_DL_ERR_RESET_SEQ_LUT_UNCORR_ERR_COUNT                                17:17 /* RWCVF */
+#define NV_XPL_DL_ERR_RESET_SEQ_LUT_UNCORR_ERR_COUNT_DONE                             0x0 /* RWC-V */
+#define NV_XPL_DL_ERR_RESET_SEQ_LUT_UNCORR_ERR_COUNT_PENDING                          0x1 /* -W--T */
+#endif // __gh100_dev_nv_xpl_h__
--- a/src/common/inc/swref/published/hopper/gh100/dev_xtl_ep_pcfg_gpu.h
+++ b/src/common/inc/swref/published/hopper/gh100/dev_xtl_ep_pcfg_gpu.h
@@ -32,6 +32,11 @@
 #define NV_EP_PCFG_GPU_REVISION_ID_AND_CLASSCODE_SUB_CLASSCODE                                                 23:16                /* R-IVF */
 #define NV_EP_PCFG_GPU_REVISION_ID_AND_CLASSCODE_BASE_CLASSCODE                                                31:24                /* R-IVF */
 #define NV_EP_PCFG_GPU_REVISION_ID_AND_CLASSCODE_BASE_CLASSCODE_3D                                             0x00000003           /* R-I-V */
+#define NV_EP_PCFG_GPU_BARREG0                                                                                 0x00000010           /* RW-4R */
+#define NV_EP_PCFG_GPU_BARREG0_REG_ADDR_TYPE                                                                   2:1                  /* R-IVF */
+#define NV_EP_PCFG_GPU_BARREG0_REG_ADDR_TYPE_32BIT                                                             0x00000000           /* R-I-V */
+#define NV_EP_PCFG_GPU_BARREG0_REG_ADDR_TYPE_64BIT                                                             0x00000002           /* R---V */
+#define NV_EP_PCFG_GPU_BARREG5                                                                                 0x00000024           /* RW-4R */
 #define NV_EP_PCFG_GPU_SUBSYSTEM_ID                                                                            0x0000002C           /* R--4R */
 #define NV_EP_PCFG_GPU_MSI_64_HEADER                                                                           0x00000048           /* RW-4R */
 #define NV_EP_PCFG_GPU_MSI_64_HEADER_MSI_ENABLE                                                                16:16                /* RWIVF */
@@ -70,6 +75,11 @@
 #define NV_EP_PCFG_GPU_CORRECTABLE_ERROR_STATUS_REPLAY_NUM_ROLLOVER                                            8:8                  /* RWCVF */
 #define NV_EP_PCFG_GPU_CORRECTABLE_ERROR_STATUS_REPLAY_TIMER_TIMEOUT                                           12:12                /* RWCVF */
 #define NV_EP_PCFG_GPU_CORRECTABLE_ERROR_STATUS_ADVISORY_NON_FATAL_ERROR                                       13:13                /* RWCVF */
+#define NV_EP_PCFG_GPU_SRIOV_INIT_TOT_VF                                                                       0x0000025C           /* R--4R */
+#define NV_EP_PCFG_GPU_SRIOV_INIT_TOT_VF_TOTAL_VFS                                                             31:16                /* R-EVF */
+#define NV_EP_PCFG_GPU_SRIOV_FIRST_VF_STRIDE                                                                   0x00000264           /* R--4R */
+#define NV_EP_PCFG_GPU_SRIOV_FIRST_VF_STRIDE_FIRST_VF_OFFSET                                                   15:0                 /* R-IVF */
+#define NV_EP_PCFG_GPU_VF_BAR0                                                                                 0x00000274           /* RW-4R */
 #define NV_EP_PCFG_GPU_VSEC_DEBUG_SEC                                                                          0x000002B4           /* R--4R */
 #define NV_EP_PCFG_GPU_VSEC_DEBUG_SEC_FAULT_FUSE_POD                                                           0:0                  /* R-CVF */
 #define NV_EP_PCFG_GPU_VSEC_DEBUG_SEC_FAULT_FUSE_SCPM                                                          1:1                  /* R-CVF */
--- a/src/common/inc/swref/published/hopper/gh100/dev_xtl_ep_pri.h
+++ b/src/common/inc/swref/published/hopper/gh100/dev_xtl_ep_pri.h
@@ -24,4 +24,7 @@
 #ifndef __gh100_dev_xtl_ep_pri_h__
 #define __gh100_dev_xtl_ep_pri_h__
 #define NV_EP_PCFGM                                                              0x92FFF:0x92000        /* RW--D */
+
+#define NV_XTL_EP_PRI_DED_ERROR_STATUS                                           0x0000043C    /* RW-4R */
+#define NV_XTL_EP_PRI_RAM_ERROR_INTR_STATUS                                      0x000003C8    /* RW-4R */
 #endif // __gh100_dev_xtl_ep_pri_h__
--- a/src/common/inc/swref/published/hopper/gh100/hwproject.h
+++ b/src/common/inc/swref/published/hopper/gh100/hwproject.h
@@ -21,3 +21,9 @@
 * DEALINGS IN THE SOFTWARE.
 */
 #define NV_CHIP_EXTENDED_SYSTEM_PHYSICAL_ADDRESS_BITS              52
+#define NV_LTC_PRI_STRIDE                            8192
+#define NV_LTS_PRI_STRIDE                             512
+#define NV_FBPA_PRI_STRIDE                      16384
+#define NV_SCAL_LITTER_NUM_FBPAS                       24
+#define NV_XPL_BASE_ADDRESS                    540672
+#define NV_XTL_BASE_ADDRESS                    593920
--- a/src/common/inc/swref/published/hopper/gh100/pri_nv_xal_ep.h
+++ b/src/common/inc/swref/published/hopper/gh100/pri_nv_xal_ep.h
@@ -47,5 +47,17 @@
 #define NV_XAL_EP_INTR_0_PRI_RSP_TIMEOUT                                              3:3
 #define NV_XAL_EP_INTR_0_PRI_RSP_TIMEOUT_PENDING                                      0x1
 #define NV_XAL_EP_SCPM_PRI_DUMMY_DATA_PATTERN_INIT                             0xbadf0200
+
+#define NV_XAL_EP_REORDER_ECC_UNCORRECTED_ERR_COUNT                            0x0010f364 /* RW-4R */
+#define NV_XAL_EP_REORDER_ECC_UNCORRECTED_ERR_COUNT_TOTAL                            15:0 /* RWIUF */
+#define NV_XAL_EP_REORDER_ECC_UNCORRECTED_ERR_COUNT_TOTAL_INIT                     0x0000 /* RWI-V */
+#define NV_XAL_EP_REORDER_ECC_UNCORRECTED_ERR_COUNT_UNIQUE                          31:16 /* RWIUF */
+#define NV_XAL_EP_REORDER_ECC_UNCORRECTED_ERR_COUNT_UNIQUE_INIT                    0x0000 /* RWI-V */
+
+#define NV_XAL_EP_P2PREQ_ECC_UNCORRECTED_ERR_COUNT                             0x0010f37c /* RW-4R */
+#define NV_XAL_EP_P2PREQ_ECC_UNCORRECTED_ERR_COUNT_TOTAL                             15:0 /* RWIUF */
+#define NV_XAL_EP_P2PREQ_ECC_UNCORRECTED_ERR_COUNT_TOTAL_INIT                      0x0000 /* RWI-V */
+#define NV_XAL_EP_P2PREQ_ECC_UNCORRECTED_ERR_COUNT_UNIQUE                           31:16 /* RWIUF */
+#define NV_XAL_EP_P2PREQ_ECC_UNCORRECTED_ERR_COUNT_UNIQUE_INIT                     0x0000 /* RWI-V */
 #endif // __gh100_pri_nv_xal_ep_h__

--- a/src/common/inc/swref/published/nvswitch/lr10/dev_minion_ip_addendum.h
+++ b/src/common/inc/swref/published/nvswitch/lr10/dev_minion_ip_addendum.h
@@ -12,17 +12,13 @@
 * The above copyright notice and this permission notice shall be included in
 * all copies or substantial portions of the Software.
 *
- * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
 */

 #ifndef __lr10_dev_minion_ip_addendum_h__
 #define __lr10_dev_minion_ip_addendum_h__
+
+#define NV_MINION_NVLINK_DL_CMD_COMMAND_INITRXTXTERM 0x12
+
 #define NV_NVLSTAT                                                    0x00000103:0x00000000 /* RW--D */
 #define NV_NVLSTAT_UC01                                                          0x00000001 /* R--4R */
 #define NV_NVLSTAT_UC01_PM_STATE                                                      31:31 /* R---F */
--- a/src/common/inc/swref/published/nvswitch/ls10/dev_nvlipt_lnk_ip.h
+++ b/src/common/inc/swref/published/nvswitch/ls10/dev_nvlipt_lnk_ip.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2003-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -635,4 +635,7 @@
 #define NV_NVLIPT_LNK_CTRL_CAP_LOCAL_LINK_CHANNEL_ALI_SUPPORT 28:28           /* RWIVF */
 #define NV_NVLIPT_LNK_CTRL_CAP_LOCAL_LINK_CHANNEL_ALI_SUPPORT_SUPPORTED 0x00000001 /* RWI-V */
 #define NV_NVLIPT_LNK_CTRL_CAP_LOCAL_LINK_CHANNEL_ALI_SUPPORT_NOT_SUPPORTED 0x00000000 /* RW--V */
+#define NV_NVLIPT_LNK_SCRATCH_WARM                            0x000007c0      /* RW-4R */
+#define NV_NVLIPT_LNK_SCRATCH_WARM_DATA                       31:0            /* RWEVF */
+#define NV_NVLIPT_LNK_SCRATCH_WARM_DATA_INIT                  0xdeadbaad      /* RWE-V */
 #endif // __ls10_dev_nvlipt_lnk_ip_h__
--- a/src/common/inc/swref/published/nvswitch/ls10/ptop_discovery_ip.h
+++ b/src/common/inc/swref/published/nvswitch/ls10/ptop_discovery_ip.h
@@ -0,0 +1,28 @@
+/*
+ * SPDX-FileCopyrightText: Copyright (c) 2003-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-License-Identifier: MIT
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the Software),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED AS IS, WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __ls10_ptop_discovery_ip_h__
+#define __ls10_ptop_discovery_ip_h__
+/* This file is autogenerated.  Do not edit */
+#define  NV_PTOP_UNICAST_SW_DEVICE_BASE_SAW_0                                0x00028000                    /*       */
+#endif // __ls10_ptop_discovery_ip_h__
--- a/src/common/inc/swref/published/turing/tu102/dev_nv_xve.h
+++ b/src/common/inc/swref/published/turing/tu102/dev_nv_xve.h
@@ -23,9 +23,18 @@

 #ifndef __tu102_dev_nv_xve_h__
 #define __tu102_dev_nv_xve_h__
-#define NV_PCFG                             0x00088FFF:0x00088000 /* RW--D */
+#define NV_PCFG                                     0x00088FFF:0x00088000 /* RW--D */
 #define NV_XVE_MSIX_CAP_HDR                                    0x000000C8 /* RW-4R */
 #define NV_XVE_MSIX_CAP_HDR_ENABLE                                  31:31 /* RWIVF */
 #define NV_XVE_MSIX_CAP_HDR_ENABLE_ENABLED                     0x00000001 /* RW--V */
 #define NV_XVE_MSIX_CAP_HDR_ENABLE_DISABLED                    0x00000000 /* RWI-V */
+#define NV_XVE_SRIOV_CAP_HDR3                                  0x00000BD8 /* R--4R */
+#define NV_XVE_SRIOV_CAP_HDR3_TOTAL_VFS                             31:16 /* R-EVF */
+#define NV_XVE_SRIOV_CAP_HDR5                                  0x00000BE0 /* R--4R */
+#define NV_XVE_SRIOV_CAP_HDR5_FIRST_VF_OFFSET                        15:0 /* R-IVF */
+#define NV_XVE_SRIOV_CAP_HDR9                                  0x00000BF0 /* RW-4R */
+#define NV_XVE_SRIOV_CAP_HDR10                                 0x00000BF4 /* RW-4R */
+#define NV_XVE_SRIOV_CAP_HDR11_VF_BAR1_HI                      0x00000BF8 /* RW-4R */
+#define NV_XVE_SRIOV_CAP_HDR12                                 0x00000BFC /* RW-4R */
+#define NV_XVE_SRIOV_CAP_HDR13_VF_BAR2_HI                      0x00000C00 /* RW-4R */
 #endif // __tu102_dev_nv_xve_h__
--- a/src/common/modeset/hdmipacket/nvhdmipkt.c
+++ b/src/common/modeset/hdmipacket/nvhdmipkt.c
@@ -315,7 +315,8 @@ NvHdmi_QueryFRLConfig(NvHdmiPkt_Handle                      libHandle,
    }

    // if there is no FRL capability reported fail this call
-    if (pSinkCaps->linkMaxFRLRate == HDMI_FRL_DATA_RATE_NONE)
+    if ((pSrcCaps->linkMaxFRLRate == HDMI_FRL_DATA_RATE_NONE) ||
+        (pSinkCaps->linkMaxFRLRate == HDMI_FRL_DATA_RATE_NONE))
    {
        return NVHDMIPKT_FAIL;
    }
--- a/src/common/modeset/timing/nvt_edid.c
+++ b/src/common/modeset/timing/nvt_edid.c
@@ -32,6 +32,8 @@

 #include "edid.h"

+
+
 PUSH_SEGMENTS

 // Macro to declare a TIMING initializer for given parameters without border
@@ -2096,8 +2098,8 @@ NvU32 NvTiming_EDIDValidationMask(NvU8 *pEdid, NvU32 length, NvBool bIsStrongVal

                    // validate DTD blocks
                    pDTD = (DETAILEDTIMINGDESCRIPTOR *)&pExt[((EIA861EXTENSION *)pExt)->offset];
-                    while (pDTD->wDTPixelClock != 0 &&
-                            (NvU8 *)pDTD - pExt < (int)sizeof(EIA861EXTENSION))
+                    while ((pDTD->wDTPixelClock != 0) &&
+                           (((NvU8 *)pDTD - pExt + sizeof(DETAILEDTIMINGDESCRIPTOR)) < ((NvU8)sizeof(EIA861EXTENSION) - 1)))
                    {
                        if (parseEdidDetailedTimingDescriptor((NvU8 *)pDTD, NULL) != NVT_STATUS_SUCCESS)
                        {
@@ -2340,7 +2342,8 @@ NvU32 NvTiming_EDIDStrongValidationMask(NvU8 *pEdid, NvU32 length)

                // validate DTD blocks
                pDTD = (DETAILEDTIMINGDESCRIPTOR *)&pExt[((EIA861EXTENSION *)pExt)->offset];
-                while (pDTD->wDTPixelClock != 0 && (NvU8 *)pDTD - pExt < (int)sizeof(EIA861EXTENSION))
+                while ((pDTD->wDTPixelClock != 0) &&
+                       (((NvU8 *)pDTD - pExt + sizeof(DETAILEDTIMINGDESCRIPTOR)) < ((NvU8)sizeof(EIA861EXTENSION) -1)))
                {
                    if (parseEdidDetailedTimingDescriptor((NvU8 *)pDTD, NULL) != NVT_STATUS_SUCCESS)
                        ret |= NVT_EDID_VALIDATION_ERR_MASK(NVT_EDID_VALIDATION_ERR_EXT_DTD);
--- a/src/common/modeset/timing/nvt_edidext_861.c
+++ b/src/common/modeset/timing/nvt_edidext_861.c
@@ -32,6 +32,8 @@

 #include "edid.h"

+
+
 PUSH_SEGMENTS

 #define EIA_TIMING(hv,hfp,hsw,ht,hsp,vv,vfp,vsw,vt,vsp,rrx1k,ip,aspect,rep,format) \
@@ -395,7 +397,7 @@ void parse861ExtDetailedTiming(NvU8 *pEdidExt,
    // Get all detailed timings in CEA ext block
    pDTD = (DETAILEDTIMINGDESCRIPTOR *)&pEdidExt[pEIA861->offset];

-    while((NvU8 *)pDTD < (pEdidExt + sizeof(EDIDV1STRUC)) && // Check that we're not going beyond this extension block.
+    while((NvU8 *)pDTD + sizeof(DETAILEDTIMINGDESCRIPTOR) < (pEdidExt + sizeof(EDIDV1STRUC) - 1) &&
          pDTD->wDTPixelClock != 0)
    {
        NVMISC_MEMSET(&newTiming, 0, sizeof(newTiming));
@@ -1111,10 +1113,12 @@ void parseCta861VsdbBlocks(NVT_EDID_CEA861_INFO *pExt861,

            case NVT_CEA861_NVDA_IEEE_ID:
                parseEdidNvidiaVSDBBlock((VSDB_DATA *)(&pExt861->vsdb[i]), pNvVsdb);
+                pExt861->valid.nvda_vsdb = 1;
                break;

            case NVT_CEA861_MSFT_IEEE_ID:
                parseEdidMsftVsdbBlock((VSDB_DATA *)(&pExt861->vsdb[i]), pMsftVsdb);
+                pExt861->valid.msft_vsdb = 1;
                break;

        }
@@ -1301,7 +1305,12 @@ NVT_STATUS parseCta861DataBlockInfo(NvU8 *p,
        tag = NVT_CEA861_GET_SHORT_DESCRIPTOR_TAG(p[i]);
        payload = NVT_CEA861_GET_SHORT_DESCRIPTOR_SIZE(p[i]);

-        // move the pointer to the payload section
+        /*don't allow data colleciton totally size larger than [127 - 5 (tag, revision, offset, describing native video format, checksum)]*/
+        if ((i + payload > size) || (i + payload > 122))  
+        {
+            return NVT_STATUS_ERR;
+        }
+        // move the pointer to the payload section or extended Tag Code
        i++;
        
        // NvTiming_EDIDValidationMask will use the different tag/payload value to make sure each of cta861 data block legal
--- a/src/common/modeset/timing/nvt_edidext_displayid20.c
+++ b/src/common/modeset/timing/nvt_edidext_displayid20.c
@@ -245,13 +245,20 @@ parseDisplayId20EDIDExtDataBlocks(

            // copy all the vendor specific data block from DisplayId20 to pEdidInfo
            // NOTE: mixed CTA extension block and DID2.0 extension block are not handled
-            NVMISC_MEMCPY(&pEdidInfo->hdmiLlcInfo,              &pDisplayId20Info->vendor_specific.hdmiLlc,  sizeof(NVT_HDMI_LLC_INFO));
-            NVMISC_MEMCPY(&pEdidInfo->hdmiForumInfo,            &pDisplayId20Info->vendor_specific.hfvs,     sizeof(NVT_HDMI_FORUM_INFO));
-            NVMISC_MEMCPY(&pEdidInfo->nvdaVsdbInfo,             &pDisplayId20Info->vendor_specific.nvVsdb,   sizeof(NVDA_VSDB_PARSED_INFO));
-            NVMISC_MEMCPY(&pEdidInfo->msftVsdbInfo,             &pDisplayId20Info->vendor_specific.msftVsdb, sizeof(MSFT_VSDB_PARSED_INFO));
-            NVMISC_MEMCPY(&pEdidInfo->hdr_static_metadata_info, &pDisplayId20Info->cta.hdrInfo,              sizeof(NVT_HDR_STATIC_METADATA));
-            NVMISC_MEMCPY(&pEdidInfo->dv_static_metadata_info,  &pDisplayId20Info->cta.dvInfo,               sizeof(NVT_DV_STATIC_METADATA));
-            NVMISC_MEMCPY(&pEdidInfo->hdr10PlusInfo,            &pDisplayId20Info->cta.hdr10PlusInfo,        sizeof(NVT_HDR10PLUS_INFO));
+            if (pEdidInfo->ext861.valid.H14B_VSDB == 0 && pEdidInfo->ext861_2.valid.H14B_VSDB == 0 && pDisplayId20Info->cta.cta861_info.valid.H14B_VSDB)
+                NVMISC_MEMCPY(&pEdidInfo->hdmiLlcInfo,              &pDisplayId20Info->vendor_specific.hdmiLlc,  sizeof(NVT_HDMI_LLC_INFO));
+            if (pEdidInfo->ext861.valid.H20_HF_VSDB == 0 && pEdidInfo->ext861_2.valid.H20_HF_VSDB == 0 && pDisplayId20Info->cta.cta861_info.valid.H20_HF_VSDB)
+                NVMISC_MEMCPY(&pEdidInfo->hdmiForumInfo,            &pDisplayId20Info->vendor_specific.hfvs,     sizeof(NVT_HDMI_FORUM_INFO));
+            if (pEdidInfo->ext861.valid.nvda_vsdb == 0 && pEdidInfo->ext861_2.valid.nvda_vsdb == 0 && pDisplayId20Info->cta.cta861_info.valid.nvda_vsdb)
+                NVMISC_MEMCPY(&pEdidInfo->nvdaVsdbInfo,             &pDisplayId20Info->vendor_specific.nvVsdb,   sizeof(NVDA_VSDB_PARSED_INFO));
+            if (pEdidInfo->ext861.valid.msft_vsdb == 0 && pEdidInfo->ext861_2.valid.msft_vsdb == 0 && pDisplayId20Info->cta.cta861_info.valid.msft_vsdb)
+                NVMISC_MEMCPY(&pEdidInfo->msftVsdbInfo,             &pDisplayId20Info->vendor_specific.msftVsdb, sizeof(MSFT_VSDB_PARSED_INFO));
+            if (pEdidInfo->ext861.valid.hdr_static_metadata == 0 && pEdidInfo->ext861_2.valid.hdr_static_metadata == 0 && pDisplayId20Info->cta.cta861_info.valid.hdr_static_metadata)
+                NVMISC_MEMCPY(&pEdidInfo->hdr_static_metadata_info, &pDisplayId20Info->cta.hdrInfo,              sizeof(NVT_HDR_STATIC_METADATA));
+            if (pEdidInfo->ext861.valid.dv_static_metadata == 0 && pEdidInfo->ext861_2.valid.dv_static_metadata == 0 && pDisplayId20Info->cta.cta861_info.valid.dv_static_metadata)
+                NVMISC_MEMCPY(&pEdidInfo->dv_static_metadata_info,  &pDisplayId20Info->cta.dvInfo,               sizeof(NVT_DV_STATIC_METADATA));
+            if (pEdidInfo->ext861.valid.hdr10Plus == 0 && pEdidInfo->ext861_2.valid.hdr10Plus == 0 && pDisplayId20Info->cta.cta861_info.valid.hdr10Plus)
+                NVMISC_MEMCPY(&pEdidInfo->hdr10PlusInfo,            &pDisplayId20Info->cta.hdr10PlusInfo,        sizeof(NVT_HDR10PLUS_INFO));

            // If the CTA861 extension existed already, we need to synced the revision/basic_caps to CTA which is embedded in DID20
            if (pEdidInfo->ext861.revision >= NVT_CEA861_REV_B)
@@ -262,7 +269,10 @@ parseDisplayId20EDIDExtDataBlocks(
            }

            // this is the DisplayID20 Extension, so we need to copy from what is the CTA raw data in DID20 to Edid's CTA block
-            NVMISC_MEMCPY(&pEdidInfo->ext861,                   &pDisplayId20Info->cta.cta861_info,          sizeof(NVT_EDID_CEA861_INFO));
+            if (pEdidInfo->ext861.revision == 0)
+                NVMISC_MEMCPY(&pEdidInfo->ext861, &pDisplayId20Info->cta.cta861_info, sizeof(NVT_EDID_CEA861_INFO));
+            else if (pEdidInfo->ext861_2.revision == 0)
+                NVMISC_MEMCPY(&pEdidInfo->ext861_2, &pDisplayId20Info->cta.cta861_info, sizeof(NVT_EDID_CEA861_INFO));
        break;

        case DISPLAYID_2_0_BLOCK_TYPE_DISPLAY_PARAM:
--- a/src/common/modeset/timing/nvtiming.h
+++ b/src/common/modeset/timing/nvtiming.h
@@ -1123,6 +1123,8 @@ typedef struct tagNVT_VALID_EXTENDED_BLOCKS
    NvU32   hdr10Plus           :  1;
    NvU32   SCDB                :  1;
    NvU32   HF_EEODB            :  1;
+    NvU32   nvda_vsdb           :  1;
+    NvU32   msft_vsdb           :  1;
 } NVT_VALID_EXTENDED_BLOCKS;


--- a/src/common/nvlink/interface/nvlink.h
+++ b/src/common/nvlink/interface/nvlink.h
@@ -1,5 +1,5 @@
 /*******************************************************************************
-    Copyright (c) 2014-2022 NVidia Corporation
+    Copyright (c) 2014-2023 NVidia Corporation

    Permission is hereby granted, free of charge, to any person obtaining a copy
    of this software and associated documentation files (the "Software"), to
@@ -120,6 +120,12 @@ struct nvlink_device
    NvU32 numLinksPerIoctrl;
    NvU32 numActiveLinksPerIoctrl;

+    //
+    // boolean indicating if a given device
+    // is a reduced nvlink config
+    //
+    NvBool bReducedNvlinkConfig;
+
    // Client private information
    void *pDevInfo;
 };
@@ -141,6 +147,20 @@ struct nvlink_link_change
    enum nvlink_link_change_type change_type;
 };

+//
+// Structure representing Nvlink Error Threshold
+//
+struct nvlink_link_error_threshold
+{
+    NvU8 thresholdMan;
+    NvU8 thresholdExp;
+    NvU8 timescaleMan;
+    NvU8 timescaleExp;
+    NvBool bInterruptEn;
+    NvBool bUserConfig;
+    NvBool bInterruptTrigerred; // Error threshold interrupt generated
+};
+
 // nvlink link state
 struct nvlink_link
 {
@@ -233,6 +253,8 @@ struct nvlink_link

    //seed data for given nvlink
    NvU32 seedData[NVLINK_MAX_SEED_BUFFER_SIZE];
+
+    struct nvlink_link_error_threshold errorThreshold;
 };

 // nvlink link handler ops
@@ -381,6 +403,10 @@ NvBool nvlink_lib_is_initialized(void);
 */
 NvBool nvlink_lib_is_device_list_empty(void);

+/*
+ * Get if a device registerd to the nvlink corelib has a reduced nvlink config
+ */
+NvBool nvlink_lib_is_registerd_device_with_reduced_config(void);

 /************************************************************************************************/
 /************************** NVLink library driver-side interface ********************************/
@@ -413,6 +439,11 @@ NvlStatus nvlink_lib_register_link(nvlink_device *dev, nvlink_link *link);
 */
 NvlStatus nvlink_lib_unregister_link(nvlink_link *link);

+/*
+* Gets number of devices with type deviceType
+*/
+NvlStatus nvlink_lib_return_device_count_by_type(NvU32 deviceType, NvU32 *numDevices);
+

 /************************************************************************************************/
 /******************************* NVLink link management functions *******************************/
@@ -449,6 +480,7 @@ NvlStatus nvlink_lib_is_link_using_ALI(nvlink_link *link, NvBool *usingALI);
 * Set the training state for the given link as non-ALI or ALI
 */
 NvlStatus nvlink_lib_link_set_training_mode(nvlink_link *link, NvBool enableALI);
+
 /************************************************************************************************/
 /*************************** NVLink topology discovery functions ********************************/
 /************************************************************************************************/
--- a/src/common/nvlink/interface/nvlink_export.h
+++ b/src/common/nvlink/interface/nvlink_export.h
@@ -46,6 +46,11 @@ NvlStatus nvlink_lib_unload(void);
 */
 NvlStatus nvlink_lib_ioctl_ctrl(nvlink_ioctrl_params *ctrl_params);

+/*
+* Gets number of devices with type deviceType
+*/
+NvlStatus nvlink_lib_return_device_count_by_type(NvU32 deviceType, NvU32 *numDevices);
+
 #ifdef __cplusplus
 }
 #endif
--- a/src/common/nvlink/interface/nvlink_os.h
+++ b/src/common/nvlink/interface/nvlink_os.h
@@ -30,6 +30,9 @@ extern "C" {

 #include "nvlink_common.h"

+#define TOP_LEVEL_LOCKING_DISABLED 1 
+#define PER_LINK_LOCKING_DISABLED 1 
+
 #define NVLINK_FREE(x) nvlink_free((void *)x)

 // Memory management functions
--- a/src/common/nvlink/kernel/nvlink/core/nvlink_shutdown.c
+++ b/src/common/nvlink/kernel/nvlink/core/nvlink_shutdown.c
@@ -1047,7 +1047,7 @@ nvlink_core_powerdown_floorswept_conns_to_off
        if (numConnsToShutdown != 0)
        {
            nvlink_core_powerdown_intranode_conns_from_active_to_off(connsToShutdown, numConnsToShutdown, 0);
-            nvlink_core_reset_intranode_conns(connsToShutdown, numConnsToShutdown, NVLINK_STATE_CHANGE_ASYNC);
+            nvlink_core_reset_intranode_conns(connsToShutdown, numConnsToShutdown, NVLINK_STATE_CHANGE_SYNC);

            for (j = 0; j < numConnsToShutdown; ++j)
            {
@@ -1056,5 +1056,8 @@ nvlink_core_powerdown_floorswept_conns_to_off
        }
    }

+    nvlink_free(visitedConns);
+    nvlink_free(connsToShutdown);
+
    return NVL_SUCCESS;
 }
--- a/src/common/nvlink/kernel/nvlink/nvlink_lib_mgmt.c
+++ b/src/common/nvlink/kernel/nvlink/nvlink_lib_mgmt.c
@@ -1,5 +1,5 @@
 /*******************************************************************************
-    Copyright (c) 2019-2020 NVidia Corporation
+    Copyright (c) 2019-2023 NVidia Corporation

    Permission is hereby granted, free of charge, to any person obtaining a copy
    of this software and associated documentation files (the "Software"), to
@@ -127,8 +127,8 @@ nvlink_lib_unload(void)
        }

        // Release and free top-level lock
-        nvlink_lib_top_lock_release(); 
-        nvlink_lib_top_lock_free(); 
+        nvlink_lib_top_lock_release();
+        nvlink_lib_top_lock_free();
    }

    return NVL_SUCCESS;
@@ -160,3 +160,86 @@ nvlink_lib_is_device_list_empty(void)
    return isEmpty;
 }

+/*
+ * Get if a device registerd to the nvlink corelib has a reduced nvlink config
+ *
+ * return NV_TRUE if there is a device registered to the core library that is a reduced
+ * nvlink config device
+ */
+NvBool
+nvlink_lib_is_registerd_device_with_reduced_config(void)
+{
+    NvlStatus lock_status = NVL_SUCCESS;
+    nvlink_device *dev    = NULL;
+
+    // Acquire top-level lock
+    lock_status = nvlink_lib_top_lock_acquire();
+    if (lock_status != NVL_SUCCESS)
+    {
+        NVLINK_PRINT((DBG_MODULE_NVLINK_CORE, NVLINK_DBG_LEVEL_ERRORS,
+            "%s: Failed to acquire top-level lock\n",
+            __FUNCTION__));
+
+        return NV_FALSE;
+     }
+
+    FOR_EACH_DEVICE_REGISTERED(dev, nvlinkLibCtx.nv_devicelist_head, node)
+    {
+        if (dev->bReducedNvlinkConfig == NV_TRUE)
+        {
+            // Release top-level lock
+            nvlink_lib_top_lock_release();
+            return NV_TRUE;
+        }
+    }
+
+    // Release top-level lock
+    nvlink_lib_top_lock_release();
+
+    return NV_FALSE;
+}
+
+/*
+* Get the number of devices that have the device type deviceType
+*/
+NvlStatus
+nvlink_lib_return_device_count_by_type
+(
+    NvU32 deviceType,
+    NvU32 *numDevices
+)
+{
+    NvlStatus lock_status = NVL_SUCCESS;
+    nvlink_device *dev = NULL;
+    NvU32 device_count = 0;
+
+    if (nvlink_lib_is_initialized())
+    {
+        // Acquire top-level lock
+        lock_status = nvlink_lib_top_lock_acquire();
+        if (lock_status != NVL_SUCCESS)
+        {
+            NVLINK_PRINT((DBG_MODULE_NVLINK_CORE, NVLINK_DBG_LEVEL_ERRORS,
+                "%s: Failed to acquire top-level lock\n",
+                __FUNCTION__));
+
+            return lock_status;
+         }
+
+        // Top-level lock is now acquired
+
+        // Loop through device list
+        FOR_EACH_DEVICE_REGISTERED(dev, nvlinkLibCtx.nv_devicelist_head, node)
+        {
+            if (dev->type == deviceType)
+            {
+                device_count++;
+            }
+        }
+
+        // Release top-level lock
+        nvlink_lib_top_lock_release(); 
+    }
+    *numDevices = device_count;
+    return NVL_SUCCESS;
+}
--- a/src/common/nvlink/kernel/nvlink/nvlink_lock.c
+++ b/src/common/nvlink/kernel/nvlink/nvlink_lock.c
@@ -26,14 +26,18 @@
 #include "nvlink_lock.h"

 //
-// Only enabling locking for testing purposes at the moment.
-// Disabled at all other times.
-//
-#define LOCKING_DISABLED 1 
+// Only enabling top level locking for linux as required by Bug 4108674.
+// Per link locking is still disabled at all times. It will be enabled 
+// after other locking related clean up is done.
+// 

 static void   _sort_links(nvlink_link **, NvU32, NvBool (*)(void *, void *));
 static NvBool _compare(void *, void *);

+#if defined(NV_LINUX)
+#undef TOP_LEVEL_LOCKING_DISABLED 
+#   define TOP_LEVEL_LOCKING_DISABLED 0
+#endif  /* defined(NV_LINUX) */
 /*
 * Allocate top level lock. Return NVL_SUCCESS if 
 * the lock was allocated else return NVL_ERR_GENERIC.
@@ -41,7 +45,7 @@ static NvBool _compare(void *, void *);
 NvlStatus
 nvlink_lib_top_lock_alloc(void)
 {
-    if (LOCKING_DISABLED)
+    if (TOP_LEVEL_LOCKING_DISABLED)
    {
        return NVL_SUCCESS;
    }
@@ -82,7 +86,7 @@ nvlink_lib_top_lock_alloc(void)
 NvlStatus
 nvlink_lib_top_lock_free(void)
 {
-    if (LOCKING_DISABLED)
+    if (TOP_LEVEL_LOCKING_DISABLED)
    {
        return NVL_SUCCESS;
    }
@@ -115,7 +119,7 @@ nvlink_lib_link_lock_alloc
    nvlink_link *link
 )
 {
-    if (LOCKING_DISABLED)
+    if (PER_LINK_LOCKING_DISABLED)
    {
        return NVL_SUCCESS;
    }
@@ -158,7 +162,7 @@ nvlink_lib_link_lock_free
    nvlink_link *link
 )
 {
-    if (LOCKING_DISABLED)
+    if (PER_LINK_LOCKING_DISABLED)
    {
        return NVL_SUCCESS;
    }
@@ -188,7 +192,7 @@ nvlink_lib_link_lock_free
 NvlStatus
 nvlink_lib_top_lock_acquire(void)
 {
-    if (LOCKING_DISABLED)
+    if (TOP_LEVEL_LOCKING_DISABLED)
    {
        return NVL_SUCCESS;
    }
@@ -223,7 +227,7 @@ nvlink_lib_top_lock_acquire(void)
 NvlStatus
 nvlink_lib_top_lock_release(void)
 {
-    if (LOCKING_DISABLED)
+    if (TOP_LEVEL_LOCKING_DISABLED)
    {
        return NVL_SUCCESS;
    }
@@ -265,13 +269,12 @@ nvlink_lib_link_locks_acquire
    int           numLinks
 )
 {
-    if (LOCKING_DISABLED)
+    if (PER_LINK_LOCKING_DISABLED)
    {
        return NVL_SUCCESS;
    }

    int i;
-
    nvlink_link *link_prev  = NULL;

    // Check if array of links is already empty before attempting to release. 
@@ -328,13 +331,12 @@ nvlink_lib_link_locks_release
    int           numLinks
 )
 {
-    int i;
-
-    if (LOCKING_DISABLED)
+    if (PER_LINK_LOCKING_DISABLED)
    {
        return NVL_SUCCESS;
    }

+    int i;
    nvlink_link *link_prev  = NULL;

    // Check if array of links is already empty before attempting to release. 
--- a/src/common/nvswitch/common/inc/rmsoecmdif.h
+++ b/src/common/nvswitch/common/inc/rmsoecmdif.h
@@ -89,6 +89,7 @@ typedef struct
        RM_SOE_THERM_MSG     soeTherm;
        RM_FLCN_MSG_SOE_INIT init;
        RM_SOE_CHNMGMT_MSG   chnmgmt;
+        RM_SOE_CORE_MSG      core;   
    } msg;
 } RM_FLCN_MSG_SOE,
 *PRM_FLCN_MSG_SOE;
--- a/src/common/nvswitch/common/inc/soe/soeifcore.h
+++ b/src/common/nvswitch/common/inc/soe/soeifcore.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -40,37 +40,62 @@ enum
    /*!
     * Read the BIOS Size
     */
-    RM_SOE_CORE_CMD_READ_BIOS_SIZE,
+    RM_SOE_CORE_CMD_READ_BIOS_SIZE = 0x0,

    /*!
     * Read the BIOS
     */
-    RM_SOE_CORE_CMD_READ_BIOS,
+    RM_SOE_CORE_CMD_READ_BIOS = 0x1,

    /*!
     * Run DMA self-test
     */
-    RM_SOE_CORE_CMD_DMA_SELFTEST,
+    RM_SOE_CORE_CMD_DMA_SELFTEST = 0x2,

    /*!
     * Perform I2C transaction
     */
-    RM_SOE_CORE_CMD_I2C_ACCESS,
+    RM_SOE_CORE_CMD_I2C_ACCESS = 0x3,

    /*!
     * Issue NPORT Reset
     */
-    RM_SOE_CORE_CMD_ISSUE_NPORT_RESET,
+    RM_SOE_CORE_CMD_ISSUE_NPORT_RESET = 0x4,

    /*!
     * Restore NPORT state
     */
-    RM_SOE_CORE_CMD_RESTORE_NPORT_STATE,
+    RM_SOE_CORE_CMD_RESTORE_NPORT_STATE = 0x5,

    /*!
     * Set NPORT TPROD state
     */
-    RM_SOE_CORE_CMD_SET_NPORT_TPROD_STATE
+    RM_SOE_CORE_CMD_SET_NPORT_TPROD_STATE = 0x6,
+
+    /*!
+     * Read VRs
+     */
+    RM_SOE_CORE_CMD_GET_VOLTAGE_VALUES = 0x7,
+
+    /*!
+     * Init PLM2 protected registers
+     */
+    RM_SOE_CORE_CMD_INIT_L2_STATE = 0x8,
+
+    /*!
+     * Read Power
+     */
+    RM_SOE_CORE_CMD_GET_POWER_VALUES = 0x9,
+
+    /*!
+     * Set NPORT interrupts
+     */
+    RM_SOE_CORE_CMD_SET_NPORT_INTRS = 0xA,
+
+    /*!
+     * Disable NPORT fatal interrupt
+     */
+    RM_SOE_CORE_CMD_DISABLE_NPORT_FATAL_INTR = 0xF,
 };

 // Timeout for SOE reset callback function
@@ -132,6 +157,51 @@ typedef struct
    NvU32  nport;
 } RM_SOE_CORE_CMD_NPORT_TPROD_STATE;

+typedef struct
+{
+    NvU8   cmdType;
+} RM_SOE_CORE_CMD_GET_VOLTAGE;
+
+typedef struct
+{
+    NvU8   cmdType;
+} RM_SOE_CORE_CMD_L2_STATE;
+
+typedef struct
+{
+    NvU8   cmdType;
+} RM_SOE_CORE_CMD_GET_POWER;
+
+typedef struct
+{
+    NvU8   cmdType;
+    NvU32  nport;
+    NvBool bEnable;
+} RM_SOE_CORE_CMD_NPORT_INTRS;
+
+typedef struct
+{
+    NvU8   cmdType;
+    NvU32  nport;
+    NvU32  nportIntrEnable;
+    NvU8   nportIntrType;
+} RM_SOE_CORE_CMD_NPORT_FATAL_INTR;
+
+/*!
+ * NPORT Interrupt Types 
+ */
+enum
+{
+    RM_SOE_CORE_NPORT_ROUTE_INTERRUPT,
+    RM_SOE_CORE_NPORT_INGRESS_INTERRUPT,
+    RM_SOE_CORE_NPORT_EGRESS_0_INTERRUPT,
+    RM_SOE_CORE_NPORT_EGRESS_1_INTERRUPT,
+    RM_SOE_CORE_NPORT_TSTATE_INTERRUPT,
+    RM_SOE_CORE_NPORT_SOURCETRACK_INTERRUPT,
+    RM_SOE_CORE_NPORT_MULTICAST_INTERRUPT,
+    RM_SOE_CORE_NPORT_REDUCTION_INTERRUPT
+};
+
 typedef union
 {
    NvU8 cmdType;
@@ -141,5 +211,35 @@ typedef union
    RM_SOE_CORE_CMD_NPORT_RESET nportReset;
    RM_SOE_CORE_CMD_NPORT_STATE nportState;
    RM_SOE_CORE_CMD_NPORT_TPROD_STATE nportTprodState;
+    RM_SOE_CORE_CMD_GET_VOLTAGE getVoltage;
+    RM_SOE_CORE_CMD_L2_STATE l2State;
+    RM_SOE_CORE_CMD_GET_POWER getPower;
+    RM_SOE_CORE_CMD_NPORT_INTRS nportIntrs;
+    RM_SOE_CORE_CMD_NPORT_FATAL_INTR nportDisableIntr;
 } RM_SOE_CORE_CMD;
+
+typedef struct
+{
+    NvU8   msgType;
+    NvU8   flcnStatus;
+    NvU32  vdd_mv;
+    NvU32  dvdd_mv;
+    NvU32  hvdd_mv;
+} RM_SOE_CORE_MSG_GET_VOLTAGE;
+
+typedef struct
+{
+    NvU8   msgType;
+    NvU8   flcnStatus;
+    NvU32  vdd_w;
+    NvU32  dvdd_w;
+    NvU32  hvdd_w;
+} RM_SOE_CORE_MSG_GET_POWER;
+
+typedef union
+{
+    NvU8 msgType;
+    RM_SOE_CORE_MSG_GET_VOLTAGE getVoltage;
+    RM_SOE_CORE_MSG_GET_POWER getPower;
+} RM_SOE_CORE_MSG;
 #endif  // _SOECORE_H_
--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
Bernhard Stoeckner	207a166fc3	525.147.05	2023-10-31 14:38:27 +01:00
Maneet Singh	1f3ce1beab	525.125.06	2023-06-28 11:59:51 -07:00
Andy Ritger	ad22fd4262	525.116.04	2023-05-09 11:41:15 -07:00
Andy Ritger	a0e46cabd3	525.116.03	2023-04-25 14:05:57 -07:00
Andy Ritger	ebcc6656ff	525.105.17	2023-03-30 10:16:11 -07:00
Andy Ritger	e598191e8e	525.89.02	2023-02-08 10:15:15 -08:00
Maneet Singh	1dc88ff75e	525.85.12	2023-01-30 16:30:12 -08:00
Andy Ritger	811073c51e	525.85.05	2023-01-19 10:41:59 -08:00
Andy Ritger	dac2350c7f	525.78.01	2023-01-05 10:40:27 -08:00