mirror of
https://github.com/NVIDIA/open-gpu-kernel-modules.git
synced 2026-01-29 20:49:46 +00:00
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2 Commits
550.120
...
550.127.08
| Author | SHA1 | Date | |
|---|---|---|---|
|
|
7d3cbfe254 | ||
|
|
9940d2229a |
@@ -1,7 +1,7 @@
|
||||
# NVIDIA Linux Open GPU Kernel Module Source
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||||
|
||||
This is the source release of the NVIDIA Linux open GPU kernel modules,
|
||||
version 550.120.
|
||||
version 550.127.08.
|
||||
|
||||
|
||||
## How to Build
|
||||
@@ -17,7 +17,7 @@ as root:
|
||||
|
||||
Note that the kernel modules built here must be used with GSP
|
||||
firmware and user-space NVIDIA GPU driver components from a corresponding
|
||||
550.120 driver release. This can be achieved by installing
|
||||
550.127.08 driver release. This can be achieved by installing
|
||||
the NVIDIA GPU driver from the .run file using the `--no-kernel-modules`
|
||||
option. E.g.,
|
||||
|
||||
@@ -188,7 +188,7 @@ encountered specific to them.
|
||||
For details on feature support and limitations, see the NVIDIA GPU driver
|
||||
end user README here:
|
||||
|
||||
https://us.download.nvidia.com/XFree86/Linux-x86_64/550.120/README/kernel_open.html
|
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https://us.download.nvidia.com/XFree86/Linux-x86_64/550.127.08/README/kernel_open.html
|
||||
|
||||
For vGPU support, please refer to the README.vgpu packaged in the vGPU Host
|
||||
Package for more details.
|
||||
@@ -754,6 +754,8 @@ Subsystem Device ID.
|
||||
| NVIDIA H800 | 2324 10DE 17A8 |
|
||||
| NVIDIA H20 | 2329 10DE 198B |
|
||||
| NVIDIA H20 | 2329 10DE 198C |
|
||||
| NVIDIA H20-3e | 232C 10DE 2063 |
|
||||
| NVIDIA H20-3e | 232C 10DE 2064 |
|
||||
| NVIDIA H100 80GB HBM3 | 2330 10DE 16C0 |
|
||||
| NVIDIA H100 80GB HBM3 | 2330 10DE 16C1 |
|
||||
| NVIDIA H100 PCIe | 2331 10DE 1626 |
|
||||
|
||||
@@ -72,7 +72,7 @@ EXTRA_CFLAGS += -I$(src)/common/inc
|
||||
EXTRA_CFLAGS += -I$(src)
|
||||
EXTRA_CFLAGS += -Wall $(DEFINES) $(INCLUDES) -Wno-cast-qual -Wno-format-extra-args
|
||||
EXTRA_CFLAGS += -D__KERNEL__ -DMODULE -DNVRM
|
||||
EXTRA_CFLAGS += -DNV_VERSION_STRING=\"550.120\"
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EXTRA_CFLAGS += -DNV_VERSION_STRING=\"550.127.08\"
|
||||
|
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ifneq ($(SYSSRCHOST1X),)
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EXTRA_CFLAGS += -I$(SYSSRCHOST1X)
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|
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@@ -379,6 +379,17 @@ NV_STATUS UvmIsPageableMemoryAccessSupportedOnGpu(const NvProcessorUuid *gpuUuid
|
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// OS state required to register the GPU is malformed, or the partition
|
||||
// identified by the user handles or its configuration changed.
|
||||
//
|
||||
// NV_ERR_NVSWITCH_FABRIC_NOT_READY:
|
||||
// (On NvSwitch-connected system) Indicates that the fabric has not been
|
||||
// configured yet. Caller must retry GPU registration.
|
||||
//
|
||||
// NV_ERR_NVSWITCH_FABRIC_FAILURE:
|
||||
// (On NvSwitch-connected systems) Indicates that the NvLink fabric
|
||||
// failed to be configured.
|
||||
//
|
||||
// NV_ERR_GPU_MEMORY_ONLINING_FAULURE:
|
||||
// (On coherent systems) The GPU's memory onlining failed.
|
||||
//
|
||||
// NV_ERR_GENERIC:
|
||||
// Unexpected error. We try hard to avoid returning this error code,
|
||||
// because it is not very informative.
|
||||
|
||||
@@ -138,6 +138,7 @@ static NV_STATUS get_gpu_caps(uvm_gpu_t *gpu)
|
||||
|
||||
if (gpu_caps.numaEnabled) {
|
||||
UVM_ASSERT(uvm_parent_gpu_is_coherent(gpu->parent));
|
||||
|
||||
gpu->mem_info.numa.enabled = true;
|
||||
gpu->mem_info.numa.node_id = gpu_caps.numaNodeId;
|
||||
}
|
||||
@@ -1280,7 +1281,8 @@ static NV_STATUS init_gpu(uvm_gpu_t *gpu, const UvmGpuInfo *gpu_info)
|
||||
|
||||
status = get_gpu_caps(gpu);
|
||||
if (status != NV_OK) {
|
||||
UVM_ERR_PRINT("Failed to get GPU caps: %s, GPU %s\n", nvstatusToString(status), uvm_gpu_name(gpu));
|
||||
if (status != NV_ERR_NVSWITCH_FABRIC_NOT_READY)
|
||||
UVM_ERR_PRINT("Failed to get GPU caps: %s, GPU %s\n", nvstatusToString(status), uvm_gpu_name(gpu));
|
||||
return status;
|
||||
}
|
||||
|
||||
|
||||
@@ -40,6 +40,9 @@
|
||||
#if !defined(NV_BUS_TYPE_HAS_IOMMU_OPS)
|
||||
#include <linux/iommu.h>
|
||||
#endif
|
||||
#if NV_IS_EXPORT_SYMBOL_GPL_pci_ats_supported
|
||||
#include <linux/pci-ats.h>
|
||||
#endif
|
||||
|
||||
static void
|
||||
nv_check_and_exclude_gpu(
|
||||
@@ -781,10 +784,15 @@ next_bar:
|
||||
// PPC64LE platform where ATS is currently supported (IBM P9).
|
||||
nv_ats_supported &= nv_platform_supports_numa(nvl);
|
||||
#else
|
||||
#if defined(NV_PCI_DEV_HAS_ATS_ENABLED)
|
||||
#if NV_IS_EXPORT_SYMBOL_GPL_pci_ats_supported
|
||||
nv_ats_supported &= pci_ats_supported(pci_dev);
|
||||
#elif defined(NV_PCI_DEV_HAS_ATS_ENABLED)
|
||||
nv_ats_supported &= pci_dev->ats_enabled;
|
||||
#else
|
||||
nv_ats_supported = NV_FALSE;
|
||||
#endif
|
||||
#endif
|
||||
|
||||
if (nv_ats_supported)
|
||||
{
|
||||
NV_DEV_PRINTF(NV_DBG_INFO, nv, "ATS supported by this GPU!\n");
|
||||
|
||||
@@ -188,11 +188,7 @@ struct semaphore nv_linux_devices_lock;
|
||||
|
||||
// True if all the successfully probed devices support ATS
|
||||
// Assigned at device probe (module init) time
|
||||
NvBool nv_ats_supported = NVCPU_IS_PPC64LE
|
||||
#if defined(NV_PCI_DEV_HAS_ATS_ENABLED)
|
||||
|| NV_TRUE
|
||||
#endif
|
||||
;
|
||||
NvBool nv_ats_supported = NV_TRUE;
|
||||
|
||||
// allow an easy way to convert all debug printfs related to events
|
||||
// back and forth between 'info' and 'errors'
|
||||
|
||||
@@ -231,6 +231,7 @@ NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_tsec_comms_free_gsc
|
||||
NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_memory_block_size_bytes
|
||||
NV_CONFTEST_SYMBOL_COMPILE_TESTS += crypto
|
||||
NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_present_follow_pte
|
||||
NV_CONFTEST_SYMBOL_COMPILE_TESTS += is_export_symbol_gpl_pci_ats_supported
|
||||
|
||||
NV_CONFTEST_TYPE_COMPILE_TESTS += dma_ops
|
||||
NV_CONFTEST_TYPE_COMPILE_TESTS += swiotlb_dma_ops
|
||||
|
||||
@@ -36,25 +36,25 @@
|
||||
// and then checked back in. You cannot make changes to these sections without
|
||||
// corresponding changes to the buildmeister script
|
||||
#ifndef NV_BUILD_BRANCH
|
||||
#define NV_BUILD_BRANCH r550_00
|
||||
#define NV_BUILD_BRANCH r553_17
|
||||
#endif
|
||||
#ifndef NV_PUBLIC_BRANCH
|
||||
#define NV_PUBLIC_BRANCH r550_00
|
||||
#define NV_PUBLIC_BRANCH r553_17
|
||||
#endif
|
||||
|
||||
#if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS)
|
||||
#define NV_BUILD_BRANCH_VERSION "rel/gpu_drv/r550/r550_00-410"
|
||||
#define NV_BUILD_CHANGELIST_NUM (34843164)
|
||||
#define NV_BUILD_BRANCH_VERSION "rel/gpu_drv/r550/r553_17-432"
|
||||
#define NV_BUILD_CHANGELIST_NUM (35042495)
|
||||
#define NV_BUILD_TYPE "Official"
|
||||
#define NV_BUILD_NAME "rel/gpu_drv/r550/r550_00-410"
|
||||
#define NV_LAST_OFFICIAL_CHANGELIST_NUM (34843164)
|
||||
#define NV_BUILD_NAME "rel/gpu_drv/r550/r553_17-432"
|
||||
#define NV_LAST_OFFICIAL_CHANGELIST_NUM (35042495)
|
||||
|
||||
#else /* Windows builds */
|
||||
#define NV_BUILD_BRANCH_VERSION "r550_00-390"
|
||||
#define NV_BUILD_CHANGELIST_NUM (34843164)
|
||||
#define NV_BUILD_BRANCH_VERSION "r553_17-3"
|
||||
#define NV_BUILD_CHANGELIST_NUM (34957518)
|
||||
#define NV_BUILD_TYPE "Official"
|
||||
#define NV_BUILD_NAME "553.09"
|
||||
#define NV_LAST_OFFICIAL_CHANGELIST_NUM (34843164)
|
||||
#define NV_BUILD_NAME "553.24"
|
||||
#define NV_LAST_OFFICIAL_CHANGELIST_NUM (34957518)
|
||||
#define NV_BUILD_BRANCH_BASE_VERSION R550
|
||||
#endif
|
||||
// End buildmeister python edited section
|
||||
|
||||
@@ -4,7 +4,7 @@
|
||||
#if defined(NV_LINUX) || defined(NV_BSD) || defined(NV_SUNOS) || defined(NV_VMWARE) || defined(NV_QNX) || defined(NV_INTEGRITY) || \
|
||||
(defined(RMCFG_FEATURE_PLATFORM_GSP) && RMCFG_FEATURE_PLATFORM_GSP == 1)
|
||||
|
||||
#define NV_VERSION_STRING "550.120"
|
||||
#define NV_VERSION_STRING "550.127.08"
|
||||
|
||||
#else
|
||||
|
||||
|
||||
@@ -62,4 +62,14 @@
|
||||
#define NV_CTRL_CPU_INTR_UNITS_PRIV_RING 15:15
|
||||
#define NV_CTRL_CPU_INTR_UNITS_FSP 16:16
|
||||
|
||||
#define NV_CTRL_CPU_INTR_TOP_LEAF_BIT(i) (i/2):(i/2)
|
||||
#define NV_CTRL_CPU_INTR_TOP_LEAF_INTR_UNITS NV_CTRL_CPU_INTR_TOP_LEAF_BIT(NV_CTRL_CPU_INTR_UNITS_IDX)
|
||||
#define NV_CTRL_CPU_INTR_TOP_LEAF_INTR_NPG_FATAL NV_CTRL_CPU_INTR_TOP_LEAF_BIT(NV_CTRL_CPU_INTR_NPG_FATAL_IDX)
|
||||
#define NV_CTRL_CPU_INTR_TOP_LEAF_INTR_NPG_NON_FATAL NV_CTRL_CPU_INTR_TOP_LEAF_BIT(NV_CTRL_CPU_INTR_NPG_NON_FATAL_IDX)
|
||||
#define NV_CTRL_CPU_INTR_TOP_LEAF_INTR_NPG_CORRECTABLE NV_CTRL_CPU_INTR_TOP_LEAF_BIT(NV_CTRL_CPU_INTR_NPG_CORRECTABLE_IDX)
|
||||
#define NV_CTRL_CPU_INTR_TOP_LEAF_INTR_NVLW_FATAL NV_CTRL_CPU_INTR_TOP_LEAF_BIT(NV_CTRL_CPU_INTR_NVLW_FATAL_IDX)
|
||||
#define NV_CTRL_CPU_INTR_TOP_LEAF_INTR_NVLW_NON_FATAL NV_CTRL_CPU_INTR_TOP_LEAF_BIT(NV_CTRL_CPU_INTR_NVLW_NON_FATAL_IDX)
|
||||
#define NV_CTRL_CPU_INTR_TOP_LEAF_INTR_NVLW_CORRECTABLE NV_CTRL_CPU_INTR_TOP_LEAF_BIT(NV_CTRL_CPU_INTR_NVLW_CORRECTABLE_IDX)
|
||||
#define NV_CTRL_CPU_INTR_TOP_LEAF_INTR_NXBAR_FATAL NV_CTRL_CPU_INTR_TOP_LEAF_BIT(NV_CTRL_CPU_INTR_NXBAR_FATAL_IDX)
|
||||
|
||||
#endif // __ls10_dev_ctrl_ip_addendum_h__
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -383,6 +383,42 @@ nvswitch_corelib_set_dl_link_mode_ls10
|
||||
|
||||
switch (mode)
|
||||
{
|
||||
case NVLINK_LINKSTATE_SAFE:
|
||||
{
|
||||
// check if link is in reset
|
||||
if (nvswitch_is_link_in_reset(device, link))
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"%s: link #%d is still in reset, cannot change link state\n",
|
||||
__FUNCTION__, link->linkNumber);
|
||||
return NVL_ERR_INVALID_STATE;
|
||||
}
|
||||
|
||||
NVSWITCH_PRINT(device, INFO,
|
||||
"%s : Link state request to Safe for (%s):(%s) not needed. Skipping.\n",
|
||||
__FUNCTION__, device->name, link->linkName);
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
case NVLINK_LINKSTATE_HS:
|
||||
{
|
||||
// check if link is in reset
|
||||
if (nvswitch_is_link_in_reset(device, link))
|
||||
{
|
||||
NVSWITCH_PRINT(device, ERROR,
|
||||
"%s: link #%d is still in reset, cannot change link state\n",
|
||||
__FUNCTION__, link->linkNumber);
|
||||
return -NVL_ERR_INVALID_STATE;
|
||||
}
|
||||
|
||||
NVSWITCH_PRINT(device, INFO,
|
||||
"%s : Link state request to Active for (%s):(%s) not needed. Skipping.\n",
|
||||
__FUNCTION__, device->name, link->linkName);
|
||||
|
||||
break;
|
||||
}
|
||||
|
||||
case NVLINK_LINKSTATE_INITPHASE1:
|
||||
{
|
||||
// Apply appropriate SIMMODE settings
|
||||
|
||||
@@ -6138,26 +6138,66 @@ nvswitch_lib_ctrl_tnvl_lock_only
|
||||
_nvswitch_ctrl_get_inforom_bbx_temp_samples,
|
||||
NVSWITCH_GET_TEMP_SAMPLES_PARAMS,
|
||||
osPrivate, flags);
|
||||
NVSWITCH_DEV_CMD_DISPATCH_PRIVILEGED(
|
||||
NVSWITCH_DEV_CMD_DISPATCH(
|
||||
CTRL_NVSWITCH_GET_ATTESTATION_CERTIFICATE_CHAIN,
|
||||
_nvswitch_ctrl_get_attestation_certificate_chain,
|
||||
NVSWITCH_GET_ATTESTATION_CERTIFICATE_CHAIN_PARAMS,
|
||||
osPrivate, flags);
|
||||
NVSWITCH_DEV_CMD_DISPATCH_PRIVILEGED(
|
||||
NVSWITCH_GET_ATTESTATION_CERTIFICATE_CHAIN_PARAMS);
|
||||
NVSWITCH_DEV_CMD_DISPATCH(
|
||||
CTRL_NVSWITCH_GET_ATTESTATION_REPORT,
|
||||
_nvswitch_ctrl_get_attestation_report,
|
||||
NVSWITCH_GET_ATTESTATION_REPORT_PARAMS,
|
||||
osPrivate, flags);
|
||||
NVSWITCH_DEV_CMD_DISPATCH_PRIVILEGED(
|
||||
NVSWITCH_GET_ATTESTATION_REPORT_PARAMS);
|
||||
NVSWITCH_DEV_CMD_DISPATCH(
|
||||
CTRL_NVSWITCH_GET_TNVL_STATUS,
|
||||
_nvswitch_ctrl_get_tnvl_status,
|
||||
NVSWITCH_GET_TNVL_STATUS_PARAMS,
|
||||
osPrivate, flags);
|
||||
NVSWITCH_GET_TNVL_STATUS_PARAMS);
|
||||
NVSWITCH_DEV_CMD_DISPATCH_PRIVILEGED(
|
||||
CTRL_NVSWITCH_SET_FM_DRIVER_STATE,
|
||||
nvswitch_ctrl_set_fm_driver_state,
|
||||
NVSWITCH_SET_FM_DRIVER_STATE_PARAMS,
|
||||
osPrivate, flags);
|
||||
NVSWITCH_DEV_CMD_DISPATCH(CTRL_NVSWITCH_GET_ERRORS,
|
||||
nvswitch_ctrl_get_errors,
|
||||
NVSWITCH_GET_ERRORS_PARAMS);
|
||||
NVSWITCH_DEV_CMD_DISPATCH(CTRL_NVSWITCH_GET_BIOS_INFO,
|
||||
_nvswitch_ctrl_get_bios_info,
|
||||
NVSWITCH_GET_BIOS_INFO_PARAMS);
|
||||
NVSWITCH_DEV_CMD_DISPATCH(CTRL_NVSWITCH_GET_TEMPERATURE,
|
||||
_nvswitch_ctrl_therm_read_temperature,
|
||||
NVSWITCH_CTRL_GET_TEMPERATURE_PARAMS);
|
||||
NVSWITCH_DEV_CMD_DISPATCH(
|
||||
CTRL_NVSWITCH_GET_TEMPERATURE_LIMIT,
|
||||
_nvswitch_ctrl_therm_get_temperature_limit,
|
||||
NVSWITCH_CTRL_GET_TEMPERATURE_LIMIT_PARAMS);
|
||||
NVSWITCH_DEV_CMD_DISPATCH(CTRL_NVSWITCH_GET_FATAL_ERROR_SCOPE,
|
||||
_nvswitch_ctrl_get_fatal_error_scope,
|
||||
NVSWITCH_GET_FATAL_ERROR_SCOPE_PARAMS);
|
||||
NVSWITCH_DEV_CMD_DISPATCH(CTRL_NVSWITCH_GET_INFO,
|
||||
_nvswitch_ctrl_get_info,
|
||||
NVSWITCH_GET_INFO);
|
||||
NVSWITCH_DEV_CMD_DISPATCH(CTRL_NVSWITCH_GET_VOLTAGE,
|
||||
_nvswitch_ctrl_therm_read_voltage,
|
||||
NVSWITCH_CTRL_GET_VOLTAGE_PARAMS);
|
||||
NVSWITCH_DEV_CMD_DISPATCH(CTRL_NVSWITCH_GET_POWER,
|
||||
_nvswitch_ctrl_therm_read_power,
|
||||
NVSWITCH_GET_POWER_PARAMS);
|
||||
NVSWITCH_DEV_CMD_DISPATCH(CTRL_NVSWITCH_GET_NVLINK_STATUS,
|
||||
_nvswitch_ctrl_get_nvlink_status,
|
||||
NVSWITCH_GET_NVLINK_STATUS_PARAMS);
|
||||
NVSWITCH_DEV_CMD_DISPATCH_PRIVILEGED(
|
||||
CTRL_NVSWITCH_GET_NVLINK_ECC_ERRORS,
|
||||
_nvswitch_ctrl_get_nvlink_ecc_errors,
|
||||
NVSWITCH_GET_NVLINK_ECC_ERRORS_PARAMS,
|
||||
osPrivate, flags);
|
||||
NVSWITCH_DEV_CMD_DISPATCH(CTRL_NVSWITCH_GET_INTERNAL_LATENCY,
|
||||
_nvswitch_ctrl_get_internal_latency,
|
||||
NVSWITCH_GET_INTERNAL_LATENCY);
|
||||
NVSWITCH_DEV_CMD_DISPATCH_PRIVILEGED(CTRL_NVSWITCH_SET_NVLINK_ERROR_THRESHOLD,
|
||||
_nvswitch_ctrl_set_nvlink_error_threshold,
|
||||
NVSWITCH_SET_NVLINK_ERROR_THRESHOLD_PARAMS,
|
||||
osPrivate, flags);
|
||||
NVSWITCH_DEV_CMD_DISPATCH(CTRL_NVSWITCH_GET_NVLINK_ERROR_THRESHOLD,
|
||||
_nvswitch_ctrl_get_nvlink_error_threshold,
|
||||
NVSWITCH_GET_NVLINK_ERROR_THRESHOLD_PARAMS);
|
||||
default:
|
||||
nvswitch_os_print(NVSWITCH_DBG_LEVEL_INFO, "ioctl %x is not permitted when TNVL is locked\n", cmd);
|
||||
return -NVL_ERR_INSUFFICIENT_PERMISSIONS;
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -901,6 +901,8 @@ static const CHIPS_RELEASED sChipsReleased[] = {
|
||||
{ 0x2324, 0x17a8, 0x10de, "NVIDIA H800" },
|
||||
{ 0x2329, 0x198b, 0x10de, "NVIDIA H20" },
|
||||
{ 0x2329, 0x198c, 0x10de, "NVIDIA H20" },
|
||||
{ 0x232C, 0x2063, 0x10de, "NVIDIA H20-3e" },
|
||||
{ 0x232C, 0x2064, 0x10de, "NVIDIA H20-3e" },
|
||||
{ 0x2330, 0x16c0, 0x10de, "NVIDIA H100 80GB HBM3" },
|
||||
{ 0x2330, 0x16c1, 0x10de, "NVIDIA H100 80GB HBM3" },
|
||||
{ 0x2331, 0x1626, 0x10de, "NVIDIA H100 PCIe" },
|
||||
|
||||
@@ -493,9 +493,8 @@ gpuIsProtectedPcieEnabledInHw_GH100
|
||||
OBJGPU *pGpu
|
||||
)
|
||||
{
|
||||
NvU32 val = GPU_REG_RD32(pGpu, NV_PGC6_AON_SECURE_SCRATCH_GROUP_20_CC);
|
||||
return FLD_TEST_DRF(_PGC6, _AON_SECURE_SCRATCH_GROUP_20_CC, _MULTI_GPU_MODE,
|
||||
_PROTECTED_PCIE, val);
|
||||
// Bug 4870925: Disabled PPCIE
|
||||
return NV_FALSE;
|
||||
}
|
||||
|
||||
/*!
|
||||
|
||||
@@ -134,6 +134,8 @@ confComputeApiCtrlCmdSystemGetCapabilities_IMPL
|
||||
|
||||
if (pCcCaps->bMultiGpuProtectedPcieModeEnabled)
|
||||
{
|
||||
// Do not advertise HCC as ON to callers when PPCIe is ON
|
||||
pParams->ccFeature = NV_CONF_COMPUTE_SYSTEM_FEATURE_DISABLED;
|
||||
pParams->multiGpuMode = NV_CONF_COMPUTE_SYSTEM_MULTI_GPU_MODE_PROTECTED_PCIE;
|
||||
}
|
||||
|
||||
|
||||
@@ -2121,8 +2121,8 @@ kvgpumgrCreateRequestVgpu(NvU32 gpuPciId, const NvU8 *pMdevUuid,
|
||||
|
||||
if (pGpu == NULL)
|
||||
{
|
||||
NV_PRINTF(LEVEL_ERROR, "GPU handle is not valid \n");
|
||||
return NV_ERR_INVALID_STATE;
|
||||
NV_PRINTF(LEVEL_ERROR, "GPU %u is not initialized yet \n", gpuPciBdf);
|
||||
return NV_ERR_TIMEOUT_RETRY;
|
||||
}
|
||||
|
||||
if ((status = kvgpumgrGetPgpuIndex(pKernelVgpuMgr, gpuPciId, &pgpuIndex)) != NV_OK)
|
||||
|
||||
@@ -1,4 +1,4 @@
|
||||
NVIDIA_VERSION = 550.120
|
||||
NVIDIA_VERSION = 550.127.08
|
||||
|
||||
# This file.
|
||||
VERSION_MK_FILE := $(lastword $(MAKEFILE_LIST))
|
||||
|
||||
Reference in New Issue
Block a user