515.49.15

515.49.14
515.65.01
2026-01-27 19:49:47 +00:00 · 2022-08-31 16:33:34 -07:00 · 2022-08-20 10:17:35 -07:00 · 2022-08-19 12:19:07 -07:00 · 2022-08-19 12:14:52 -07:00 · 2022-08-19 12:14:44 -07:00
3179 changed files with 223624 additions and 1388586 deletions
--- a/.github/ISSUE_TEMPLATE/10_functional_bug.yml
+++ b/.github/ISSUE_TEMPLATE/10_functional_bug.yml
@@ -1,8 +1,5 @@
 name: Report a functional bug 🐛
-description: |
-  Functional bugs affect operation or stability of the driver or hardware.
-
-  Bugs with the closed source driver must be reported on the forums (see link on New Issue page below).
+description: Functional bugs affect operation or stability of the driver and/or hardware.
 labels:
  - "bug"
 body:
@@ -21,12 +18,14 @@ body:
    description: "Which open-gpu-kernel-modules version are you running? Be as specific as possible: SHA is best when built from specific commit."
  validations:
    required: true
- type: checkboxes
+- type: dropdown
  id: sw_driver_proprietary
  attributes:
-    label: "Please confirm this issue does not happen with the proprietary driver (of the same version). This issue tracker is only for bugs specific to the open kernel driver."
+    label: "Does this happen with the proprietary driver (of the same version) as well?"
    options:
-    - label: "I confirm that this does not happen with the proprietary driver package."
+    - "Yes"
+    - "No"
+    - "I cannot test this"
  validations:
    required: true
 - type: input
@@ -43,14 +42,6 @@ body:
    description: "Which kernel are you running? (output of `uname -a`, say if you built it yourself)"
  validations:
    required: true
- type: checkboxes
-  id: sw_host_kernel_stable
-  attributes:
-    label: "Please confirm you are running a stable release kernel (e.g. not a -rc). We do not accept bug reports for unreleased kernels."
-    options:
-    - label: "I am running on a stable kernel release."
-  validations:
-    required: true
 - type: input
  id: hw_gpu_type
  attributes:
@@ -87,10 +78,7 @@ body:
  id: bug_report_gz
  attributes:
    label: nvidia-bug-report.log.gz
-    description: |
-      Please reproduce the problem, after that run `nvidia-bug-report.sh`, and attach the resulting nvidia-bug-report.log.gz here.
-
-      Reports without this file will be closed.
+    description: "Please reproduce the problem, after that run `nvidia-bug-report.sh`, and attach the resulting nvidia-bug-report.log.gz here."
    placeholder: You can usually just drag & drop the file into this textbox.
  validations:
    required: true
--- a/.github/ISSUE_TEMPLATE/20_build_bug.yml
+++ b/.github/ISSUE_TEMPLATE/20_build_bug.yml
@@ -32,14 +32,6 @@ body:
    description: "Which kernel are you running? (output of `uname -a`, say if you built it yourself)."
  validations:
    required: true
- type: checkboxes
-  id: sw_host_kernel_stable
-  attributes:
-    label: "Please confirm you are running a stable release kernel (e.g. not a -rc). We do not accept bug reports for unreleased kernels."
-    options:
-    - label: "I am running on a stable kernel release."
-  validations:
-    required: true
 - type: textarea
  id: bug_description
  attributes:
--- a/.github/ISSUE_TEMPLATE/config.yml
+++ b/.github/ISSUE_TEMPLATE/config.yml
@@ -1,14 +1,14 @@
 blank_issues_enabled: false
 contact_links:
-  - name: Report a bug with the proprietary driver
-    url: https://forums.developer.nvidia.com/c/gpu-graphics/linux/148
-    about: Bugs that aren't specific to the open source driver in this repository must be reported with the linked forums instead.
  - name: Report a cosmetic issue
    url: https://github.com/NVIDIA/open-gpu-kernel-modules/discussions/categories/general
    about: We are not currently accepting cosmetic-only changes such as whitespace, typos, or simple renames. You can still discuss and collect them on the boards.
  - name: Ask a question
    url: https://github.com/NVIDIA/open-gpu-kernel-modules/discussions/categories/q-a
    about: Unsure of what to click, where to go, what the process for your thing is? We're happy to help. Click to visit the discussion board and say hello!
+  - name: Report a bug with the proprietary driver
+    url: https://forums.developer.nvidia.com/c/gpu-graphics/linux/148
+    about: Bugs that aren't specific to the open source driver in this repository should be reported with the linked forums instead. If you are unsure on what kind of bug you have, feel free to open a thread in Discussions. We're here to help!
  - name: Suggest a feature
    url: https://github.com/NVIDIA/open-gpu-kernel-modules/discussions/categories/ideas
    about: Please do not open Issues for feature requests; instead, suggest and discuss new features on the Github discussion board. If you have a feature you worked on and want to PR it, please also open a discussion before doing so.
--- a/CHANGELOG.md
+++ b/CHANGELOG.md
@@ -0,0 +1,44 @@
+# Changelog
+
+## Release 515 Entries
+
+### [515.65.01] 2022-08-02
+
+#### Fixed
+
+- Collection of minor fixes to issues, [#6](https://github.com/NVIDIA/open-gpu-kernel-modules/pull/61) by @Joshua-Ashton
+- Remove unnecessary use of acpi_bus_get_device().
+
+### [515.57] 2022-06-28
+
+#### Fixed
+
+- Backtick is deprecated, [#273](https://github.com/NVIDIA/open-gpu-kernel-modules/pull/273) by @arch-user-france1
+
+### [515.48.07] 2022-05-31
+
+#### Added
+
+- List of compatible GPUs in README.md.
+
+#### Fixed
+
+- Fix various README capitalizations, [#8](https://github.com/NVIDIA/open-gpu-kernel-modules/pull/8) by @27lx 
+- Automatically tag bug report issues, [#15](https://github.com/NVIDIA/open-gpu-kernel-modules/pull/15) by @thebeanogamer
+- Improve conftest.sh Script, [#37](https://github.com/NVIDIA/open-gpu-kernel-modules/pull/37) by @Nitepone
+- Update HTTP link to HTTPS, [#101](https://github.com/NVIDIA/open-gpu-kernel-modules/pull/101) by @alcaparra
+- moved array sanity check to before the array access, [#117](https://github.com/NVIDIA/open-gpu-kernel-modules/pull/117) by @RealAstolfo
+- Fixed some typos, [#122](https://github.com/NVIDIA/open-gpu-kernel-modules/pull/122) by @FEDOyt
+- Fixed capitalization, [#123](https://github.com/NVIDIA/open-gpu-kernel-modules/pull/123) by @keroeslux
+- Fix typos in NVDEC Engine Descriptor, [#126](https://github.com/NVIDIA/open-gpu-kernel-modules/pull/126) from @TrickyDmitriy
+- Extranous apostrohpes in a makefile script [sic], [#14](https://github.com/NVIDIA/open-gpu-kernel-modules/issues/14) by @kiroma
+- HDMI no audio @ 4K above 60Hz, [#75](https://github.com/NVIDIA/open-gpu-kernel-modules/issues/75) by @adolfotregosa
+- dp_configcaps.cpp:405: array index sanity check in wrong place?, [#110](https://github.com/NVIDIA/open-gpu-kernel-modules/issues/110) by @dcb314
+- NVRM kgspInitRm_IMPL: missing NVDEC0 engine, cannot initialize GSP-RM, [#116](https://github.com/NVIDIA/open-gpu-kernel-modules/issues/116) by @kfazz
+- ERROR: modpost: "backlight_device_register" [...nvidia-modeset.ko] undefined, [#135](https://github.com/NVIDIA/open-gpu-kernel-modules/issues/135) by @sndirsch
+- aarch64 build fails, [#151](https://github.com/NVIDIA/open-gpu-kernel-modules/issues/151) by @frezbo
+
+### [515.43.04] 2022-05-11
+
+- Initial release.
+
--- a/CONTRIBUTING.md
+++ b/CONTRIBUTING.md
@@ -1,21 +1,3 @@
 Thank you for all the enthusiasm around open-gpu-kernel-modules.

-## Non-functional (cosmetic) changes
-
-While we appreciate your enthusiasm, we have decided not to accept non-functional changes such as
-non-code typo fixes, comment and language adjustments, whitespace changes, and similar.
-
-Changes going into this codebase incur significant overhead. As such, we want to focus our resources
-on executable code improvements for now.
-
-If you have questions, or are unsure about the nature of your desired change, please ask us on the
-[Discussion boards](https://github.com/NVIDIA/open-gpu-kernel-modules/discussions)!
-
-## Code style
-
-We currently do not publish a code style guide, as we have many different components coming together.
-Please read the existing code in the repository, especially the one surrounding your proposed change,
-to get a feel for what you should aim for.
-
-Don't worry too much about it! We are happy to guide you through any neccessary style changes through
-code review of your PR.
+For the next while, we are going to focus review on pull requests of functional changes.  Please refrain from further cosmetic pull requests until we publish our style guide.
--- a/26
+++ b/26
@@ -6,9 +6,9 @@
 # To install the build kernel modules: run (as root) `make modules_install`
 ###########################################################################

-###########################################################################
-# variables
-###########################################################################
+include utils.mk
+
+all: modules

 nv_kernel_o                = src/nvidia/$(OUTPUTDIR)/nv-kernel.o
 nv_kernel_o_binary         = kernel-open/nvidia/nv-kernel.o_binary
@@ -16,20 +16,13 @@ nv_kernel_o_binary         = kernel-open/nvidia/nv-kernel.o_binary
 nv_modeset_kernel_o        = src/nvidia-modeset/$(OUTPUTDIR)/nv-modeset-kernel.o
 nv_modeset_kernel_o_binary = kernel-open/nvidia-modeset/nv-modeset-kernel.o_binary

-###########################################################################
-# rules
-###########################################################################
+.PHONY: $(nv_kernel_o) $(nv_modeset_kernel_o) modules modules_install

-include utils.mk
-
-.PHONY: all
-all: modules

 ###########################################################################
 # nv-kernel.o is the OS agnostic portion of nvidia.ko
 ###########################################################################

-.PHONY: $(nv_kernel_o)
 $(nv_kernel_o):
 	$(MAKE) -C src/nvidia

@@ -41,7 +34,6 @@ $(nv_kernel_o_binary): $(nv_kernel_o)
 # nv-modeset-kernel.o is the OS agnostic portion of nvidia-modeset.ko
 ###########################################################################

-.PHONY: $(nv_modeset_kernel_o)
 $(nv_modeset_kernel_o):
 	$(MAKE) -C src/nvidia-modeset

@@ -54,33 +46,31 @@ $(nv_modeset_kernel_o_binary): $(nv_modeset_kernel_o)
 # the kernel modules with kbuild.
 ###########################################################################

-.PHONY: modules
 modules: $(nv_kernel_o_binary) $(nv_modeset_kernel_o_binary)
 	$(MAKE) -C kernel-open modules

+
 ###########################################################################
 # Install the built kernel modules using kbuild.
 ###########################################################################

-.PHONY: modules_install
 modules_install:
 	$(MAKE) -C kernel-open modules_install

+
 ###########################################################################
 # clean
 ###########################################################################

-.PHONY: clean
+.PHONY: clean nvidia.clean nvidia-modeset.clean kernel-open.clean
+
 clean: nvidia.clean nvidia-modeset.clean kernel-open.clean

-.PHONY: nvidia.clean
 nvidia.clean:
 	$(MAKE) -C src/nvidia clean

-.PHONY: nvidia-modeset.clean
 nvidia-modeset.clean:
 	$(MAKE) -C src/nvidia-modeset clean

-.PHONY: kernel-open.clean
 kernel-open.clean:
 	$(MAKE) -C kernel-open clean
--- a/README.md
+++ b/README.md
--- a/kernel-open/Kbuild
+++ b/kernel-open/Kbuild
@@ -8,7 +8,7 @@
 # NV_KERNEL_SOURCES : The root of the kernel source tree.
 # NV_KERNEL_OUTPUT : The kernel's output tree.
 # NV_KERNEL_MODULES : A whitespace-separated list of modules to build.
-# ARCH : The target CPU architecture: x86_64|arm64
+# ARCH : The target CPU architecture: x86_64|arm64|powerpc
 #
 # Kbuild provides the variables:
 #
@@ -57,106 +57,67 @@ ifeq ($(NV_UNDEF_BEHAVIOR_SANITIZER),1)
 UBSAN_SANITIZE := y
 endif

-#
-# Command to create a symbolic link, explicitly resolving the symlink target
-# to an absolute path to abstract away the difference between Linux < 6.13,
-# where the CWD is the Linux kernel source tree for Kbuild extmod builds, and
-# Linux >= 6.13, where the CWD is the external module source tree.
-#
-# This is used to create the nv*-kernel.o -> nv*-kernel.o_binary symlinks for
-# kernel modules which use precompiled binary object files.
-#
-
-quiet_cmd_symlink = SYMLINK $@
- cmd_symlink = ln -sf $(abspath $<) $@
-
-
 $(foreach _module, $(NV_KERNEL_MODULES), \
 $(eval include $(src)/$(_module)/$(_module).Kbuild))


-ccflags-y += -I$(src)/common/inc
-ccflags-y += -I$(src)
-ccflags-y += -Wall $(DEFINES) $(INCLUDES) -Wno-cast-qual -Wno-format-extra-args
-ccflags-y += -D__KERNEL__ -DMODULE -DNVRM
-ccflags-y += -DNV_VERSION_STRING=\"580.126.09\"
+#
+# Define CFLAGS that apply to all the NVIDIA kernel modules. EXTRA_CFLAGS
+# is deprecated since 2.6.24 in favor of ccflags-y, but we need to support
+# older kernels which do not have ccflags-y. Newer kernels append
+# $(EXTRA_CFLAGS) to ccflags-y for compatibility.
+#

-# Include and link Tegra out-of-tree modules.
-ifneq ($(wildcard /usr/src/nvidia/nvidia-oot),)
- SYSSRCNVOOT ?= /usr/src/nvidia/nvidia-oot
-endif
+EXTRA_CFLAGS += -I$(src)/common/inc
+EXTRA_CFLAGS += -I$(src)
+EXTRA_CFLAGS += -Wall -MD $(DEFINES) $(INCLUDES) -Wno-cast-qual -Wno-error -Wno-format-extra-args
+EXTRA_CFLAGS += -D__KERNEL__ -DMODULE -DNVRM
+EXTRA_CFLAGS += -DNV_VERSION_STRING=\"515.49.15\"

-ifneq ($(SYSSRCHOST1X),)
- ccflags-y += -I$(SYSSRCHOST1X)
-endif
-
-ifneq ($(SYSSRCNVOOT),)
- ccflags-y += -I$(SYSSRCNVOOT)/include
- KBUILD_EXTRA_SYMBOLS = $(SYSSRCNVOOT)/Module.symvers
-endif
-
-# Some Android kernels prohibit driver use of filesystem functions like
-# filp_open() and kernel_read(). Disable the NV_FILESYSTEM_ACCESS_AVAILABLE
-# functionality that uses those functions when building for Android.
-
-PLATFORM_IS_ANDROID ?= 0
-
-ifeq ($(PLATFORM_IS_ANDROID),1)
- ccflags-y += -DNV_FILESYSTEM_ACCESS_AVAILABLE=0
-else
- ccflags-y += -DNV_FILESYSTEM_ACCESS_AVAILABLE=1
-endif
-
-ccflags-y += -Wno-unused-function
+EXTRA_CFLAGS += -Wno-unused-function

 ifneq ($(NV_BUILD_TYPE),debug)
- ccflags-y += -Wuninitialized
+ EXTRA_CFLAGS += -Wuninitialized
 endif

-ccflags-y += -fno-strict-aliasing
+EXTRA_CFLAGS += -fno-strict-aliasing

 ifeq ($(ARCH),arm64)
- ccflags-y += -mstrict-align
+ EXTRA_CFLAGS += -mstrict-align
 endif

 ifeq ($(NV_BUILD_TYPE),debug)
- ccflags-y += -g
+ EXTRA_CFLAGS += -g -gsplit-dwarf
 endif

-ccflags-y += -ffreestanding
+EXTRA_CFLAGS += -ffreestanding

 ifeq ($(ARCH),arm64)
- ccflags-y += -mgeneral-regs-only -march=armv8-a
- ccflags-y += $(call cc-option,-mno-outline-atomics,)
+ EXTRA_CFLAGS += -mgeneral-regs-only -march=armv8-a
+ EXTRA_CFLAGS += $(call cc-option,-mno-outline-atomics,)
 endif

 ifeq ($(ARCH),x86_64)
- ccflags-y += -mno-red-zone -mcmodel=kernel
+ EXTRA_CFLAGS += -mno-red-zone -mcmodel=kernel
 endif

-ccflags-y += -DNV_UVM_ENABLE
-ccflags-y += $(call cc-option,-Werror=undef,)
-ccflags-y += -DNV_SPECTRE_V2=$(NV_SPECTRE_V2)
-ccflags-y += -DNV_KERNEL_INTERFACE_LAYER
+ifeq ($(ARCH),powerpc)
+ EXTRA_CFLAGS += -mlittle-endian -mno-strict-align -mno-altivec
+endif
+
+EXTRA_CFLAGS += -DNV_UVM_ENABLE
+EXTRA_CFLAGS += $(call cc-option,-Werror=undef,)
+EXTRA_CFLAGS += -DNV_SPECTRE_V2=$(NV_SPECTRE_V2)
+EXTRA_CFLAGS += -DNV_KERNEL_INTERFACE_LAYER

 #
 # Detect SGI UV systems and apply system-specific optimizations.
 #

 ifneq ($(wildcard /proc/sgi_uv),)
- ccflags-y += -DNV_CONFIG_X86_UV
+ EXTRA_CFLAGS += -DNV_CONFIG_X86_UV
 endif

-ifdef VGX_FORCE_VFIO_PCI_CORE
- ccflags-y += -DNV_VGPU_FORCE_VFIO_PCI_CORE
-endif
-
-WARNINGS_AS_ERRORS ?=
-ifeq ($(WARNINGS_AS_ERRORS),1)
- ccflags-y += -Werror
-else
- ccflags-y += -Wno-error
-endif

 #
 # The conftest.sh script tests various aspects of the target kernel.
@@ -182,13 +143,7 @@ NV_CONFTEST_CMD := /bin/sh $(NV_CONFTEST_SCRIPT) \

 NV_CFLAGS_FROM_CONFTEST := $(shell $(NV_CONFTEST_CMD) build_cflags)

-NV_CONFTEST_CFLAGS = $(NV_CFLAGS_FROM_CONFTEST) $(ccflags-y) -fno-pie
-NV_CONFTEST_CFLAGS += $(filter -std=%,$(KBUILD_CFLAGS))
-NV_CONFTEST_CFLAGS += $(call cc-disable-warning,pointer-sign)
-NV_CONFTEST_CFLAGS += $(call cc-option,-fshort-wchar,)
-NV_CONFTEST_CFLAGS += $(call cc-option,-Werror=incompatible-pointer-types,)
-NV_CONFTEST_CFLAGS += $(call cc-option,-fms-extensions,)
-NV_CONFTEST_CFLAGS += -Wno-error
+NV_CONFTEST_CFLAGS = $(NV_CFLAGS_FROM_CONFTEST) $(EXTRA_CFLAGS) -fno-pie

 NV_CONFTEST_COMPILE_TEST_HEADERS := $(obj)/conftest/macros.h
 NV_CONFTEST_COMPILE_TEST_HEADERS += $(obj)/conftest/functions.h
@@ -248,25 +203,9 @@ $(obj)/conftest/patches.h: $(NV_CONFTEST_SCRIPT)
 	@mkdir -p $(obj)/conftest
 	@$(NV_CONFTEST_CMD) patch_check > $@

-include $(src)/header-presence-tests.mk
-
-# Filename to store the define for the header in $(1); this is only consumed by
-# the rule below that concatenates all of these together.
-NV_HEADER_PRESENCE_PART = $(addprefix $(obj)/conftest/header_presence/,$(addsuffix .part,$(1)))
-
-# Define a rule to check the header $(1).
-define NV_HEADER_PRESENCE_CHECK
- $$(call NV_HEADER_PRESENCE_PART,$(1)): $$(NV_CONFTEST_SCRIPT) $(obj)/conftest/uts_release
-	@mkdir -p $$(dir $$@)
-	@$$(NV_CONFTEST_CMD) test_kernel_header '$$(NV_CONFTEST_CFLAGS)' '$(1)' > $$@
-endef
-
-# Evaluate the rule above for each header in the list.
-$(foreach header,$(NV_HEADER_PRESENCE_TESTS),$(eval $(call NV_HEADER_PRESENCE_CHECK,$(header))))
-
-# Concatenate all of the parts into headers.h.
-$(obj)/conftest/headers.h: $(call NV_HEADER_PRESENCE_PART,$(NV_HEADER_PRESENCE_TESTS))
-	@cat $^ > $@
+$(obj)/conftest/headers.h: $(NV_CONFTEST_SCRIPT)
+	@mkdir -p $(obj)/conftest
+	@$(NV_CONFTEST_CMD) test_kernel_headers '$(NV_CONFTEST_CFLAGS)' > $@

 clean-dirs := $(obj)/conftest

--- a/kernel-open/Makefile
+++ b/kernel-open/Makefile
@@ -28,7 +28,7 @@ else
  else
    KERNEL_UNAME ?= $(shell uname -r)
    KERNEL_MODLIB := /lib/modules/$(KERNEL_UNAME)
-    KERNEL_SOURCES := $(shell ((test -d $(KERNEL_MODLIB)/source && echo $(KERNEL_MODLIB)/source) || (test -d $(KERNEL_MODLIB)/build/source && echo $(KERNEL_MODLIB)/build/source)) || echo $(KERNEL_MODLIB)/build)
+    KERNEL_SOURCES := $(shell test -d $(KERNEL_MODLIB)/source && echo $(KERNEL_MODLIB)/source || echo $(KERNEL_MODLIB)/build)
  endif

  KERNEL_OUTPUT := $(KERNEL_SOURCES)
@@ -42,83 +42,27 @@ else
  else
    KERNEL_UNAME ?= $(shell uname -r)
    KERNEL_MODLIB := /lib/modules/$(KERNEL_UNAME)
-    # $(filter patter...,text) - Returns all whitespace-separated words in text that
-    # do match any of the pattern words, removing any words that do not match.
-    # Set the KERNEL_OUTPUT only if either $(KERNEL_MODLIB)/source or
-    # $(KERNEL_MODLIB)/build/source path matches the KERNEL_SOURCES.
-    ifneq ($(filter $(KERNEL_SOURCES),$(KERNEL_MODLIB)/source $(KERNEL_MODLIB)/build/source),)
+    ifeq ($(KERNEL_SOURCES), $(KERNEL_MODLIB)/source)
      KERNEL_OUTPUT := $(KERNEL_MODLIB)/build
      KBUILD_PARAMS := KBUILD_OUTPUT=$(KERNEL_OUTPUT)
    endif
  endif

-  # If CC hasn't been set explicitly, check the value of CONFIG_CC_VERSION_TEXT.
-  # Look for the compiler specified there, and use it by default, if found.
-  ifeq ($(origin CC),default)
-    cc_version_text=$(firstword $(shell . $(KERNEL_OUTPUT)/.config; \
-                      echo "$$CONFIG_CC_VERSION_TEXT"))
-
-    ifneq ($(cc_version_text),)
-      ifeq ($(shell command -v $(cc_version_text)),)
-          $(warning WARNING: Unable to locate the compiler $(cc_version_text) \
-            from CONFIG_CC_VERSION_TEXT in the kernel configuration.)
-      else
-          CC=$(cc_version_text)
-      endif
-    endif
-  endif
-
  CC ?= cc
  LD ?= ld
  OBJDUMP ?= objdump
-  AWK ?= awk
-  # Bake the following awk program in a string. The program is needed to add C++
-  # to the languages excluded from BTF generation.
-  #
-  # Also, unconditionally return success (0) from the awk program, rather than
-  # propagating pahole's return status (with 'exit system(pahole_cmd)'), to
-  # workaround an DW_TAG_rvalue_reference_type error in
-  # kernel/nvidia-modeset.ko.
-  #
-  # BEGIN {
-  #     pahole_cmd = "pahole"
-  #     for (i = 1; i < ARGC; i++) {
-  #         if (ARGV[i] ~ /--lang_exclude=/) {
-  #             pahole_cmd = pahole_cmd sprintf(" %s,c++", ARGV[i])
-  #         } else {
-  #             pahole_cmd = pahole_cmd sprintf(" %s", ARGV[i])
-  #         }
-  #     }
-  #     system(pahole_cmd)
-  # }
-  PAHOLE_AWK_PROGRAM = BEGIN { pahole_cmd = \"pahole\"; for (i = 1; i < ARGC; i++) { if (ARGV[i] ~ /--lang_exclude=/) { pahole_cmd = pahole_cmd sprintf(\" %s,c++\", ARGV[i]); } else { pahole_cmd = pahole_cmd sprintf(\" %s\", ARGV[i]); } } system(pahole_cmd); }
-  # If scripts/pahole-flags.sh is not present in the kernel tree, add PAHOLE and
-  # PAHOLE_AWK_PROGRAM assignments to PAHOLE_VARIABLES; otherwise assign the
-  # empty string to PAHOLE_VARIABLES.
-  PAHOLE_VARIABLES=$(if $(wildcard $(KERNEL_SOURCES)/scripts/pahole-flags.sh),,"PAHOLE=$(AWK) '$(PAHOLE_AWK_PROGRAM)'")

  ifndef ARCH
    ARCH := $(shell uname -m | sed -e 's/i.86/i386/' \
+      -e 's/armv[0-7]\w\+/arm/' \
      -e 's/aarch64/arm64/' \
-      -e 's/riscv64/riscv/' \
+      -e 's/ppc64le/powerpc/' \
    )
  endif

-  KERNEL_ARCH = $(ARCH)
-
-  ifneq ($(filter $(ARCH),i386 x86_64),)
-    KERNEL_ARCH = x86
-  else
-    ifeq ($(filter $(ARCH),arm64 riscv),)
-        $(error Unsupported architecture $(ARCH))
-    endif
-  endif
-
  NV_KERNEL_MODULES ?= $(wildcard nvidia nvidia-uvm nvidia-vgpu-vfio nvidia-modeset nvidia-drm nvidia-peermem)
  NV_KERNEL_MODULES := $(filter-out $(NV_EXCLUDE_KERNEL_MODULES), \
                                    $(NV_KERNEL_MODULES))
-  INSTALL_MOD_DIR ?= kernel/drivers/video
-
  NV_VERBOSE ?=
  SPECTRE_V2_RETPOLINE ?= 0

@@ -130,13 +74,12 @@ else
  KBUILD_PARAMS += NV_KERNEL_SOURCES=$(KERNEL_SOURCES)
  KBUILD_PARAMS += NV_KERNEL_OUTPUT=$(KERNEL_OUTPUT)
  KBUILD_PARAMS += NV_KERNEL_MODULES="$(NV_KERNEL_MODULES)"
-  KBUILD_PARAMS += INSTALL_MOD_DIR="$(INSTALL_MOD_DIR)"
+  KBUILD_PARAMS += INSTALL_MOD_DIR=kernel/drivers/video
  KBUILD_PARAMS += NV_SPECTRE_V2=$(SPECTRE_V2_RETPOLINE)

  .PHONY: modules module clean clean_conftest modules_install
  modules clean modules_install:
-	@$(MAKE) "LD=$(LD)" "CC=$(CC)" "OBJDUMP=$(OBJDUMP)" \
-	  $(PAHOLE_VARIABLES) $(KBUILD_PARAMS) $@
+	@$(MAKE) "LD=$(LD)" "CC=$(CC)" "OBJDUMP=$(OBJDUMP)" $(KBUILD_PARAMS) $@
 	@if [ "$@" = "modules" ]; then \
 	  for module in $(NV_KERNEL_MODULES); do \
 	    if [ -x split-object-file.sh ]; then \
@@ -156,9 +99,8 @@ else
  # module symbols on which the Linux kernel's module resolution is dependent
  # and hence must be used whenever present.

-  LD_SCRIPT ?= $(KERNEL_SOURCES)/scripts/module-common.lds             \
-               $(KERNEL_SOURCES)/arch/$(KERNEL_ARCH)/kernel/module.lds \
-               $(KERNEL_OUTPUT)/arch/$(KERNEL_ARCH)/module.lds         \
+  LD_SCRIPT ?= $(KERNEL_SOURCES)/scripts/module-common.lds      \
+               $(KERNEL_SOURCES)/arch/$(ARCH)/kernel/module.lds \
               $(KERNEL_OUTPUT)/scripts/module.lds
  NV_MODULE_COMMON_SCRIPTS := $(foreach s, $(wildcard $(LD_SCRIPT)), -T $(s))

--- a/kernel-open/common/inc/cpuopsys.h
+++ b/kernel-open/common/inc/cpuopsys.h
@@ -101,6 +101,13 @@
 #   define NV_ANDROID
 #endif

+
+
+
+
+
+
+
 #if defined(DceCore) && !defined(NV_DCECORE)
 #    define NV_DCECORE
 #endif
@@ -242,7 +249,7 @@
 #endif

 /* For verification-only features not intended to be included in normal drivers */
-#if defined(ENABLE_VERIF_FEATURES)
+#if (defined(NV_MODS) || defined(NV_GSP_MODS)) && defined(DEBUG) && !defined(DISABLE_VERIF_FEATURES)
 #define NV_VERIF_FEATURES
 #endif

@@ -276,6 +283,12 @@
 #define NV_IS_MODS 0
 #endif

+#if defined(NV_GSP_MODS)
+#define NV_IS_GSP_MODS 1
+#else
+#define NV_IS_GSP_MODS 0
+#endif
+
 #if defined(NV_WINDOWS)
 #define NVOS_IS_WINDOWS 1
 #else
@@ -342,6 +355,15 @@
 #define NVOS_IS_INTEGRITY 0
 #endif

+
+
+
+
+
+
+
+
+
 #if defined(NVCPU_X86)
 #define NVCPU_IS_X86 1
 #else
--- a/kernel-open/common/inc/dce_rm_client_ipc.h
+++ b/kernel-open/common/inc/dce_rm_client_ipc.h
@@ -1,35 +0,0 @@
-/*
- * SPDX-FileCopyrightText: Copyright (c) 2020-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-#ifndef _OS_DCE_CLIENT_IPC_H_
-#define _OS_DCE_CLIENT_IPC_H_
-
-// RM IPC Client Types
-
-#define DCE_CLIENT_RM_IPC_TYPE_SYNC             0x0
-#define DCE_CLIENT_RM_IPC_TYPE_EVENT            0x1
-#define DCE_CLIENT_RM_IPC_TYPE_MAX              0x2
-
-void dceclientHandleAsyncRpcCallback(NvU32 handle, NvU32 interfaceType,
-                                     NvU32 msgLength, void *data,
-                                     void *usrCtx);
-#endif
--- a/kernel-open/common/inc/nv-chardev-numbers.h
+++ b/kernel-open/common/inc/nv-chardev-numbers.h
@@ -1,43 +0,0 @@
-/*
- * SPDX-FileCopyrightText: Copyright (c) 2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-
-#ifndef _NV_CHARDEV_NUMBERS_H_
-#define _NV_CHARDEV_NUMBERS_H_
-
-// NVIDIA's reserved major character device number (Linux).
-#define NV_MAJOR_DEVICE_NUMBER  195
-
-// Minor numbers 0 to 247 reserved for regular devices
-#define NV_MINOR_DEVICE_NUMBER_REGULAR_MAX         247
-
-// Minor numbers 248 to 253 currently unused
-
-// Minor number 254 reserved for the modeset device (provided by NVKMS)
-#define NV_MINOR_DEVICE_NUMBER_MODESET_DEVICE      254
-
-// Minor number 255 reserved for the control device
-#define NV_MINOR_DEVICE_NUMBER_CONTROL_DEVICE      255
-
-#endif  // _NV_CHARDEV_NUMBERS_H_
-
--- a/kernel-open/common/inc/nv-firmware-registry.h
+++ b/kernel-open/common/inc/nv-firmware-registry.h
@@ -1,84 +0,0 @@
-/*
- * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-//
-// This file holds GPU firmware related registry key definitions that are
-// shared between Windows and Unix
-//
-
-#ifndef NV_FIRMWARE_REGISTRY_H
-#define NV_FIRMWARE_REGISTRY_H
-
-//
-// Registry key that when enabled, will enable use of GPU firmware.
-//
-// Possible mode values:
-//  0 - Do not enable GPU firmware
-//  1 - Enable GPU firmware
-//  2 - (Default) Use the default enablement policy for GPU firmware
-//
-// Setting this to anything other than 2 will alter driver firmware-
-// enablement policies, possibly disabling GPU firmware where it would
-// have otherwise been enabled by default.
-//
-// Policy bits:
-//
-// POLICY_ALLOW_FALLBACK:
-//  As the normal behavior is to fail GPU initialization if this registry
-//  entry is set in such a way that results in an invalid configuration, if
-//  instead the user would like the driver to automatically try to fallback
-//  to initializing the failing GPU with firmware disabled, then this bit can
-//  be set (ex: 0x11 means try to enable GPU firmware but fall back if needed).
-//  Note that this can result in a mixed mode configuration (ex: GPU0 has
-//  firmware enabled, but GPU1 does not).
-//
-#define NV_REG_STR_ENABLE_GPU_FIRMWARE                   "EnableGpuFirmware"
-
-#define NV_REG_ENABLE_GPU_FIRMWARE_MODE_MASK              0x0000000F
-#define NV_REG_ENABLE_GPU_FIRMWARE_MODE_DISABLED          0x00000000
-#define NV_REG_ENABLE_GPU_FIRMWARE_MODE_ENABLED           0x00000001
-#define NV_REG_ENABLE_GPU_FIRMWARE_MODE_DEFAULT           0x00000002
-
-#define NV_REG_ENABLE_GPU_FIRMWARE_POLICY_MASK                  0x000000F0
-#define NV_REG_ENABLE_GPU_FIRMWARE_POLICY_ALLOW_FALLBACK        0x00000010
-#define NV_REG_ENABLE_GPU_FIRMWARE_POLICY_DEFAULT_ON_WS_SERVER  0x00000020
-
-#define NV_REG_ENABLE_GPU_FIRMWARE_DEFAULT_VALUE          0x00000012
-
-//
-// Registry key that when enabled,  will send GPU firmware logs
-// to the system log, when possible.
-//
-// Possible values:
-//  0 - Do not send GPU firmware logs to the system log
-//  1 - Enable sending of GPU firmware logs to the system log
-//  2 - (Default) Enable sending of GPU firmware logs to the system log for
-//      the debug kernel driver build only
-//
-#define NV_REG_STR_ENABLE_GPU_FIRMWARE_LOGS                "EnableGpuFirmwareLogs"
-
-#define NV_REG_ENABLE_GPU_FIRMWARE_LOGS_DISABLE            0x00000000
-#define NV_REG_ENABLE_GPU_FIRMWARE_LOGS_ENABLE             0x00000001
-#define NV_REG_ENABLE_GPU_FIRMWARE_LOGS_ENABLE_ON_DEBUG    0x00000002
-
-#endif  // NV_FIRMWARE_REGISTRY_H
--- a/kernel-open/common/inc/nv-firmware.h
+++ b/kernel-open/common/inc/nv-firmware.h
@@ -1,156 +0,0 @@
-/*
- * SPDX-FileCopyrightText: Copyright (c) 2022-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef NV_FIRMWARE_H
-#define NV_FIRMWARE_H
-
-
-
-#include <nvtypes.h>
-#include <nvmisc.h>
-
-typedef enum
-{
-    NV_FIRMWARE_TYPE_GSP,
-    NV_FIRMWARE_TYPE_GSP_LOG,
-#if defined(NV_VMWARE)
-    NV_FIRMWARE_TYPE_BINDATA
-#endif
-} nv_firmware_type_t;
-
-typedef enum
-{
-    NV_FIRMWARE_CHIP_FAMILY_NULL = 0,
-    NV_FIRMWARE_CHIP_FAMILY_TU10X = 1,
-    NV_FIRMWARE_CHIP_FAMILY_TU11X = 2,
-    NV_FIRMWARE_CHIP_FAMILY_GA100 = 3,
-    NV_FIRMWARE_CHIP_FAMILY_GA10X = 4,
-    NV_FIRMWARE_CHIP_FAMILY_AD10X = 5,
-    NV_FIRMWARE_CHIP_FAMILY_GH100 = 6,
-    NV_FIRMWARE_CHIP_FAMILY_GB10X = 8,
-    NV_FIRMWARE_CHIP_FAMILY_GB20X = 9,
-    NV_FIRMWARE_CHIP_FAMILY_GB10Y = 11,
-    NV_FIRMWARE_CHIP_FAMILY_GB20Y = 12,
-    NV_FIRMWARE_CHIP_FAMILY_END,
-} nv_firmware_chip_family_t;
-
-static inline const char *nv_firmware_chip_family_to_string(
-    nv_firmware_chip_family_t fw_chip_family
-)
-{
-    switch (fw_chip_family) {
-        case NV_FIRMWARE_CHIP_FAMILY_GB10X: return "gb10x";
-        case NV_FIRMWARE_CHIP_FAMILY_GB10Y: return "gb10y";
-        case NV_FIRMWARE_CHIP_FAMILY_GB20Y: return "gb20y";
-        case NV_FIRMWARE_CHIP_FAMILY_GB20X: return "gb20x";
-        case NV_FIRMWARE_CHIP_FAMILY_GH100: return "gh100";
-        case NV_FIRMWARE_CHIP_FAMILY_AD10X: return "ad10x";
-        case NV_FIRMWARE_CHIP_FAMILY_GA10X: return "ga10x";
-        case NV_FIRMWARE_CHIP_FAMILY_GA100: return "ga100";
-        case NV_FIRMWARE_CHIP_FAMILY_TU11X: return "tu11x";
-        case NV_FIRMWARE_CHIP_FAMILY_TU10X: return "tu10x";
-
-        case NV_FIRMWARE_CHIP_FAMILY_END:  // fall through
-        case NV_FIRMWARE_CHIP_FAMILY_NULL:
-            return "";
-    }
-    return "";
-}
-
-// The includer may optionally define
-// NV_FIRMWARE_FOR_NAME(name)
-// to return a platform-defined string for a given a gsp_* or gsp_log_* name.
-//
-// The function nv_firmware_for_chip_family will then be available.
-#if defined(NV_FIRMWARE_FOR_NAME)
-static inline const char *nv_firmware_for_chip_family(
-    nv_firmware_type_t fw_type,
-    nv_firmware_chip_family_t fw_chip_family
-)
-{
-    if (fw_type == NV_FIRMWARE_TYPE_GSP)
-    {
-        switch (fw_chip_family)
-        {
-            case NV_FIRMWARE_CHIP_FAMILY_GB10X:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GB10Y:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GB20Y:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GB20X:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GH100:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_AD10X:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GA10X:
-                return NV_FIRMWARE_FOR_NAME("gsp_ga10x");
-
-            case NV_FIRMWARE_CHIP_FAMILY_GA100:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_TU11X:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_TU10X:
-                return NV_FIRMWARE_FOR_NAME("gsp_tu10x");
-
-            case NV_FIRMWARE_CHIP_FAMILY_END:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_NULL:
-                return "";
-        }
-    }
-    else if (fw_type == NV_FIRMWARE_TYPE_GSP_LOG)
-    {
-        switch (fw_chip_family)
-        {
-            case NV_FIRMWARE_CHIP_FAMILY_GB10X:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GB10Y:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GB20Y:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GB20X:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GH100:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_AD10X:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_GA10X:
-                return NV_FIRMWARE_FOR_NAME("gsp_log_ga10x");
-
-            case NV_FIRMWARE_CHIP_FAMILY_GA100:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_TU11X:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_TU10X:
-                return NV_FIRMWARE_FOR_NAME("gsp_log_tu10x");
-
-            case NV_FIRMWARE_CHIP_FAMILY_END:  // fall through
-            case NV_FIRMWARE_CHIP_FAMILY_NULL:
-                return "";
-        }
-    }
-#if defined(NV_VMWARE)
-    else if (fw_type == NV_FIRMWARE_TYPE_BINDATA)
-    {
-        return NV_FIRMWARE_FOR_NAME("bindata_image");
-    }
-#endif
-    return "";
-}
-#endif  // defined(NV_FIRMWARE_FOR_NAME)
-
-// The includer may optionally define
-// NV_FIRMWARE_DECLARE_GSP(name)
-// which will then be invoked (at the top-level) for each
-// gsp_* (but not gsp_log_*)
-#if defined(NV_FIRMWARE_DECLARE_GSP)
-NV_FIRMWARE_DECLARE_GSP("gsp_ga10x")
-NV_FIRMWARE_DECLARE_GSP("gsp_tu10x")
-#endif  // defined(NV_FIRMWARE_DECLARE_GSP)
-
-#endif  // NV_FIRMWARE_DECLARE_GSP
--- a/kernel-open/common/inc/nv-gpu-info.h
+++ b/kernel-open/common/inc/nv-gpu-info.h
@@ -32,8 +32,6 @@ typedef struct {
        NvU8  bus, slot, function;
    } pci_info;

-    NvBool needs_numa_setup;
-
    /*
     * opaque OS-specific pointer; on Linux, this is a pointer to the
     * 'struct device' for the GPU.
--- a/kernel-open/common/inc/nv-hash.h
+++ b/kernel-open/common/inc/nv-hash.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2020-22 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -29,9 +29,17 @@
 #include <linux/kernel.h>
 #include <linux/hash.h>

+#if defined(NV_LINUX_STRINGHASH_H_PRESENT)
 #include <linux/stringhash.h>       /* full_name_hash() */
+#else
+#include <linux/dcache.h>
+#endif

+#if (NV_FULL_NAME_HASH_ARGUMENT_COUNT == 3)
 #define nv_string_hash(_str) full_name_hash(NULL, _str, strlen(_str))
+#else
+#define nv_string_hash(_str) full_name_hash(_str, strlen(_str))
+#endif

 /**
 * This naive hashtable was introduced by commit d9b482c8ba19 (v3.7, 2012-10-31).
@@ -83,6 +91,6 @@ static inline void _nv_hash_init(struct hlist_head *ht, unsigned int sz)
 * @key: the key of the objects to iterate over
 */
 #define nv_hash_for_each_possible(name, obj, member, key) \
-    hlist_for_each_entry(obj, &name[NV_HASH_MIN(key, NV_HASH_BITS(name))], member)
+    nv_hlist_for_each_entry(obj, &name[NV_HASH_MIN(key, NV_HASH_BITS(name))], member)

 #endif // __NV_HASH_H__
--- a/kernel-open/common/inc/nv-hypervisor.h
+++ b/kernel-open/common/inc/nv-hypervisor.h
@@ -27,21 +27,24 @@
 #include <nv-kernel-interface-api.h>

 // Enums for supported hypervisor types.
-// New hypervisor type should be added before OS_HYPERVISOR_UNKNOWN
+// New hypervisor type should be added before OS_HYPERVISOR_CUSTOM_FORCED
 typedef enum _HYPERVISOR_TYPE
 {
    OS_HYPERVISOR_XEN = 0,
    OS_HYPERVISOR_VMWARE,
    OS_HYPERVISOR_HYPERV,
    OS_HYPERVISOR_KVM,
+    OS_HYPERVISOR_PARALLELS,
+    OS_HYPERVISOR_CUSTOM_FORCED,
    OS_HYPERVISOR_UNKNOWN
 } HYPERVISOR_TYPE;

-#define CMD_VFIO_WAKE_REMOVE_GPU              1
-#define CMD_VGPU_VFIO_PRESENT                 2
-#define CMD_VFIO_PCI_CORE_PRESENT             3
+#define CMD_VGPU_VFIO_WAKE_WAIT_QUEUE         0
+#define CMD_VGPU_VFIO_INJECT_INTERRUPT        1
+#define CMD_VGPU_VFIO_REGISTER_MDEV           2
+#define CMD_VGPU_VFIO_PRESENT                 3

-#define MAX_VF_COUNT_PER_GPU                  64
+#define MAX_VF_COUNT_PER_GPU 64

 typedef enum _VGPU_TYPE_INFO
 {
@@ -52,11 +55,16 @@ typedef enum _VGPU_TYPE_INFO

 typedef struct
 {
+    void  *vgpuVfioRef;
+    void  *waitQueue;
    void  *nv;
-    NvU32 domain;
-    NvU32 bus;
-    NvU32 device;
-    NvU32 return_status;
+    NvU32 *vgpuTypeIds;
+    NvU32  numVgpuTypes;
+    NvU32  domain;
+    NvU8   bus;
+    NvU8   slot;
+    NvU8   function;
+    NvBool is_virtfn;
 } vgpu_vfio_info;

 typedef struct
@@ -84,6 +92,30 @@ typedef enum VGPU_DEVICE_STATE_E
    NV_VGPU_DEV_IN_USE = 2
 } VGPU_DEVICE_STATE;

+typedef enum _VMBUS_CMD_TYPE
+{
+    VMBUS_CMD_TYPE_INVALID    = 0,
+    VMBUS_CMD_TYPE_SETUP      = 1,
+    VMBUS_CMD_TYPE_SENDPACKET = 2,
+    VMBUS_CMD_TYPE_CLEANUP    = 3,
+} VMBUS_CMD_TYPE;
+
+typedef struct
+{
+    NvU32 request_id;
+    NvU32 page_count;
+    NvU64 *pPfns;
+    void *buffer;
+    NvU32 bufferlen;
+} vmbus_send_packet_cmd_params;
+
+
+typedef struct
+{
+    NvU32 override_sint;
+    NvU8 *nv_guid;
+} vmbus_setup_cmd_params;
+
 /*
 * Function prototypes
 */
--- a/kernel-open/common/inc/nv-ioctl-numa.h
+++ b/kernel-open/common/inc/nv-ioctl-numa.h
@@ -25,12 +25,14 @@
 #ifndef NV_IOCTL_NUMA_H
 #define NV_IOCTL_NUMA_H

+#if defined(NV_LINUX)
+
 #include <nv-ioctl-numbers.h>

-#if defined(NV_KERNEL_INTERFACE_LAYER) && defined(NV_LINUX)
+#if defined(NV_KERNEL_INTERFACE_LAYER)
+
 #include <linux/types.h>
-#elif defined (NV_KERNEL_INTERFACE_LAYER) && defined(NV_BSD)
-#include <sys/stdint.h>
+
 #else

 #include <stdint.h>
@@ -60,7 +62,6 @@ typedef struct nv_ioctl_numa_info
    uint64_t memblock_size __aligned(8);
    uint64_t numa_mem_addr __aligned(8);
    uint64_t numa_mem_size __aligned(8);
-    uint8_t  use_auto_online;
    nv_offline_addresses_t offline_addresses __aligned(8);
 } nv_ioctl_numa_info_t;

@@ -79,3 +80,5 @@ typedef struct nv_ioctl_set_numa_status
 #define NV_IOCTL_NUMA_STATUS_OFFLINE_FAILED         6

 #endif
+
+#endif
--- a/kernel-open/common/inc/nv-ioctl-numbers.h
+++ b/kernel-open/common/inc/nv-ioctl-numbers.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -39,6 +39,5 @@
 #define NV_ESC_QUERY_DEVICE_INTR     (NV_IOCTL_BASE + 13)
 #define NV_ESC_SYS_PARAMS            (NV_IOCTL_BASE + 14)
 #define NV_ESC_EXPORT_TO_DMABUF_FD   (NV_IOCTL_BASE + 17)
-#define NV_ESC_WAIT_OPEN_COMPLETE    (NV_IOCTL_BASE + 18)

 #endif
--- a/kernel-open/common/inc/nv-ioctl.h
+++ b/kernel-open/common/inc/nv-ioctl.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2020-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2020-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -104,7 +104,7 @@ typedef struct nv_ioctl_rm_api_version

 #define NV_RM_API_VERSION_CMD_STRICT         0
 #define NV_RM_API_VERSION_CMD_RELAXED       '1'
-#define NV_RM_API_VERSION_CMD_QUERY         '2'
+#define NV_RM_API_VERSION_CMD_OVERRIDE      '2'

 #define NV_RM_API_VERSION_REPLY_UNRECOGNIZED 0
 #define NV_RM_API_VERSION_REPLY_RECOGNIZED   1
@@ -128,9 +128,6 @@ typedef struct nv_ioctl_register_fd

 #define NV_DMABUF_EXPORT_MAX_HANDLES 128

-#define NV_DMABUF_EXPORT_MAPPING_TYPE_DEFAULT        0
-#define NV_DMABUF_EXPORT_MAPPING_TYPE_FORCE_PCIE     1
-
 typedef struct nv_ioctl_export_to_dma_buf_fd
 {
    int         fd;
@@ -139,18 +136,10 @@ typedef struct nv_ioctl_export_to_dma_buf_fd
    NvU32       numObjects;
    NvU32       index;
    NvU64       totalSize NV_ALIGN_BYTES(8);
-    NvU8        mappingType;
-    NvBool      bAllowMmap;
    NvHandle    handles[NV_DMABUF_EXPORT_MAX_HANDLES];
    NvU64       offsets[NV_DMABUF_EXPORT_MAX_HANDLES] NV_ALIGN_BYTES(8);
    NvU64       sizes[NV_DMABUF_EXPORT_MAX_HANDLES] NV_ALIGN_BYTES(8);
    NvU32       status;
 } nv_ioctl_export_to_dma_buf_fd_t;

-typedef struct nv_ioctl_wait_open_complete
-{
-    int rc;
-    NvU32 adapterStatus;
-} nv_ioctl_wait_open_complete_t;
-
 #endif
--- a/kernel-open/common/inc/nv-kthread-q-os.h
+++ b/kernel-open/common/inc/nv-kthread-q-os.h
@@ -1,64 +0,0 @@
-/*
- * SPDX-FileCopyrightText: Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef __NV_KTHREAD_QUEUE_OS_H__
-#define __NV_KTHREAD_QUEUE_OS_H__
-
-#include <linux/types.h>            // atomic_t
-#include <linux/list.h>             // list
-#include <linux/sched.h>            // task_struct
-#include <linux/numa.h>             // NUMA_NO_NODE
-#include <linux/semaphore.h>
-
-#include "conftest.h"
-
-struct nv_kthread_q
-{
-    struct list_head q_list_head;
-    spinlock_t q_lock;
-
-    // This is a counting semaphore. It gets incremented and decremented
-    // exactly once for each item that is added to the queue.
-    struct semaphore q_sem;
-    atomic_t main_loop_should_exit;
-
-    struct task_struct *q_kthread;
-
-    bool is_unload_flush_ongoing;
-};
-
-struct nv_kthread_q_item
-{
-    struct list_head q_list_node;
-    nv_q_func_t function_to_run;
-    void *function_args;
-};
-
-
-#ifndef NUMA_NO_NODE
-#define NUMA_NO_NODE (-1)
-#endif
-
-#define NV_KTHREAD_NO_NODE NUMA_NO_NODE
-
-#endif
--- a/kernel-open/common/inc/nv-kthread-q.h
+++ b/kernel-open/common/inc/nv-kthread-q.h
@@ -24,14 +24,18 @@
 #ifndef __NV_KTHREAD_QUEUE_H__
 #define __NV_KTHREAD_QUEUE_H__

-struct nv_kthread_q;
-struct nv_kthread_q_item;
-typedef struct nv_kthread_q nv_kthread_q_t;
-typedef struct nv_kthread_q_item nv_kthread_q_item_t;
+#include <linux/types.h>            // atomic_t
+#include <linux/list.h>             // list
+#include <linux/sched.h>            // task_struct
+#include <linux/numa.h>             // NUMA_NO_NODE

-typedef void (*nv_q_func_t)(void *args);
+#include "conftest.h"

-#include "nv-kthread-q-os.h"
+#if defined(NV_LINUX_SEMAPHORE_H_PRESENT)
+    #include <linux/semaphore.h>
+#else
+    #include <asm/semaphore.h>
+#endif

 ////////////////////////////////////////////////////////////////////////////////
 // nv_kthread_q:
@@ -86,6 +90,43 @@ typedef void (*nv_q_func_t)(void *args);
 //
 ////////////////////////////////////////////////////////////////////////////////

+typedef struct nv_kthread_q nv_kthread_q_t;
+typedef struct nv_kthread_q_item nv_kthread_q_item_t;
+
+typedef void (*nv_q_func_t)(void *args);
+
+struct nv_kthread_q
+{
+    struct list_head q_list_head;
+    spinlock_t q_lock;
+
+    // This is a counting semaphore. It gets incremented and decremented
+    // exactly once for each item that is added to the queue.
+    struct semaphore q_sem;
+    atomic_t main_loop_should_exit;
+
+    struct task_struct *q_kthread;
+};
+
+struct nv_kthread_q_item
+{
+    struct list_head q_list_node;
+    nv_q_func_t function_to_run;
+    void *function_args;
+};
+
+#if defined(NV_KTHREAD_CREATE_ON_NODE_PRESENT)
+    #define NV_KTHREAD_Q_SUPPORTS_AFFINITY() 1
+#else
+    #define NV_KTHREAD_Q_SUPPORTS_AFFINITY() 0
+#endif
+
+#ifndef NUMA_NO_NODE
+#define NUMA_NO_NODE (-1)
+#endif
+
+#define NV_KTHREAD_NO_NODE NUMA_NO_NODE
+
 //
 // The queue must not be used before calling this routine.
 //
@@ -101,12 +142,18 @@ typedef void (*nv_q_func_t)(void *args);
 //
 // A short prefix of the qname arg will show up in []'s, via the ps(1) utility.
 //
-// The kernel thread stack is preferably allocated on the specified NUMA node, 
-// but fallback to another node is possible because kernel allocators do not
+// The kernel thread stack is preferably allocated on the specified NUMA node if
+// NUMA-affinity (NV_KTHREAD_Q_SUPPORTS_AFFINITY() == 1) is supported, but
+// fallback to another node is possible because kernel allocators do not
 // guarantee affinity. Note that NUMA-affinity applies only to
 // the kthread stack. This API does not do anything about limiting the CPU
 // affinity of the kthread. That is left to the caller.
 //
+// On kernels, which do not support NUMA-aware kthread stack allocations
+// (NV_KTHTREAD_Q_SUPPORTS_AFFINITY() == 0), the API will return -ENOTSUPP
+// if the value supplied for 'preferred_node' is anything other than
+// NV_KTHREAD_NO_NODE.
+//
 // Reusing a queue: once a queue is initialized, it must be safely shut down
 // (see "Stopping the queue(s)", below), before it can be reused. So, for
 // a simple queue use case, the following will work:
@@ -124,7 +171,10 @@ int nv_kthread_q_init_on_node(nv_kthread_q_t *q,
 // This routine is the same as nv_kthread_q_init_on_node() with the exception
 // that the queue stack will be allocated on the NUMA node of the caller.
 //
-int nv_kthread_q_init(nv_kthread_q_t *q, const char *qname);
+static inline int nv_kthread_q_init(nv_kthread_q_t *q, const char *qname)
+{
+    return nv_kthread_q_init_on_node(q, qname, NV_KTHREAD_NO_NODE);
+}

 //
 // The caller is responsible for stopping all queues, by calling this routine
--- a/kernel-open/common/inc/nv-linux.h
+++ b/kernel-open/common/inc/nv-linux.h
--- a/kernel-open/common/inc/nv-list-helpers.h
+++ b/kernel-open/common/inc/nv-list-helpers.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2013-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2013-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -73,4 +73,21 @@
    }
 #endif

+#if defined(NV_HLIST_FOR_EACH_ENTRY_ARGUMENT_COUNT)
+#if NV_HLIST_FOR_EACH_ENTRY_ARGUMENT_COUNT == 3
+#define nv_hlist_for_each_entry(pos, head, member) \
+    hlist_for_each_entry(pos, head, member)
+#else
+#if !defined(hlist_entry_safe)
+#define hlist_entry_safe(ptr, type, member) \
+    (ptr) ? hlist_entry(ptr, type, member) : NULL
+#endif
+
+#define nv_hlist_for_each_entry(pos, head, member)                          \
+    for (pos = hlist_entry_safe((head)->first, typeof(*(pos)), member);     \
+         pos;                                                               \
+         pos = hlist_entry_safe((pos)->member.next, typeof(*(pos)), member))
+#endif
+#endif // NV_HLIST_FOR_EACH_ENTRY_ARGUMENT_COUNT
+
 #endif // __NV_LIST_HELPERS_H__
--- a/kernel-open/common/inc/nv-lock.h
+++ b/kernel-open/common/inc/nv-lock.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2017-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2017 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -28,12 +28,30 @@

 #include <linux/spinlock.h>
 #include <linux/rwsem.h>
-#include <linux/sched.h> /* cond_resched */
-#include <linux/semaphore.h>
-#include <linux/sched/signal.h> /* signal_pending */
+#include <linux/sched.h> /* signal_pending, cond_resched */

+#if defined(NV_LINUX_SCHED_SIGNAL_H_PRESENT)
+#include <linux/sched/signal.h>     /* signal_pending for kernels >= 4.11 */
+#endif
+
+#if defined(NV_LINUX_SEMAPHORE_H_PRESENT)
+#include <linux/semaphore.h>
+#else
+#include <asm/semaphore.h>
+#endif
+
+#if defined(CONFIG_PREEMPT_RT) || defined(CONFIG_PREEMPT_RT_FULL)
+typedef raw_spinlock_t            nv_spinlock_t;
+#define NV_SPIN_LOCK_INIT(lock)   raw_spin_lock_init(lock)
+#define NV_SPIN_LOCK_IRQ(lock)    raw_spin_lock_irq(lock)
+#define NV_SPIN_UNLOCK_IRQ(lock)  raw_spin_unlock_irq(lock)
+#define NV_SPIN_LOCK_IRQSAVE(lock,flags) raw_spin_lock_irqsave(lock,flags)
+#define NV_SPIN_UNLOCK_IRQRESTORE(lock,flags) raw_spin_unlock_irqrestore(lock,flags)
+#define NV_SPIN_LOCK(lock)        raw_spin_lock(lock)
+#define NV_SPIN_UNLOCK(lock)      raw_spin_unlock(lock)
+#define NV_SPIN_UNLOCK_WAIT(lock) raw_spin_unlock_wait(lock)
+#else
 typedef spinlock_t                nv_spinlock_t;
-#define NV_DEFINE_SPINLOCK(lock)  DEFINE_SPINLOCK(lock)
 #define NV_SPIN_LOCK_INIT(lock)   spin_lock_init(lock)
 #define NV_SPIN_LOCK_IRQ(lock)    spin_lock_irq(lock)
 #define NV_SPIN_UNLOCK_IRQ(lock)  spin_unlock_irq(lock)
@@ -42,8 +60,22 @@ typedef spinlock_t                nv_spinlock_t;
 #define NV_SPIN_LOCK(lock)        spin_lock(lock)
 #define NV_SPIN_UNLOCK(lock)      spin_unlock(lock)
 #define NV_SPIN_UNLOCK_WAIT(lock) spin_unlock_wait(lock)
+#endif

-#define NV_INIT_MUTEX(mutex) sema_init(mutex, 1)
+#if defined(NV_CONFIG_PREEMPT_RT)
+#define NV_INIT_SEMA(sema, val) sema_init(sema,val)
+#else
+#if !defined(__SEMAPHORE_INITIALIZER) && defined(__COMPAT_SEMAPHORE_INITIALIZER)
+#define __SEMAPHORE_INITIALIZER __COMPAT_SEMAPHORE_INITIALIZER
+#endif
+#define NV_INIT_SEMA(sema, val)                    \
+    {                                              \
+        struct semaphore __sema =                  \
+            __SEMAPHORE_INITIALIZER(*(sema), val); \
+        *(sema) = __sema;                          \
+    }
+#endif
+#define NV_INIT_MUTEX(mutex) NV_INIT_SEMA(mutex, 1)

 static inline int nv_down_read_interruptible(struct rw_semaphore *lock)
 {
--- a/kernel-open/common/inc/nv-mm.h
+++ b/kernel-open/common/inc/nv-mm.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2016-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2016-2017 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -29,112 +29,193 @@
 typedef int vm_fault_t;
 #endif

-/*
- * pin_user_pages()
+/* get_user_pages
 *
- * Presence of pin_user_pages() also implies the presence of unpin-user_page().
- * Both were added in the v5.6.
+ * The 8-argument version of get_user_pages was deprecated by commit
+ * (2016 Feb 12: cde70140fed8429acf7a14e2e2cbd3e329036653)for the non-remote case
+ * (calling get_user_pages with current and current->mm).
 *
- * pin_user_pages() was added by commit eddb1c228f79
- * ("mm/gup: introduce pin_user_pages*() and FOLL_PIN") in v5.6.
+ * Completely moved to the 6 argument version of get_user_pages -
+ * 2016 Apr 4: c12d2da56d0e07d230968ee2305aaa86b93a6832
+ *
+ * write and force parameters were replaced with gup_flags by -
+ * 2016 Oct 12: 768ae309a96103ed02eb1e111e838c87854d8b51
+ *
+ * A 7-argument version of get_user_pages was introduced into linux-4.4.y by
+ * commit 8e50b8b07f462ab4b91bc1491b1c91bd75e4ad40 which cherry-picked the
+ * replacement of the write and force parameters with gup_flags
 *
- * Removed vmas parameter from pin_user_pages() by commit 4c630f307455
- * ("mm/gup: remove vmas parameter from pin_user_pages()") in v6.5.
 */

-#include <linux/mm.h>
-#include <linux/sched.h>
-
-/*
- * FreeBSD's pin_user_pages's conftest breaks since pin_user_pages is an inline
- * function. Because it simply maps to get_user_pages, we can just replace
- * NV_PIN_USER_PAGES with NV_GET_USER_PAGES on FreeBSD
- */
-#if defined(NV_PIN_USER_PAGES_PRESENT) && !defined(NV_BSD)
-    #if defined(NV_PIN_USER_PAGES_HAS_ARGS_VMAS)
-        #define NV_PIN_USER_PAGES(start, nr_pages, gup_flags, pages) \
-            pin_user_pages(start, nr_pages, gup_flags, pages, NULL)
+#if defined(NV_GET_USER_PAGES_HAS_TASK_STRUCT)
+    #if defined(NV_GET_USER_PAGES_HAS_WRITE_AND_FORCE_ARGS)
+        #define NV_GET_USER_PAGES(start, nr_pages, write, force, pages, vmas) \
+            get_user_pages(current, current->mm, start, nr_pages, write, force, pages, vmas)
    #else
-        #define NV_PIN_USER_PAGES pin_user_pages
-    #endif // NV_PIN_USER_PAGES_HAS_ARGS_VMAS
-    #define NV_UNPIN_USER_PAGE unpin_user_page
-#else
-    #define NV_PIN_USER_PAGES NV_GET_USER_PAGES
-    #define NV_UNPIN_USER_PAGE put_page
-#endif // NV_PIN_USER_PAGES_PRESENT
+        #include <linux/mm.h>
+        #include <linux/sched.h>

-/*
- * get_user_pages()
- *
- * Removed vmas parameter from get_user_pages() by commit 54d020692b34
- * ("mm/gup: remove unused vmas parameter from get_user_pages()") in v6.5.
- *
- */
+        static inline long NV_GET_USER_PAGES(unsigned long start,
+                                             unsigned long nr_pages,
+                                             int write,
+                                             int force,
+                                             struct page **pages,
+                                             struct vm_area_struct **vmas)
+        {
+            unsigned int flags = 0;

-#if !defined(NV_GET_USER_PAGES_HAS_VMAS_ARG)
-    #define NV_GET_USER_PAGES get_user_pages
+            if (write)
+                flags |= FOLL_WRITE;
+            if (force)
+                flags |= FOLL_FORCE;
+
+            return get_user_pages(current, current->mm, start, nr_pages, flags,
+                                  pages, vmas);
+        }
+    #endif
 #else
-    #define NV_GET_USER_PAGES(start, nr_pages, flags, pages) \
-        get_user_pages(start, nr_pages, flags, pages, NULL)
+    #if defined(NV_GET_USER_PAGES_HAS_WRITE_AND_FORCE_ARGS)
+        #define NV_GET_USER_PAGES get_user_pages
+    #else
+        #include <linux/mm.h>
+
+        static inline long NV_GET_USER_PAGES(unsigned long start,
+                                             unsigned long nr_pages,
+                                             int write,
+                                             int force,
+                                             struct page **pages,
+                                             struct vm_area_struct **vmas)
+        {
+            unsigned int flags = 0;
+
+            if (write)
+                flags |= FOLL_WRITE;
+            if (force)
+                flags |= FOLL_FORCE;
+
+            return get_user_pages(start, nr_pages, flags, pages, vmas);
+        }
+    #endif
 #endif

 /*
- * pin_user_pages_remote()
+ * get_user_pages_remote() was added by commit 1e9877902dc7
+ * ("mm/gup: Introduce get_user_pages_remote()") in v4.6 (2016-02-12).
 *
- * pin_user_pages_remote() was added by commit eddb1c228f79
- * ("mm/gup: introduce pin_user_pages*() and FOLL_PIN") in v5.6.
+ * The very next commit cde70140fed8 ("mm/gup: Overload get_user_pages()
+ * functions") deprecated the 8-argument version of get_user_pages for the
+ * non-remote case (calling get_user_pages with current and current->mm).
 *
- * pin_user_pages_remote() removed 'tsk' parameter by commit
- * 64019a2e467a ("mm/gup: remove task_struct pointer for all gup code")
- * in v5.9.
+ * The guidelines are: call NV_GET_USER_PAGES_REMOTE if you need the 8-argument
+ * version that uses something other than current and current->mm. Use
+ * NV_GET_USER_PAGES if you are refering to current and current->mm.
 *
- * Removed unused vmas parameter from pin_user_pages_remote() by commit
- * 0b295316b3a9 ("mm/gup: remove unused vmas parameter from
- * pin_user_pages_remote()") in v6.5.
- *
- */
-
-#if defined(NV_PIN_USER_PAGES_REMOTE_PRESENT)
-    #if defined(NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK_VMAS)
-        #define NV_PIN_USER_PAGES_REMOTE(mm, start, nr_pages, flags, pages, locked) \
-            pin_user_pages_remote(NULL, mm, start, nr_pages, flags, pages, NULL, locked)
-    #elif defined(NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_VMAS)
-        #define NV_PIN_USER_PAGES_REMOTE(mm, start, nr_pages, flags, pages, locked) \
-            pin_user_pages_remote(mm, start, nr_pages, flags, pages, NULL, locked)
-    #else
-        #define NV_PIN_USER_PAGES_REMOTE pin_user_pages_remote
-    #endif // NV_PIN_USER_PAGES_REMOTE_HAS_ARGS_TSK_VMAS
-#else
-    #define NV_PIN_USER_PAGES_REMOTE NV_GET_USER_PAGES_REMOTE
-#endif // NV_PIN_USER_PAGES_REMOTE_PRESENT
-
-/*
 * Note that get_user_pages_remote() requires the caller to hold a reference on
- * the mm_struct.
+ * the task_struct (if non-NULL and if this API has tsk argument) and the mm_struct.
 * This will always be true when using current and current->mm. If the kernel passes
 * the driver a vma via driver callback, the kernel holds a reference on vma->vm_mm
 * over that callback.
 *
+ * get_user_pages_remote() write/force parameters were replaced
+ * with gup_flags by commit 9beae1ea8930 ("mm: replace get_user_pages_remote()
+ * write/force parameters with gup_flags") in v4.9 (2016-10-13).
+ *
+ * get_user_pages_remote() added 'locked' parameter by commit 5b56d49fc31d
+ * ("mm: add locked parameter to get_user_pages_remote()") in
+ * v4.10 (2016-12-14).
+ *
 * get_user_pages_remote() removed 'tsk' parameter by
 * commit 64019a2e467a ("mm/gup: remove task_struct pointer for
- * all gup code") in v5.9.
- *
- * Removed vmas parameter from get_user_pages_remote() by commit ca5e863233e8
- * ("mm/gup: remove vmas parameter from get_user_pages_remote()") in v6.5.
+ * all gup code") in v5.9-rc1 (2020-08-11).
 *
 */

-#if defined(NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK_VMAS)
-    #define NV_GET_USER_PAGES_REMOTE(mm, start, nr_pages, flags, pages, locked) \
-        get_user_pages_remote(NULL, mm, start, nr_pages, flags, pages, NULL, locked)
-#elif defined(NV_GET_USER_PAGES_REMOTE_HAS_ARGS_TSK)
-    #define NV_GET_USER_PAGES_REMOTE(mm, start, nr_pages, flags, pages, locked) \
-        get_user_pages_remote(mm, start, nr_pages, flags, pages, NULL, locked)
+#if defined(NV_GET_USER_PAGES_REMOTE_PRESENT)
+    #if defined(NV_GET_USER_PAGES_REMOTE_HAS_WRITE_AND_FORCE_ARGS)
+        #define NV_GET_USER_PAGES_REMOTE    get_user_pages_remote
+    #else
+        static inline long NV_GET_USER_PAGES_REMOTE(struct task_struct *tsk,
+                                                    struct mm_struct *mm,
+                                                    unsigned long start,
+                                                    unsigned long nr_pages,
+                                                    int write,
+                                                    int force,
+                                                    struct page **pages,
+                                                    struct vm_area_struct **vmas)
+        {
+            unsigned int flags = 0;

+            if (write)
+                flags |= FOLL_WRITE;
+            if (force)
+                flags |= FOLL_FORCE;
+
+        #if defined(NV_GET_USER_PAGES_REMOTE_HAS_LOCKED_ARG)
+            #if defined (NV_GET_USER_PAGES_REMOTE_HAS_TSK_ARG)
+               return get_user_pages_remote(tsk, mm, start, nr_pages, flags,
+                                            pages, vmas, NULL);
+            #else
+               return get_user_pages_remote(mm, start, nr_pages, flags,
+                                            pages, vmas, NULL);
+            #endif
+
+        #else
+
+               return get_user_pages_remote(tsk, mm, start, nr_pages, flags,
+                                            pages, vmas);
+
+        #endif
+
+        }
+    #endif
 #else
-    #define NV_GET_USER_PAGES_REMOTE get_user_pages_remote
+    #if defined(NV_GET_USER_PAGES_HAS_WRITE_AND_FORCE_ARGS)
+        #define NV_GET_USER_PAGES_REMOTE    get_user_pages
+    #else
+        #include <linux/mm.h>
+        #include <linux/sched.h>
+
+        static inline long NV_GET_USER_PAGES_REMOTE(struct task_struct *tsk,
+                                                    struct mm_struct *mm,
+                                                    unsigned long start,
+                                                    unsigned long nr_pages,
+                                                    int write,
+                                                    int force,
+                                                    struct page **pages,
+                                                    struct vm_area_struct **vmas)
+        {
+            unsigned int flags = 0;
+
+            if (write)
+                flags |= FOLL_WRITE;
+            if (force)
+                flags |= FOLL_FORCE;
+
+            return get_user_pages(tsk, mm, start, nr_pages, flags, pages, vmas);
+        }
+    #endif
 #endif

+
+/*
+ * The .virtual_address field was effectively renamed to .address, by these
+ * two commits:
+ *
+ *  struct vm_fault: .address was added by:
+ *   2016-12-14  82b0f8c39a3869b6fd2a10e180a862248736ec6f
+ *
+ *  struct vm_fault: .virtual_address was removed by:
+ *   2016-12-14  1a29d85eb0f19b7d8271923d8917d7b4f5540b3e
+ */
+static inline unsigned long nv_page_fault_va(struct vm_fault *vmf)
+{
+#if defined(NV_VM_FAULT_HAS_ADDRESS)
+    return vmf->address;
+#else
+    return (unsigned long)(vmf->virtual_address);
+#endif
+}
+
 static inline void nv_mmap_read_lock(struct mm_struct *mm)
 {
 #if defined(NV_MM_HAS_MMAP_LOCK)
@@ -189,55 +270,4 @@ static inline struct rw_semaphore *nv_mmap_get_lock(struct mm_struct *mm)
 #endif
 }

-#define NV_CAN_CALL_VMA_START_WRITE 1
-
-#if !NV_CAN_CALL_VMA_START_WRITE
-/*
- * Commit 45ad9f5290dc updated vma_start_write() to call __vma_start_write().
- */
-void nv_vma_start_write(struct vm_area_struct *);
-
-static inline void nv_vma_flags_set_word(struct vm_area_struct *vma, unsigned long flags)
-{
-    nv_vma_start_write(vma);
-#if defined(NV_VMA_FLAGS_SET_WORD_PRESENT)
-    vma_flags_set_word(&vma->flags, flags);
-#else
-    ACCESS_PRIVATE(vma, __vm_flags) |= flags;
-#endif
-}
-
-static inline void nv_vma_flags_clear_word(struct vm_area_struct *vma, unsigned long flags)
-{
-    nv_vma_start_write(vma);
-#if defined(NV_VMA_FLAGS_SET_WORD_PRESENT)
-    vma_flags_clear_word(&vma->flags, flags);
-#else
-    ACCESS_PRIVATE(vma, __vm_flags) &= ~flags;
-#endif
-}
-#endif // !NV_CAN_CALL_VMA_START_WRITE
-
-static inline void nv_vm_flags_set(struct vm_area_struct *vma, vm_flags_t flags)
-{
-#if !NV_CAN_CALL_VMA_START_WRITE
-    nv_vma_flags_set_word(vma, flags);
-#elif defined(NV_VM_FLAGS_SET_PRESENT)
-    vm_flags_set(vma, flags);
-#else
-    vma->vm_flags |= flags;
-#endif
-}
-
-static inline void nv_vm_flags_clear(struct vm_area_struct *vma, vm_flags_t flags)
-{
-#if !NV_CAN_CALL_VMA_START_WRITE
-    nv_vma_flags_clear_word(vma, flags);
-#elif defined(NV_VM_FLAGS_SET_PRESENT)
-    vm_flags_clear(vma, flags);
-#else
-    vma->vm_flags &= ~flags;
-#endif
-}
-
 #endif // __NV_MM_H__
--- a/kernel-open/common/inc/nv-modeset-interface.h
+++ b/kernel-open/common/inc/nv-modeset-interface.h
@@ -58,12 +58,6 @@ typedef struct {
     */
    void (*suspend)(NvU32 gpu_id);
    void (*resume)(NvU32 gpu_id);
-
-    /* Remove callback, called when a device is going away completely. */
-    void (*remove)(NvU32 gpu_id);
-
-    /* Probe callback, called when a device is being hotplugged. */
-    void (*probe)(const nv_gpu_info_t *gpu_info);
 } nvidia_modeset_callbacks_t;

 /*
--- a/kernel-open/common/inc/nv-msi.h
+++ b/kernel-open/common/inc/nv-msi.h
@@ -26,7 +26,8 @@

 #include "nv-linux.h"

-#if (defined(CONFIG_X86_LOCAL_APIC) || defined(NVCPU_AARCH64)) && \
+#if (defined(CONFIG_X86_LOCAL_APIC) || defined(NVCPU_AARCH64) || \
+     defined(NVCPU_PPC64LE)) && \
    (defined(CONFIG_PCI_MSI) || defined(CONFIG_PCI_USE_VECTOR))
 #define NV_LINUX_PCIE_MSI_SUPPORTED
 #endif
@@ -86,6 +87,12 @@ static inline int nv_pci_enable_msix(nv_linux_state_t *nvl, int nvec)
 {
    int rc = 0;

+    /*
+     * pci_enable_msix_range() replaced pci_enable_msix() in 3.14-rc1:
+     * 2014-01-03  302a2523c277bea0bbe8340312b09507905849ed
+     */
+
+#if defined(NV_PCI_ENABLE_MSIX_RANGE_PRESENT)
    // We require all the vectors we are requesting so use the same min and max
    rc = pci_enable_msix_range(nvl->pci_dev, nvl->msix_entries, nvec, nvec);
    if (rc < 0)
@@ -93,6 +100,13 @@ static inline int nv_pci_enable_msix(nv_linux_state_t *nvl, int nvec)
        return NV_ERR_OPERATING_SYSTEM;
    }
    WARN_ON(nvec != rc);
+#else
+    rc = pci_enable_msix(nvl->pci_dev, nvl->msix_entries, nvec);
+    if (rc != 0)
+    {
+        return NV_ERR_OPERATING_SYSTEM;
+    }
+#endif

    nvl->num_intr = nvec;
    return NV_OK;
--- a/kernel-open/common/inc/nv-pci.h
+++ b/kernel-open/common/inc/nv-pci.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2019-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2019 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -27,8 +27,16 @@
 #include <linux/pci.h>
 #include "nv-linux.h"

-#define NV_GPU_BAR1 1
-#define NV_GPU_BAR3 3
+#if defined(NV_DEV_IS_PCI_PRESENT)
+#define nv_dev_is_pci(dev) dev_is_pci(dev)
+#else
+/*
+ * Non-PCI devices are only supported on kernels which expose the
+ * dev_is_pci() function. For older kernels, we only support PCI
+ * devices, hence returning true to take all the PCI code paths.
+ */
+#define nv_dev_is_pci(dev) (true)
+#endif

 int nv_pci_register_driver(void);
 void nv_pci_unregister_driver(void);
@@ -36,6 +44,5 @@ int nv_pci_count_devices(void);
 NvU8 nv_find_pci_capability(struct pci_dev *, NvU8);
 int nvidia_dev_get_pci_info(const NvU8 *, struct pci_dev **, NvU64 *, NvU64 *);
 nv_linux_state_t * find_pci(NvU32, NvU8, NvU8, NvU8);
-NvBool nv_pci_is_valid_topology_for_direct_pci(nv_state_t *, struct pci_dev *);
-NvBool nv_pci_has_common_pci_switch(nv_state_t *nv, struct pci_dev *);
+
 #endif
--- a/kernel-open/common/inc/nv-pgprot.h
+++ b/kernel-open/common/inc/nv-pgprot.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2015-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -60,21 +60,31 @@ static inline pgprot_t pgprot_modify_writecombine(pgprot_t old_prot)
 #endif /* !defined(NV_VMWARE) */

 #if defined(NVCPU_AARCH64)
-extern NvBool nvos_is_chipset_io_coherent(void);
 /*
 * Don't rely on the kernel's definition of pgprot_noncached(), as on 64-bit
- * ARM that's not for system memory, but device memory instead.
+ * ARM that's not for system memory, but device memory instead. For I/O cache
+ * coherent systems, use cached mappings instead of uncached.
 */
 #define NV_PGPROT_UNCACHED(old_prot)   \
-     __pgprot_modify((old_prot), PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC))
+    ((nvos_is_chipset_io_coherent()) ? \
+     (old_prot) :                      \
+     __pgprot_modify((old_prot), PTE_ATTRINDX_MASK, PTE_ATTRINDX(MT_NORMAL_NC)))
+#elif defined(NVCPU_PPC64LE)
+/* Don't attempt to mark sysmem pages as uncached on ppc64le */
+#define NV_PGPROT_UNCACHED(old_prot)          old_prot
 #else
 #define NV_PGPROT_UNCACHED(old_prot)          pgprot_noncached(old_prot)
 #endif

 #define NV_PGPROT_UNCACHED_DEVICE(old_prot)     pgprot_noncached(old_prot)
 #if defined(NVCPU_AARCH64)
+#if defined(NV_MT_DEVICE_GRE_PRESENT)
+#define NV_PROT_WRITE_COMBINED_DEVICE   (PROT_DEFAULT | PTE_PXN | PTE_UXN |   \
+                                         PTE_ATTRINDX(MT_DEVICE_GRE))
+#else
 #define NV_PROT_WRITE_COMBINED_DEVICE   (PROT_DEFAULT | PTE_PXN | PTE_UXN |   \
                                         PTE_ATTRINDX(MT_DEVICE_nGnRE))
+#endif
 #define NV_PGPROT_WRITE_COMBINED_DEVICE(old_prot)                             \
    __pgprot_modify(old_prot, PTE_ATTRINDX_MASK, NV_PROT_WRITE_COMBINED_DEVICE)
 #define NV_PGPROT_WRITE_COMBINED(old_prot)      NV_PGPROT_UNCACHED(old_prot)
@@ -88,13 +98,32 @@ extern NvBool nvos_is_chipset_io_coherent(void);
    NV_PGPROT_WRITE_COMBINED_DEVICE(old_prot)
 #define NV_PGPROT_READ_ONLY(old_prot)                                         \
    __pgprot(pgprot_val((old_prot)) & ~_PAGE_RW)
-#elif defined(NVCPU_RISCV64)
+#elif defined(NVCPU_PPC64LE)
+/*
+ * Some kernels use H_PAGE instead of _PAGE
+ */
+#if defined(_PAGE_RW)
+#define NV_PAGE_RW _PAGE_RW
+#elif defined(H_PAGE_RW)
+#define NV_PAGE_RW H_PAGE_RW
+#else
+#warning "The kernel does not provide page protection defines!"
+#endif
+
+#if defined(_PAGE_4K_PFN)
+#define NV_PAGE_4K_PFN _PAGE_4K_PFN
+#elif defined(H_PAGE_4K_PFN)
+#define NV_PAGE_4K_PFN H_PAGE_4K_PFN
+#else
+#undef NV_PAGE_4K_PFN
+#endif
+
 #define NV_PGPROT_WRITE_COMBINED_DEVICE(old_prot)                             \
    pgprot_writecombine(old_prot)
-/* Don't attempt to mark sysmem pages as write combined on riscv */
-#define NV_PGPROT_WRITE_COMBINED(old_prot)     old_prot
+/* Don't attempt to mark sysmem pages as write combined on ppc64le */
+#define NV_PGPROT_WRITE_COMBINED(old_prot)    old_prot
 #define NV_PGPROT_READ_ONLY(old_prot)                                         \
-            __pgprot(pgprot_val((old_prot)) & ~_PAGE_WRITE)
+    __pgprot(pgprot_val((old_prot)) & ~NV_PAGE_RW)
 #else
 /* Writecombine is not supported */
 #undef NV_PGPROT_WRITE_COMBINED_DEVICE(old_prot)
--- a/kernel-open/common/inc/nv-procfs-utils.h
+++ b/kernel-open/common/inc/nv-procfs-utils.h
@@ -74,8 +74,21 @@ typedef struct file_operations nv_proc_ops_t;
        __entry;                                                         \
    })

+/*
+ * proc_mkdir_mode exists in Linux 2.6.9, but isn't exported until Linux 3.0.
+ * Use the older interface instead unless the newer interface is necessary.
+ */
+#if defined(NV_PROC_REMOVE_PRESENT)
 # define NV_PROC_MKDIR_MODE(name, mode, parent)                \
    proc_mkdir_mode(name, mode, parent)
+#else
+# define NV_PROC_MKDIR_MODE(name, mode, parent)                \
+   ({                                                          \
+        struct proc_dir_entry *__entry;                        \
+        __entry = create_proc_entry(name, mode, parent);       \
+        __entry;                                               \
+    })
+#endif

 #define NV_CREATE_PROC_DIR(name,parent)                        \
   ({                                                          \
@@ -91,25 +104,17 @@ typedef struct file_operations nv_proc_ops_t;
 #define NV_PDE_DATA(inode) PDE_DATA(inode)
 #endif

+#if defined(NV_PROC_REMOVE_PRESENT)
+# define NV_REMOVE_PROC_ENTRY(entry)                           \
+    proc_remove(entry);
+#else
+# define NV_REMOVE_PROC_ENTRY(entry)                           \
+    remove_proc_entry(entry->name, entry->parent);
+#endif
+
+void nv_procfs_unregister_all(struct proc_dir_entry *entry,
+                              struct proc_dir_entry *delimiter);
 #define NV_DEFINE_SINGLE_PROCFS_FILE_HELPER(name, lock)                     \
-    static ssize_t nv_procfs_read_lock_##name(                              \
-        struct file *file,                                                  \
-        char __user *buf,                                                   \
-        size_t size,                                                        \
-        loff_t *ppos                                                        \
-    )                                                                       \
-    {                                                                       \
-        int ret;                                                            \
-        ret = nv_down_read_interruptible(&lock);                            \
-        if (ret < 0)                                                        \
-        {                                                                   \
-            return ret;                                                     \
-        }                                                                   \
-        size = seq_read(file, buf, size, ppos);                             \
-        up_read(&lock);                                                     \
-        return size;                                                        \
-    }                                                                       \
-                                                                            \
    static int nv_procfs_open_##name(                                       \
        struct inode *inode,                                                \
        struct file *filep                                                  \
@@ -122,6 +127,11 @@ typedef struct file_operations nv_proc_ops_t;
        {                                                                   \
            return ret;                                                     \
        }                                                                   \
+        ret = nv_down_read_interruptible(&lock);                            \
+        if (ret < 0)                                                        \
+        {                                                                   \
+            single_release(inode, filep);                                   \
+        }                                                                   \
        return ret;                                                         \
    }                                                                       \
                                                                            \
@@ -130,6 +140,7 @@ typedef struct file_operations nv_proc_ops_t;
        struct file *filep                                                  \
    )                                                                       \
    {                                                                       \
+        up_read(&lock);                                                     \
        return single_release(inode, filep);                                \
    }

@@ -139,7 +150,46 @@ typedef struct file_operations nv_proc_ops_t;
    static const nv_proc_ops_t nv_procfs_##name##_fops = {                  \
        NV_PROC_OPS_SET_OWNER()                                             \
        .NV_PROC_OPS_OPEN    = nv_procfs_open_##name,                       \
-        .NV_PROC_OPS_READ    = nv_procfs_read_lock_##name,                  \
+        .NV_PROC_OPS_READ    = seq_read,                                    \
+        .NV_PROC_OPS_LSEEK   = seq_lseek,                                   \
+        .NV_PROC_OPS_RELEASE = nv_procfs_release_##name,                    \
+    };
+
+
+#define NV_DEFINE_SINGLE_PROCFS_FILE_READ_WRITE(name, lock,                 \
+write_callback)                                                             \
+    NV_DEFINE_SINGLE_PROCFS_FILE_HELPER(name, lock)                         \
+                                                                            \
+    static ssize_t nv_procfs_write_##name(                                  \
+        struct file *file,                                                  \
+        const char __user *buf,                                             \
+        size_t size,                                                        \
+        loff_t *ppos                                                        \
+    )                                                                       \
+    {                                                                       \
+        ssize_t ret;                                                        \
+        struct seq_file *s;                                                 \
+                                                                            \
+        s = file->private_data;                                             \
+        if (s == NULL)                                                      \
+        {                                                                   \
+            return -EIO;                                                    \
+        }                                                                   \
+                                                                            \
+        ret = write_callback(s, buf + *ppos, size - *ppos);                 \
+        if (ret == 0)                                                       \
+        {                                                                   \
+            /* avoid infinite loop */                                       \
+            ret = -EIO;                                                     \
+        }                                                                   \
+        return ret;                                                         \
+    }                                                                       \
+                                                                            \
+    static const nv_proc_ops_t nv_procfs_##name##_fops = {                  \
+        NV_PROC_OPS_SET_OWNER()                                             \
+        .NV_PROC_OPS_OPEN    = nv_procfs_open_##name,                       \
+        .NV_PROC_OPS_READ    = seq_read,                                    \
+        .NV_PROC_OPS_WRITE   = nv_procfs_write_##name,                      \
        .NV_PROC_OPS_LSEEK   = seq_lseek,                                   \
        .NV_PROC_OPS_RELEASE = nv_procfs_release_##name,                    \
    };
--- a/kernel-open/common/inc/nv-proto.h
+++ b/kernel-open/common/inc/nv-proto.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 1999-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -25,9 +25,13 @@
 #define _NV_PROTO_H_

 #include "nv-pci.h"
-#include "nv-platform.h"
+#include "nv-register-module.h"
+
+
+

 extern const char *nv_device_name;
+extern nvidia_module_t nv_fops;

 void        nv_acpi_register_notifier   (nv_linux_state_t *);
 void        nv_acpi_unregister_notifier (nv_linux_state_t *);
@@ -42,7 +46,7 @@ void        nv_procfs_remove_gpu        (nv_linux_state_t *);

 int         nvidia_mmap                 (struct file *, struct vm_area_struct *);
 int         nvidia_mmap_helper          (nv_state_t *, nv_linux_file_private_t *, nvidia_stack_t *, struct vm_area_struct *, void *);
-int         nv_encode_caching           (pgprot_t *, NvU32, nv_memory_type_t);
+int         nv_encode_caching           (pgprot_t *, NvU32, NvU32);
 void        nv_revoke_gpu_mappings_locked(nv_state_t *);

 NvUPtr      nv_vm_map_pages             (struct page **, NvU32, NvBool, NvBool);
@@ -53,6 +57,8 @@ void        nv_free_contig_pages        (nv_alloc_t *);
 NV_STATUS   nv_alloc_system_pages       (nv_state_t *, nv_alloc_t *);
 void        nv_free_system_pages        (nv_alloc_t *);

+void        nv_address_space_init_once  (struct address_space *mapping);
+
 int         nv_uvm_init                 (void);
 void        nv_uvm_exit                 (void);
 NV_STATUS   nv_uvm_suspend              (void);
@@ -60,8 +66,6 @@ NV_STATUS   nv_uvm_resume               (void);
 void        nv_uvm_notify_start_device  (const NvU8 *uuid);
 void        nv_uvm_notify_stop_device   (const NvU8 *uuid);
 NV_STATUS   nv_uvm_event_interrupt      (const NvU8 *uuid);
-NV_STATUS   nv_uvm_drain_P2P            (const NvU8 *uuid);
-NV_STATUS   nv_uvm_resume_P2P           (const NvU8 *uuid);

 /* Move these to nv.h once implemented by other UNIX platforms */
 NvBool      nvidia_get_gpuid_list       (NvU32 *gpu_ids, NvU32 *gpu_count);
@@ -78,8 +82,6 @@ NV_STATUS     nv_set_system_power_state (nv_power_state_t, nv_pm_action_depth_t)

 void          nvidia_modeset_suspend           (NvU32 gpuId);
 void          nvidia_modeset_resume            (NvU32 gpuId);
-void          nvidia_modeset_remove            (NvU32 gpuId);
-void          nvidia_modeset_probe             (const nv_linux_state_t *nvl);
 NvBool        nv_is_uuid_in_gpu_exclusion_list (const char *);

 NV_STATUS     nv_parse_per_device_option_string(nvidia_stack_t *sp);
@@ -89,11 +91,8 @@ void          nv_shutdown_adapter(nvidia_stack_t *, nv_state_t *, nv_linux_state
 void          nv_dev_free_stacks(nv_linux_state_t *);
 NvBool        nv_lock_init_locks(nvidia_stack_t *, nv_state_t *);
 void          nv_lock_destroy_locks(nvidia_stack_t *, nv_state_t *);
-int           nv_linux_add_device_locked(nv_linux_state_t *);
+void          nv_linux_add_device_locked(nv_linux_state_t *);
 void          nv_linux_remove_device_locked(nv_linux_state_t *);
 NvBool        nv_acpi_power_resource_method_present(struct pci_dev *);

-int           nv_linux_init_open_q(nv_linux_state_t *);
-void          nv_linux_stop_open_q(nv_linux_state_t *);
-
 #endif /* _NV_PROTO_H_ */
--- a/kernel-open/common/inc/nv-register-module.h
+++ b/kernel-open/common/inc/nv-register-module.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2021-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2012-2013 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -21,19 +21,35 @@
 * DEALINGS IN THE SOFTWARE.
 */

-#ifndef _CLCBCA_H_
-#define _CLCBCA_H_

-#ifdef __cplusplus
-extern "C" {
-#endif
+#ifndef _NV_REGISTER_MODULE_H_
+#define _NV_REGISTER_MODULE_H_
+
+#include <linux/module.h>
+#include <linux/fs.h>
+#include <linux/poll.h>

 #include "nvtypes.h"

-#define NV_COUNTER_COLLECTION_UNIT (0x0000CBCA)
+typedef struct nvidia_module_s {
+    struct module *owner;
+
+    /* nvidia0, nvidia1 ..*/
+    const char *module_name;
+
+    /* module instance */
+    NvU32 instance;
+
+    /* file operations */
+    int (*open)(struct inode *, struct file *filp);
+    int (*close)(struct inode *, struct file *filp);
+    int (*mmap)(struct file *filp, struct vm_area_struct *vma);
+    int (*ioctl)(struct inode *, struct file * file, unsigned int cmd, unsigned long arg);
+    unsigned int (*poll)(struct file * file, poll_table *wait);
+
+} nvidia_module_t;
+
+int nvidia_register_module(nvidia_module_t *);
+int nvidia_unregister_module(nvidia_module_t *);

-#ifdef __cplusplus
-};     /* extern "C" */
 #endif
-
-#endif // _CLCBCA_H_
--- a/kernel-open/common/inc/nv-time.h
+++ b/kernel-open/common/inc/nv-time.h
@@ -36,18 +36,12 @@
 #define NV_MAX_ISR_DELAY_MS           (NV_MAX_ISR_DELAY_US / 1000)
 #define NV_NSECS_TO_JIFFIES(nsec)     ((nsec) * HZ / 1000000000)

-/*
- * in_hardirq() was added in v5.11-rc1 (2020-12-15) to replace in_irq().
- * Fall back to in_irq() for older kernels that don't have in_hardirq().
- */
-static inline NvBool nv_in_hardirq(void)
-{
-#if defined(in_hardirq)
-    return in_hardirq();
-#else
-    return in_irq();
+#if !defined(NV_TIMESPEC64_PRESENT)
+struct timespec64 {
+    __s64 tv_sec;
+    long  tv_nsec;
+};
 #endif
-}

 #if !defined(NV_KTIME_GET_RAW_TS64_PRESENT)
 static inline void ktime_get_raw_ts64(struct timespec64 *ts64)
@@ -59,6 +53,16 @@ static inline void ktime_get_raw_ts64(struct timespec64 *ts64)
 }
 #endif

+#if !defined(NV_KTIME_GET_REAL_TS64_PRESENT)
+static inline void ktime_get_real_ts64(struct timespec64 *ts64)
+{
+    struct timeval tv;
+    do_gettimeofday(&tv);
+    ts64->tv_sec = tv.tv_sec;
+    ts64->tv_nsec = tv.tv_usec * (NvU64) NSEC_PER_USEC;
+}
+#endif
+
 static NvBool nv_timer_less_than
 (
    const struct timespec64 *a,
@@ -69,6 +73,49 @@ static NvBool nv_timer_less_than
                                    : (a->tv_sec < b->tv_sec);
 }

+#if !defined(NV_TIMESPEC64_PRESENT)
+static inline struct timespec64 timespec64_add
+(
+    const struct timespec64    a,
+    const struct timespec64    b
+)
+{
+    struct timespec64 result;
+
+    result.tv_sec = a.tv_sec + b.tv_sec;
+    result.tv_nsec = a.tv_nsec + b.tv_nsec;
+    while (result.tv_nsec >= NSEC_PER_SEC)
+    {
+        ++result.tv_sec;
+        result.tv_nsec -= NSEC_PER_SEC;
+    }
+    return result;
+}
+
+static inline struct timespec64  timespec64_sub
+(
+    const struct timespec64    a,
+    const struct timespec64    b
+)
+{
+    struct timespec64 result;
+
+    result.tv_sec = a.tv_sec - b.tv_sec;
+    result.tv_nsec = a.tv_nsec - b.tv_nsec;
+    while (result.tv_nsec < 0)
+    {
+        --(result.tv_sec);
+        result.tv_nsec += NSEC_PER_SEC;
+    }
+    return result;
+}
+
+static inline s64 timespec64_to_ns(struct timespec64 *ts)
+{
+    return ((s64) ts->tv_sec *  NSEC_PER_SEC) + ts->tv_nsec;
+}
+#endif
+
 static inline NvU64 nv_ktime_get_raw_ns(void)
 {
    struct timespec64 ts;
@@ -95,7 +142,7 @@ static inline NV_STATUS nv_sleep_us(unsigned int us)
    ktime_get_raw_ts64(&tm1);
 #endif

-    if (nv_in_hardirq() && (us > NV_MAX_ISR_DELAY_US))
+    if (in_irq() && (us > NV_MAX_ISR_DELAY_US))
        return NV_ERR_GENERIC;

    mdelay_safe_msec = us / 1000;
@@ -140,7 +187,7 @@ static inline NV_STATUS nv_sleep_ms(unsigned int ms)
    tm_start = tm_aux;
 #endif

-    if (nv_in_hardirq() && (ms > NV_MAX_ISR_DELAY_MS))
+    if (in_irq() && (ms > NV_MAX_ISR_DELAY_MS))
    {
        return NV_ERR_GENERIC;
    }
--- a/kernel-open/common/inc/nv-timer.h
+++ b/kernel-open/common/inc/nv-timer.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2017-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2017 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -42,20 +42,24 @@ static inline void nv_timer_callback_typed_data(struct timer_list *timer)
    nv_timer->nv_timer_callback(nv_timer);
 }

+static inline void nv_timer_callback_anon_data(unsigned long arg)
+{
+    struct nv_timer *nv_timer = (struct nv_timer *)arg;
+
+    nv_timer->nv_timer_callback(nv_timer);
+}
+
 static inline void nv_timer_setup(struct nv_timer *nv_timer,
                                  void (*callback)(struct nv_timer *nv_timer))
 {
    nv_timer->nv_timer_callback = callback;

+#if defined(NV_TIMER_SETUP_PRESENT)
    timer_setup(&nv_timer->kernel_timer, nv_timer_callback_typed_data, 0);
-}
-
-static inline void nv_timer_delete_sync(struct timer_list *timer)
-{
-#if !defined(NV_BSD) && NV_IS_EXPORT_SYMBOL_PRESENT_timer_delete_sync
-    timer_delete_sync(timer);
 #else
-    del_timer_sync(timer);
+    init_timer(&nv_timer->kernel_timer);
+    nv_timer->kernel_timer.function = nv_timer_callback_anon_data;
+    nv_timer->kernel_timer.data = (unsigned long)nv_timer;
 #endif
 }

--- a/kernel-open/common/inc/nv.h
+++ b/kernel-open/common/inc/nv.h
--- a/kernel-open/common/inc/nv_common_utils.h
+++ b/kernel-open/common/inc/nv_common_utils.h
@@ -1,120 +0,0 @@
-/*
- * SPDX-FileCopyrightText: Copyright (c) 2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef __NV_COMMON_UTILS_H__
-#define __NV_COMMON_UTILS_H__
-
-#include "nvtypes.h"
-#include "nvmisc.h"
-
-#if !defined(TRUE)
-#define TRUE NV_TRUE
-#endif
-
-#if !defined(FALSE)
-#define FALSE NV_FALSE
-#endif
-
-#define NV_IS_UNSIGNED(x) ((__typeof__(x))-1 > 0)
-
-/* Get the length of a statically-sized array. */
-#define ARRAY_LEN(_arr) (sizeof(_arr) / sizeof(_arr[0]))
-
-#define NV_INVALID_HEAD         0xFFFFFFFF
-
-#define NV_INVALID_CONNECTOR_PHYSICAL_INFORMATION (~0)
-
-#if !defined(NV_MIN)
-# define NV_MIN(a,b) (((a)<(b))?(a):(b))
-#endif
-
-#define NV_MIN3(a,b,c) NV_MIN(NV_MIN(a, b), c)
-#define NV_MIN4(a,b,c,d) NV_MIN3(NV_MIN(a,b),c,d)
-
-#if !defined(NV_MAX)
-# define NV_MAX(a,b) (((a)>(b))?(a):(b))
-#endif
-
-#define NV_MAX3(a,b,c) NV_MAX(NV_MAX(a, b), c)
-#define NV_MAX4(a,b,c,d) NV_MAX3(NV_MAX(a,b),c,d)
-
-static inline int NV_LIMIT_VAL_TO_MIN_MAX(int val, int min, int max)
-{
-    if (val < min) {
-        return min;
-    }
-    if (val > max) {
-        return max;
-    }
-    return val;
-}
-
-#define NV_ROUNDUP_DIV(x,y) ((x) / (y) + (((x) % (y)) ? 1 : 0))
-
-/*
- * Macros used for computing palette entries:
- *
- * NV_UNDER_REPLICATE(val, source_size, result_size) expands a value
- * of source_size bits into a value of target_size bits by shifting
- * the source value into the high bits and replicating the high bits
- * of the value into the low bits of the result.
- *
- * PALETTE_DEPTH_SHIFT(val, w) maps a colormap entry for a component
- * that has w bits to an appropriate entry in a LUT of 256 entries.
- */
-static inline unsigned int NV_UNDER_REPLICATE(unsigned short val,
-                                              int source_size,
-                                              int result_size)
-{
-    return (val << (result_size - source_size)) |
-        (val >> ((source_size << 1) - result_size));
-}
-
-
-static inline unsigned short PALETTE_DEPTH_SHIFT(unsigned short val, int depth)
-{
-    return NV_UNDER_REPLICATE(val, depth, 8);
-}
-
-/*
- *  Use __builtin_ffs where it is supported, or provide an equivalent
- *  implementation for platforms like riscv where it is not.
- */
-#if defined(__GNUC__) && !NVCPU_IS_RISCV64
-static inline int nv_ffs(int x)
-{
-    return __builtin_ffs(x);
-}
-#else
-static inline int nv_ffs(int x)
-{
-    if (x == 0)
-        return 0;
-
-    LOWESTBITIDX_32(x);
-
-    return 1 + x;
-}
-#endif
-
-#endif /* __NV_COMMON_UTILS_H__ */
--- a/kernel-open/common/inc/nv_dpy_id.h
+++ b/kernel-open/common/inc/nv_dpy_id.h
@@ -1,370 +0,0 @@
-/*
- * SPDX-FileCopyrightText: Copyright (c) 2010-2014 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-/*
- * This header file defines the types NVDpyId and NVDpyIdList, as well
- * as inline functions to manipulate these types.  NVDpyId and
- * NVDpyIdList should be treated as opaque by includers of this header
- * file.
- */
-
-#ifndef __NV_DPY_ID_H__
-#define __NV_DPY_ID_H__
-
-#include "nvtypes.h"
-#include "nvmisc.h"
-#include "nv_common_utils.h"
-#include <nvlimits.h> /* NV_MAX_SUBDEVICES */
-
-typedef struct {
-    NvU32 opaqueDpyId;
-} NVDpyId;
-
-typedef struct {
-    NvU32 opaqueDpyIdList;
-} NVDpyIdList;
-
-#define NV_DPY_ID_MAX_SUBDEVICES NV_MAX_SUBDEVICES
-#define NV_DPY_ID_MAX_DPYS_IN_LIST 32
-
-/*
- * For use in combination with nvDpyIdToPrintFormat(); e.g.,
- *
- * printf("dpy id: " NV_DPY_ID_PRINT_FORMAT "\n",
- *        nvDpyIdToPrintFormat(dpyId));
- *
- * The includer should not make assumptions about the return type of
- * nvDpyIdToPrintFormat().
- */
-#define NV_DPY_ID_PRINT_FORMAT "0x%08x"
-
-/* functions to return an invalid DpyId and empty DpyIdList */
-
-static inline NVDpyId nvInvalidDpyId(void)
-{
-    NVDpyId dpyId = { 0 };
-    return dpyId;
-}
-
-static inline NVDpyIdList nvEmptyDpyIdList(void)
-{
-    NVDpyIdList dpyIdList = { 0 };
-    return dpyIdList;
-}
-
-static inline NVDpyIdList nvAllDpyIdList(void)
-{
-    NVDpyIdList dpyIdList = { ~0U };
-    return dpyIdList;
-}
-
-static inline void
-nvEmptyDpyIdListSubDeviceArray(NVDpyIdList dpyIdList[NV_DPY_ID_MAX_SUBDEVICES])
-{
-    int dispIndex;
-    for (dispIndex = 0; dispIndex < NV_DPY_ID_MAX_SUBDEVICES; dispIndex++) {
-        dpyIdList[dispIndex] = nvEmptyDpyIdList();
-    }
-}
-
-/* set operations on DpyIds and DpyIdLists: Add, Subtract, Intersect, Xor */
-
-static inline __attribute__ ((warn_unused_result))
-NVDpyIdList nvAddDpyIdToDpyIdList(NVDpyId dpyId, NVDpyIdList dpyIdList)
-{
-    NVDpyIdList tmpDpyIdList;
-    tmpDpyIdList.opaqueDpyIdList = dpyIdList.opaqueDpyIdList |
-        dpyId.opaqueDpyId;
-    return tmpDpyIdList;
-}
-
-/* Passing an invalid display ID makes this function return an empty list. */
-static inline __attribute__ ((warn_unused_result))
-NVDpyIdList nvAddDpyIdToEmptyDpyIdList(NVDpyId dpyId)
-{
-    NVDpyIdList tmpDpyIdList;
-    tmpDpyIdList.opaqueDpyIdList =  dpyId.opaqueDpyId;
-    return tmpDpyIdList;
-}
-
-static inline __attribute__ ((warn_unused_result))
-NVDpyIdList nvAddDpyIdListToDpyIdList(NVDpyIdList dpyIdListA,
-                                      NVDpyIdList dpyIdListB)
-{
-    NVDpyIdList tmpDpyIdList;
-    tmpDpyIdList.opaqueDpyIdList = dpyIdListB.opaqueDpyIdList |
-        dpyIdListA.opaqueDpyIdList;
-    return tmpDpyIdList;
-}
-
-/* Returns: dpyIdList - dpyId */
-static inline __attribute__ ((warn_unused_result))
-NVDpyIdList nvDpyIdListMinusDpyId(NVDpyIdList dpyIdList, NVDpyId dpyId)
-{
-    NVDpyIdList tmpDpyIdList;
-    tmpDpyIdList.opaqueDpyIdList = dpyIdList.opaqueDpyIdList &
-        (~dpyId.opaqueDpyId);
-    return tmpDpyIdList;
-}
-
-/* Returns: dpyIdListA - dpyIdListB */
-static inline __attribute__ ((warn_unused_result))
-NVDpyIdList nvDpyIdListMinusDpyIdList(NVDpyIdList dpyIdListA,
-                                      NVDpyIdList dpyIdListB)
-{
-    NVDpyIdList tmpDpyIdList;
-    tmpDpyIdList.opaqueDpyIdList = dpyIdListA.opaqueDpyIdList &
-        (~dpyIdListB.opaqueDpyIdList);
-    return tmpDpyIdList;
-}
-
-static inline __attribute__ ((warn_unused_result))
-NVDpyIdList nvIntersectDpyIdAndDpyIdList(NVDpyId dpyId, NVDpyIdList dpyIdList)
-{
-    NVDpyIdList tmpDpyIdList;
-    tmpDpyIdList.opaqueDpyIdList = dpyIdList.opaqueDpyIdList &
-        dpyId.opaqueDpyId;
-    return tmpDpyIdList;
-}
-
-static inline __attribute__ ((warn_unused_result))
-NVDpyIdList nvIntersectDpyIdListAndDpyIdList(NVDpyIdList dpyIdListA,
-                                             NVDpyIdList dpyIdListB)
-{
-    NVDpyIdList tmpDpyIdList;
-    tmpDpyIdList.opaqueDpyIdList = dpyIdListA.opaqueDpyIdList &
-        dpyIdListB.opaqueDpyIdList;
-    return tmpDpyIdList;
-}
-
-static inline __attribute__ ((warn_unused_result))
-NVDpyIdList nvXorDpyIdAndDpyIdList(NVDpyId dpyId, NVDpyIdList dpyIdList)
-{
-    NVDpyIdList tmpDpyIdList;
-    tmpDpyIdList.opaqueDpyIdList = dpyIdList.opaqueDpyIdList ^
-        dpyId.opaqueDpyId;
-    return tmpDpyIdList;
-}
-
-static inline __attribute__ ((warn_unused_result))
-NVDpyIdList nvXorDpyIdListAndDpyIdList(NVDpyIdList dpyIdListA,
-                                       NVDpyIdList dpyIdListB)
-{
-    NVDpyIdList tmpDpyIdList;
-    tmpDpyIdList.opaqueDpyIdList = dpyIdListA.opaqueDpyIdList ^
-        dpyIdListB.opaqueDpyIdList;
-    return tmpDpyIdList;
-}
-
-
-/* boolean checks */
-
-static inline NvBool nvDpyIdIsInDpyIdList(NVDpyId dpyId,
-                                          NVDpyIdList dpyIdList)
-{
-    return !!(dpyIdList.opaqueDpyIdList & dpyId.opaqueDpyId);
-}
-
-static inline NvBool nvDpyIdIsInvalid(NVDpyId dpyId)
-{
-    return (dpyId.opaqueDpyId == 0);
-}
-
-static inline NvBool nvDpyIdListIsEmpty(NVDpyIdList dpyIdList)
-{
-    return (dpyIdList.opaqueDpyIdList == 0);
-}
-
-static inline NvBool
-nvDpyIdListSubDeviceArrayIsEmpty(NVDpyIdList
-                                 dpyIdList[NV_DPY_ID_MAX_SUBDEVICES])
-{
-    int dispIndex;
-    for (dispIndex = 0; dispIndex < NV_DPY_ID_MAX_SUBDEVICES; dispIndex++) {
-        if (!nvDpyIdListIsEmpty(dpyIdList[dispIndex])) {
-            return NV_FALSE;
-        }
-    }
-    return NV_TRUE;
-}
-
-
-static inline NvBool nvDpyIdsAreEqual(NVDpyId dpyIdA, NVDpyId dpyIdB)
-{
-    return (dpyIdA.opaqueDpyId == dpyIdB.opaqueDpyId);
-}
-
-static inline NvBool nvDpyIdListsAreEqual(NVDpyIdList dpyIdListA,
-                                          NVDpyIdList dpyIdListB)
-{
-    return (dpyIdListA.opaqueDpyIdList == dpyIdListB.opaqueDpyIdList);
-}
-
-static inline NvBool nvDpyIdListIsASubSetofDpyIdList(NVDpyIdList dpyIdListA,
-                                                     NVDpyIdList dpyIdListB)
-{
-    NVDpyIdList intersectedDpyIdList =
-        nvIntersectDpyIdListAndDpyIdList(dpyIdListA, dpyIdListB);
-
-    return nvDpyIdListsAreEqual(intersectedDpyIdList, dpyIdListA);
-}
-
-
-/*
- * retrieve the individual dpyIds from dpyIdList; if dpyId is invalid,
- * start at the beginning of the list; otherwise, start at the dpyId
- * after the specified dpyId
- */
-
-static inline __attribute__ ((warn_unused_result))
-NVDpyId nvNextDpyIdInDpyIdListUnsorted(NVDpyId dpyId, NVDpyIdList dpyIdList)
-{
-    if (nvDpyIdIsInvalid(dpyId)) {
-        dpyId.opaqueDpyId = 1;
-    } else {
-        dpyId.opaqueDpyId <<= 1;
-    }
-
-    while (dpyId.opaqueDpyId) {
-
-        if (nvDpyIdIsInDpyIdList(dpyId, dpyIdList)) {
-            return dpyId;
-        }
-
-        dpyId.opaqueDpyId <<= 1;
-    }
-
-    /* no dpyIds left in dpyIdlist; return the invalid dpyId */
-
-    return nvInvalidDpyId();
-}
-
-#define FOR_ALL_DPY_IDS(_dpyId, _dpyIdList)                           \
-    for ((_dpyId) = nvNextDpyIdInDpyIdListUnsorted(nvInvalidDpyId(),  \
-                                                   (_dpyIdList));     \
-         !nvDpyIdIsInvalid(_dpyId);                                   \
-         (_dpyId) = nvNextDpyIdInDpyIdListUnsorted((_dpyId),          \
-                                                   (_dpyIdList)))
-
-/* report how many dpyIds are in the dpyIdList */
-
-static inline int nvCountDpyIdsInDpyIdList(NVDpyIdList dpyIdList)
-{
-    return nvPopCount32(dpyIdList.opaqueDpyIdList);
-}
-
-static inline int
-nvCountDpyIdsInDpyIdListSubDeviceArray(NVDpyIdList
-                                       dpyIdList[NV_DPY_ID_MAX_SUBDEVICES])
-{
-    int dispIndex, n = 0;
-
-    for (dispIndex = 0; dispIndex < NV_DPY_ID_MAX_SUBDEVICES; dispIndex++) {
-        n += nvCountDpyIdsInDpyIdList(dpyIdList[dispIndex]);
-    }
-
-    return n;
-}
-
-/* convert between dpyId/dpyIdList and NV-CONTROL values */
-
-static inline int nvDpyIdToNvControlVal(NVDpyId dpyId)
-{
-    return (int) dpyId.opaqueDpyId;
-}
-
-static inline int nvDpyIdListToNvControlVal(NVDpyIdList dpyIdList)
-{
-    return (int) dpyIdList.opaqueDpyIdList;
-}
-
-static inline NVDpyId nvNvControlValToDpyId(int val)
-{
-    NVDpyId dpyId;
-    dpyId.opaqueDpyId = (val == 0) ? 0 : 1 << (nv_ffs(val)-1);
-    return dpyId;
-}
-
-static inline NVDpyIdList nvNvControlValToDpyIdList(int val)
-{
-    NVDpyIdList dpyIdList;
-    dpyIdList.opaqueDpyIdList = val;
-    return dpyIdList;
-}
-
-
-/* convert between dpyId and NvU32 */
-
-static inline NVDpyId nvNvU32ToDpyId(NvU32 val)
-{
-    NVDpyId dpyId;
-    dpyId.opaqueDpyId = (val == 0) ? 0 : 1 << (nv_ffs(val)-1);
-    return dpyId;
-}
-
-static inline NVDpyIdList nvNvU32ToDpyIdList(NvU32 val)
-{
-    NVDpyIdList dpyIdList;
-    dpyIdList.opaqueDpyIdList = val;
-    return dpyIdList;
-}
-
-static inline NvU32 nvDpyIdToNvU32(NVDpyId dpyId)
-{
-    return dpyId.opaqueDpyId;
-}
-
-static inline NvU32 nvDpyIdListToNvU32(NVDpyIdList dpyIdList)
-{
-    return dpyIdList.opaqueDpyIdList;
-}
-
-/* Return the bit position of dpyId: a number in the range [0..31]. */
-static inline NvU32 nvDpyIdToIndex(NVDpyId dpyId)
-{
-    return nv_ffs(dpyId.opaqueDpyId) - 1;
-}
-
-/* Return a display ID that is not in the list passed in. */
-
-static inline NVDpyId nvNewDpyId(NVDpyIdList excludeList)
-{
-    NVDpyId dpyId;
-    if (~excludeList.opaqueDpyIdList == 0) {
-        return nvInvalidDpyId();
-    }
-    dpyId.opaqueDpyId =
-        1U << (nv_ffs(~excludeList.opaqueDpyIdList) - 1);
-    return dpyId;
-}
-
-/* See comment for NV_DPY_ID_PRINT_FORMAT. */
-static inline NvU32 nvDpyIdToPrintFormat(NVDpyId dpyId)
-{
-    return nvDpyIdToNvU32(dpyId);
-}
-
-/* Prevent usage of opaque values. */
-#define opaqueDpyId __ERROR_ACCESS_ME_VIA_NV_DPY_ID_H
-#define opaqueDpyIdList __ERROR_ACCESS_ME_VIA_NV_DPY_ID_H
-
-#endif /* __NV_DPY_ID_H__ */
--- a/kernel-open/common/inc/nv_firmware_types.h
+++ b/kernel-open/common/inc/nv_firmware_types.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -20,21 +20,15 @@
 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
 * DEALINGS IN THE SOFTWARE.
 */
-#ifndef __NV_MIG_TYPES_H__
-#define __NV_MIG_TYPES_H__

-#ifdef __cplusplus
-extern "C" {
-#endif
+#ifndef NV_FIRMWARE_TYPES_H
+#define NV_FIRMWARE_TYPES_H

-#include "nvtypes.h"
+typedef enum {
+    NV_FIRMWARE_MODE_DISABLED = 0,
+    NV_FIRMWARE_MODE_ENABLED  = 1,
+    NV_FIRMWARE_MODE_DEFAULT  = 2,
+    NV_FIRMWARE_MODE_INVALID  = 0xFF
+} NvFirmwareMode;

-typedef NvU32 MIGDeviceId;
-
-#define NO_MIG_DEVICE 0L
-
-#ifdef __cplusplus
-}
-#endif
-
-#endif /* __NV_MIG_TYPES_H__ */
+#endif // NV_FIRMWARE_TYPES_H
--- a/kernel-open/common/inc/nv_speculation_barrier.h
+++ b/kernel-open/common/inc/nv_speculation_barrier.h
@@ -86,7 +86,7 @@
 /* Not currently implemented for MSVC/ARM64. See bug 3366890. */
 #   define nv_speculation_barrier()
 #   define speculation_barrier() nv_speculation_barrier()
-#elif defined(NVCPU_IS_RISCV64)
+#elif defined(NVCPU_NVRISCV64) && NVOS_IS_LIBOS
 #   define nv_speculation_barrier()
 #else
 #error "Unknown compiler/chip family"
--- a/kernel-open/common/inc/nv_uvm_interface.h
+++ b/kernel-open/common/inc/nv_uvm_interface.h
--- a/kernel-open/common/inc/nv_uvm_types.h
+++ b/kernel-open/common/inc/nv_uvm_types.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2014-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2014-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -22,8 +22,7 @@
 */

 //
-// This file provides common types for both the UVM kernel driver and RM's UVM
-// interface.
+// This file provides common types for both UVM driver and RM's UVM interface.
 //

 #ifndef _NV_UVM_TYPES_H_
@@ -33,9 +32,20 @@
 #include "nvstatus.h"
 #include "nvgputypes.h"
 #include "nvCpuUuid.h"
-#include "nv_uvm_user_types.h" // For UvmGpuCachingType, UvmGpuMappingType, etc


+//
+// Default Page Size if left "0" because in RM BIG page size is default & there
+// are multiple BIG page sizes in RM. These defines are used as flags to "0"
+// should be OK when user is not sure which pagesize allocation it wants
+//
+#define UVM_PAGE_SIZE_DEFAULT    0x0
+#define UVM_PAGE_SIZE_4K         0x1000
+#define UVM_PAGE_SIZE_64K        0x10000
+#define UVM_PAGE_SIZE_128K       0x20000
+#define UVM_PAGE_SIZE_2M         0x200000
+#define UVM_PAGE_SIZE_512M       0x20000000
+
 //
 // When modifying flags, make sure they are compatible with the mirrored
 // PMA_* flags in phys_mem_allocator.h.
@@ -70,6 +80,9 @@
 //
 #define UVM_PMA_CALLED_FROM_PMA_EVICTION        16384

+#define UVM_UUID_LEN 16
+#define UVM_SW_OBJ_SUBCHANNEL 5
+
 typedef unsigned long long UvmGpuPointer;

 //
@@ -79,7 +92,6 @@ typedef unsigned long long UvmGpuPointer;
 typedef struct uvmGpuSession_tag       *uvmGpuSessionHandle;       // gpuSessionHandle
 typedef struct uvmGpuDevice_tag        *uvmGpuDeviceHandle;        // gpuDeviceHandle
 typedef struct uvmGpuAddressSpace_tag  *uvmGpuAddressSpaceHandle;  // gpuAddressSpaceHandle
-typedef struct uvmGpuTsg_tag           *uvmGpuTsgHandle;           // gpuTsgHandle
 typedef struct uvmGpuChannel_tag       *uvmGpuChannelHandle;       // gpuChannelHandle
 typedef struct uvmGpuCopyEngine_tag    *uvmGpuCopyEngineHandle;    // gpuObjectHandle

@@ -91,10 +103,6 @@ typedef struct UvmGpuMemoryInfo_tag
    // Out: Set to TRUE, if the allocation is in sysmem.
    NvBool sysmem;

-    // Out: Set to TRUE, if this allocation is treated as EGM.
-    //      sysmem is also TRUE when egm is TRUE.
-    NvBool egm;
-
    // Out: Set to TRUE, if the allocation is a constructed
    //      under a Device or Subdevice.
    //      All permutations of sysmem and deviceDescendant are valid.
@@ -102,7 +110,7 @@ typedef struct UvmGpuMemoryInfo_tag
    NvBool deviceDescendant;

    // Out: Page size associated with the phys alloc.
-    NvU64 pageSize;
+    NvU32 pageSize;

    // Out: Set to TRUE, if the allocation is contiguous.
    NvBool contig;
@@ -116,10 +124,6 @@ typedef struct UvmGpuMemoryInfo_tag

    // Out: Uuid of the GPU to which the allocation belongs.
    //      This is only valid if deviceDescendant is NV_TRUE.
-    //      When egm is NV_TRUE, this is also the UUID of the GPU
-    //      for which EGM is local.
-    //      If the GPU has SMC enabled, the UUID is the GI UUID.
-    //      Otherwise, it is the UUID for the physical GPU.
    //      Note: If the allocation is owned by a device in
    //      an SLI group and the allocation is broadcast
    //      across the SLI group, this UUID will be any one
@@ -213,6 +217,12 @@ typedef struct UvmGpuChannelInstanceInfo_tag
    // Out: Type of the engine the channel is bound to
    NvU32 channelEngineType;

+    // Out: Channel handle required to ring the doorbell
+    NvU32 workSubmissionToken;
+
+    // Out: Address of the doorbell
+    volatile NvU32 *workSubmissionOffset;
+
    // Out: Channel handle to be used in the CLEAR_FAULTED method
    NvU32 clearFaultedToken;

@@ -221,10 +231,6 @@ typedef struct UvmGpuChannelInstanceInfo_tag
    // Ampere+ GPUs
    volatile NvU32 *pChramChannelRegister;

-    // Out: Address of the Runlist PRI Base Register required to ring the
-    // doorbell after clearing the faulted bit.
-    volatile NvU32 *pRunlistPRIBaseRegister;
-
    // Out: SMC engine id to which the GR channel is bound, or zero if the GPU
    // does not support SMC or it is a CE channel
    NvU32 smcEngineId;
@@ -255,8 +261,6 @@ typedef struct UvmGpuChannelInfo_tag
    // The errorNotifier is filled out when the channel hits an RC error.
    NvNotification    *errorNotifier;

-    NvNotification    *keyRotationNotifier;
-
    NvU32              hwRunlistId;
    NvU32              hwChannelId;

@@ -278,17 +282,6 @@ typedef struct UvmGpuChannelInfo_tag
    // to kick off the new work.
    //
    volatile NvU32    *pWorkSubmissionToken;
-
-    // GPU VAs of both GPFIFO and GPPUT are needed in Confidential Computing
-    // so a channel can be controlled via another channel (SEC2 or WLC/LCIC)
-    NvU64              gpFifoGpuVa;
-    NvU64              gpPutGpuVa;
-    NvU64              gpGetGpuVa;
-
-    // GPU VA of work submission offset is needed in Confidential Computing
-    // so CE channels can ring doorbell of other channels as required for
-    // WLC/LCIC work submission
-    NvU64              workSubmissionOffsetGpuVa;
 } UvmGpuChannelInfo;

 typedef enum
@@ -301,17 +294,6 @@ typedef enum
    UVM_BUFFER_LOCATION_VID  = 2,
 } UVM_BUFFER_LOCATION;

-typedef struct UvmGpuTsgAllocParams_tag
-{
-    // Interpreted as UVM_GPU_CHANNEL_ENGINE_TYPE
-    NvU32 engineType;
-
-    // Index of the engine the TSG is bound to.
-    // Ignored if engineType is anything other than
-    // UVM_GPU_CHANNEL_ENGINE_TYPE_CE.
-    NvU32 engineIndex;
-} UvmGpuTsgAllocParams;
-
 typedef struct UvmGpuChannelAllocParams_tag
 {
    NvU32 numGpFifoEntries;
@@ -319,6 +301,13 @@ typedef struct UvmGpuChannelAllocParams_tag
    // The next two fields store UVM_BUFFER_LOCATION values
    NvU32 gpFifoLoc;
    NvU32 gpPutLoc;
+
+    // Index of the engine the channel will be bound to
+    // ignored if engineType is anything other than UVM_GPU_CHANNEL_ENGINE_TYPE_CE
+    NvU32 engineIndex;
+
+    // interpreted as UVM_GPU_CHANNEL_ENGINE_TYPE
+    NvU32 engineType;
 } UvmGpuChannelAllocParams;

 typedef struct UvmGpuPagingChannelAllocParams_tag
@@ -330,7 +319,7 @@ typedef struct UvmGpuPagingChannelAllocParams_tag

 // The max number of Copy Engines supported by a GPU.
 // The gpu ops build has a static assert that this is the correct number.
-#define UVM_COPY_ENGINE_COUNT_MAX 64
+#define UVM_COPY_ENGINE_COUNT_MAX 10

 typedef struct
 {
@@ -362,9 +351,6 @@ typedef struct
    // True if the CE can be used for P2P transactions
    NvBool p2p:1;

-    // True if the CE supports encryption
-    NvBool secure:1;
-
    // Mask of physical CEs assigned to this LCE
    //
    // The value returned by RM for this field may change when a GPU is
@@ -386,23 +372,48 @@ typedef enum
    UVM_LINK_TYPE_NVLINK_1,
    UVM_LINK_TYPE_NVLINK_2,
    UVM_LINK_TYPE_NVLINK_3,
-    UVM_LINK_TYPE_NVLINK_4,
-    UVM_LINK_TYPE_NVLINK_5,
-    UVM_LINK_TYPE_C2C,
+
+
+
+
 } UVM_LINK_TYPE;

 typedef struct UvmGpuCaps_tag
 {
-    // If numaEnabled is NV_TRUE, then the system address of allocated GPU
-    // memory can be converted to struct pages. See
-    // UvmGpuInfo::systemMemoryWindowStart.
+    NvU32    sysmemLink;            // UVM_LINK_TYPE
+    NvU32    sysmemLinkRateMBps;    // See UvmGpuP2PCapsParams::totalLinkLineRateMBps
    NvBool   numaEnabled;
    NvU32    numaNodeId;
+
+    // On ATS systems, GPUs connected to different CPU sockets can have peer
+    // traffic. They are called indirect peers. However, indirect peers are
+    // mapped using sysmem aperture. In order to disambiguate the location of a
+    // specific memory address, each GPU maps its memory to a different window
+    // in the System Physical Address (SPA) space. The following fields contain
+    // the base + size of such window for the GPU. systemMemoryWindowSize
+    // different than 0 indicates that the window is valid.
+    //
+    // - If the window is valid, then we can map GPU memory to the CPU as
+    // cache-coherent by adding the GPU address to the window start.
+    // - If numaEnabled is NV_TRUE, then we can also convert the system
+    // addresses of allocated GPU memory to struct pages.
+    //
+    // TODO: Bug 1986868: fix window start computation for SIMICS
+    NvU64    systemMemoryWindowStart;
+    NvU64    systemMemoryWindowSize;
+
+    // This tells if the GPU is connected to NVSwitch. On systems with NVSwitch
+    // all GPUs are connected to it. If connectedToSwitch is NV_TRUE,
+    // nvswitchMemoryWindowStart tells the base address for the GPU in the
+    // NVSwitch address space. It is used when creating PTEs of memory mappings
+    // to NVSwitch peers.
+    NvBool   connectedToSwitch;
+    NvU64    nvswitchMemoryWindowStart;
 } UvmGpuCaps;

 typedef struct UvmGpuAddressSpaceInfo_tag
 {
-    NvU64           bigPageSize;
+    NvU32           bigPageSize;

    NvBool          atsEnabled;

@@ -422,44 +433,99 @@ typedef struct UvmGpuAddressSpaceInfo_tag

 typedef struct UvmGpuAllocInfo_tag
 {
+    NvU64   rangeBegin;             // Allocation will be made between
+    NvU64   rangeEnd;               // rangeBegin & rangeEnd both included
    NvU64   gpuPhysOffset;          // Returns gpuPhysOffset if contiguous requested
-    NvU64   pageSize;               // default is RM big page size - 64K or 128 K" else use 4K or 2M
-    NvU64   alignment;              // Virtual alignment
+    NvU32   pageSize;               // default is RM big page size - 64K or 128 K" else use 4K or 2M
+    NvU64   alignment;              // Alignment of allocation
    NvBool  bContiguousPhysAlloc;   // Flag to request contiguous physical allocation
    NvBool  bMemGrowsDown;          // Causes RM to reserve physical heap from top of FB
    NvBool  bPersistentVidmem;      // Causes RM to allocate persistent video memory
    NvHandle hPhysHandle;           // Handle for phys allocation either provided or retrieved
-    NvBool   bUnprotected;            // Allocation to be made in unprotected memory whenever
-                                      // SEV or GPU CC modes are enabled. Ignored otherwise
+
+
+
+
 } UvmGpuAllocInfo;

+typedef enum
+{
+    UVM_VIRT_MODE_NONE = 0,             // Baremetal or passthrough virtualization
+    UVM_VIRT_MODE_LEGACY = 1,           // Virtualization without SRIOV support
+    UVM_VIRT_MODE_SRIOV_HEAVY = 2,      // Virtualization with SRIOV Heavy configured
+    UVM_VIRT_MODE_SRIOV_STANDARD = 3,   // Virtualization with SRIOV Standard configured
+    UVM_VIRT_MODE_COUNT = 4,
+} UVM_VIRT_MODE;
+
+// !!! The following enums (with UvmRm prefix) are defined and documented in
+// mm/uvm/interface/uvm_types.h and must be mirrored. Please refer to that file
+// for more details.
+
+// UVM GPU mapping types
+typedef enum
+{
+    UvmRmGpuMappingTypeDefault = 0,
+    UvmRmGpuMappingTypeReadWriteAtomic = 1,
+    UvmRmGpuMappingTypeReadWrite = 2,
+    UvmRmGpuMappingTypeReadOnly = 3,
+    UvmRmGpuMappingTypeCount = 4
+} UvmRmGpuMappingType;
+
+// UVM GPU caching types
+typedef enum
+{
+    UvmRmGpuCachingTypeDefault = 0,
+    UvmRmGpuCachingTypeForceUncached = 1,
+    UvmRmGpuCachingTypeForceCached = 2,
+    UvmRmGpuCachingTypeCount = 3
+} UvmRmGpuCachingType;
+
+// UVM GPU format types
+typedef enum {
+   UvmRmGpuFormatTypeDefault = 0,
+   UvmRmGpuFormatTypeBlockLinear = 1,
+   UvmRmGpuFormatTypeCount = 2
+} UvmRmGpuFormatType;
+
+// UVM GPU Element bits types
+typedef enum {
+   UvmRmGpuFormatElementBitsDefault = 0,
+   UvmRmGpuFormatElementBits8 = 1,
+   UvmRmGpuFormatElementBits16 = 2,
+   // Cuda does not support 24-bit width
+   UvmRmGpuFormatElementBits32 = 4,
+   UvmRmGpuFormatElementBits64 = 5,
+   UvmRmGpuFormatElementBits128 = 6,
+   UvmRmGpuFormatElementBitsCount = 7
+} UvmRmGpuFormatElementBits;
+
+// UVM GPU Compression types
+typedef enum {
+    UvmRmGpuCompressionTypeDefault = 0,
+    UvmRmGpuCompressionTypeEnabledNoPlc = 1,
+    UvmRmGpuCompressionTypeCount = 2
+} UvmRmGpuCompressionType;
+
 typedef struct UvmGpuExternalMappingInfo_tag
 {
    // In: GPU caching ability.
-    UvmGpuCachingType cachingType;
+    UvmRmGpuCachingType cachingType;

    // In: Virtual permissions.
-    UvmGpuMappingType mappingType;
+    UvmRmGpuMappingType mappingType;

    // In: RM virtual mapping memory format
-    UvmGpuFormatType formatType;
+    UvmRmGpuFormatType formatType;

    // In: RM virtual mapping element bits
-    UvmGpuFormatElementBits elementBits;
+    UvmRmGpuFormatElementBits elementBits;

    // In: RM virtual compression type
-    UvmGpuCompressionType compressionType;
+    UvmRmGpuCompressionType compressionType;

    // In: Size of the buffer to store PTEs (in bytes).
    NvU64 pteBufferSize;

-    // In: Page size for mapping
-    //     If this field is passed as 0, the page size
-    //     of the allocation is used for mapping.
-    //     nvUvmInterfaceGetExternalAllocPtes must pass
-    //     this field as zero.
-    NvU64 mappingPageSize;
-
    // In: Pointer to a buffer to store PTEs.
    // Out: The interface will fill the buffer with PTEs
    NvU64 *pteBuffer;
@@ -474,51 +540,14 @@ typedef struct UvmGpuExternalMappingInfo_tag

    // Out: PTE size (in bytes)
    NvU32 pteSize;
-
-    // Out: UVM needs to invalidate L2 at unmap
-    NvBool bNeedL2InvalidateAtUnmap;
 } UvmGpuExternalMappingInfo;

-typedef struct UvmGpuExternalPhysAddrInfo_tag
-{
-    // In: Virtual permissions. Returns
-    // NV_ERR_INVALID_ACCESS_TYPE if input is
-    // inaccurate
-    UvmGpuMappingType mappingType;
-
-    // In: Size of the buffer to store PhysAddrs (in bytes).
-    NvU64 physAddrBufferSize;
-
-    // In: Page size for mapping
-    //     If this field is passed as 0, the page size
-    //     of the allocation is used for mapping.
-    //     nvUvmInterfaceGetExternalAllocPtes must pass
-    //     this field as zero.
-    NvU64 mappingPageSize;
-
-    // In: Pointer to a buffer to store PhysAddrs.
-    // Out: The interface will fill the buffer with PhysAddrs
-    NvU64 *physAddrBuffer;
-
-    // Out: Number of PhysAddrs filled in to the buffer.
-    NvU64 numWrittenPhysAddrs;
-
-    // Out: Number of PhysAddrs remaining to be filled
-    //      if the buffer is not sufficient to accommodate
-    //      requested PhysAddrs.
-    NvU64 numRemainingPhysAddrs;
-} UvmGpuExternalPhysAddrInfo;
-
 typedef struct UvmGpuP2PCapsParams_tag
 {
    // Out: peerId[i] contains gpu[i]'s peer id of gpu[1 - i]. Only defined if
    // the GPUs are direct peers.
    NvU32 peerIds[2];

-    // Out: peerId[i] contains gpu[i]'s EGM peer id of gpu[1 - i]. Only defined
-    // if the GPUs are direct peers and EGM enabled in the system.
-    NvU32 egmPeerIds[2];
-
    // Out: UVM_LINK_TYPE
    NvU32 p2pLink;

@@ -535,10 +564,10 @@ typedef struct UvmGpuP2PCapsParams_tag
    // bandwidth for indirect peers is zero.
    NvU32 totalLinkLineRateMBps;

-    // Out: IOMMU/DMA mappings of bar1 of the respective peer vidmem.
-    // Size is 0 if bar1 p2p is not supported.
-    NvU64 bar1DmaAddress[2];
-    NvU64 bar1DmaSize[2];
+    // Out: True if the peers have a indirect link to communicate. On P9
+    // systems, this is true if peers are connected to different NPUs that
+    // forward the requests between them.
+    NvU32 indirectAccess      : 1;
 } UvmGpuP2PCapsParams;

 // Platform-wide information
@@ -547,11 +576,10 @@ typedef struct UvmPlatformInfo_tag
    // Out: ATS (Address Translation Services) is supported
    NvBool atsSupported;

-    // Out: True if HW trusted execution, such as AMD's SEV-SNP or Intel's TDX,
-    // is enabled in the VM, indicating that Confidential Computing must be
-    // also enabled in the GPU(s); these two security features are either both
-    // enabled, or both disabled.
-    NvBool confComputingEnabled;
+
+
+
+
 } UvmPlatformInfo;

 typedef struct UvmGpuClientInfo_tag
@@ -561,14 +589,23 @@ typedef struct UvmGpuClientInfo_tag
    NvHandle hSmcPartRef;
 } UvmGpuClientInfo;

-typedef struct UvmGpuConfComputeCaps_tag
-{
-    // Out: true if Confidential Computing is enabled on the GPU
-    NvBool bConfComputingEnabled;

-    // Out: true if key rotation is enabled (for UVM keys) on the GPU
-    NvBool bKeyRotationEnabled;
-} UvmGpuConfComputeCaps;
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+

 #define UVM_GPU_NAME_LENGTH 0x40

@@ -577,8 +614,7 @@ typedef struct UvmGpuInfo_tag
    // Printable gpu name
    char name[UVM_GPU_NAME_LENGTH];

-    // Uuid of the physical GPU or GI UUID if nvUvmInterfaceGetGpuInfo()
-    // requested information for a valid SMC partition.
+    // Uuid of this gpu
    NvProcessorUuid uuid;

    // Gpu architecture; NV2080_CTRL_MC_ARCH_INFO_ARCHITECTURE_*
@@ -624,9 +660,6 @@ typedef struct UvmGpuInfo_tag
    // Maximum number of TPCs per GPC
    NvU32 maxTpcPerGpcCount;

-    // Number of access counter buffers.
-    NvU32 accessCntrBufferCount;
-
    // NV_TRUE if SMC is enabled on this GPU.
    NvBool smcEnabled;

@@ -638,63 +671,10 @@ typedef struct UvmGpuInfo_tag

    UvmGpuClientInfo smcUserClientInfo;

-    // Confidential Compute capabilities of this GPU
-    UvmGpuConfComputeCaps gpuConfComputeCaps;

-    // UVM_LINK_TYPE
-    NvU32 sysmemLink;

-    // See UvmGpuP2PCapsParams::totalLinkLineRateMBps
-    NvU32 sysmemLinkRateMBps;

-    // On coherent systems each GPU maps its memory to a window in the System
-    // Physical Address (SPA) space. The following fields describe that window.
-    //
-    // systemMemoryWindowSize > 0 indicates that the window is valid. meaning
-    // that GPU memory can be mapped by the CPU as cache-coherent by adding the
-    // GPU address to the window start.
-    NvU64 systemMemoryWindowStart;
-    NvU64 systemMemoryWindowSize;

-    // This tells if the GPU is connected to NVSwitch. On systems with NVSwitch
-    // all GPUs are connected to it. If connectedToSwitch is NV_TRUE,
-    // nvswitchMemoryWindowStart tells the base address for the GPU in the
-    // NVSwitch address space. It is used when creating PTEs of memory mappings
-    // to NVSwitch peers.
-    NvBool connectedToSwitch;
-    NvU64 nvswitchMemoryWindowStart;
-
-    // local EGM properties
-    // NV_TRUE if EGM is enabled
-    NvBool   egmEnabled;
-
-    // Peer ID to reach local EGM when EGM is enabled
-    NvU8     egmPeerId;
-
-    // EGM base address to offset in the GMMU PTE entry for EGM mappings
-    NvU64    egmBaseAddr;
-
-    // If connectedToSwitch is NV_TRUE,
-    // nvswitchEgmMemoryWindowStart tells the base address for the GPU's EGM memory in the
-    // NVSwitch address space. It is used when creating PTEs of GPU memory mappings
-    // to NVSwitch peers.
-    NvU64 nvswitchEgmMemoryWindowStart;
-
-    // GPU supports ATS capability
-    NvBool atsSupport;
-
-    // GPU supports Non-PASID ATS capability
-    NvBool nonPasidAtsSupport;
-
-    // GPU setup in CDMM mode
-    NvBool cdmmEnabled;
-
-    // If nvlinkDirectConnect is NV_TRUE,
-    // nvlDirectConnectMemoryWindowStart is the GPA base address for the GPU's vidmem over
-    // direct-connect NVLink. It is used when creating PTEs of GPU memory mappings
-    // to direct NVLink peers.
-    NvBool nvlDirectConnect;
-    NvU64 nvlDirectConnectMemoryWindowStart;
 } UvmGpuInfo;

 typedef struct UvmGpuFbInfo_tag
@@ -703,16 +683,9 @@ typedef struct UvmGpuFbInfo_tag
    // RM regions that are not registered with PMA either.
    NvU64 maxAllocatableAddress;

-    NvU32  heapSize;           // RAM in KB available for user allocations
-    NvU32  reservedHeapSize;   // RAM in KB reserved for internal RM allocation
-    NvBool bZeroFb;            // Zero FB mode enabled.
-    NvU64  maxVidmemPageSize;  // Largest GPU page size to access vidmem.
-    NvBool bStaticBar1Enabled; // Static BAR1 mode is enabled
-    NvBool bStaticBar1WriteCombined; // Write combined is enabled
-    NvU64  staticBar1StartOffset;  // The start offset of the the static mapping
-    NvU64  staticBar1Size;     // The size of the static mapping
-    NvU32  heapStart;          // The start offset of heap in KB, helpful for MIG
-                               // systems
+    NvU32 heapSize;         // RAM in KB available for user allocations
+    NvU32 reservedHeapSize; // RAM in KB reserved for internal RM allocation
+    NvBool bZeroFb;         // Zero FB mode enabled.
 } UvmGpuFbInfo;

 typedef struct UvmGpuEccInfo_tag
@@ -724,15 +697,6 @@ typedef struct UvmGpuEccInfo_tag
    NvBool   bEccEnabled;
 } UvmGpuEccInfo;

-typedef struct UvmGpuNvlinkInfo_tag
-{
-    unsigned nvlinkMask;
-    unsigned nvlinkOffset;
-    void    *nvlinkReadLocation;
-    NvBool  *nvlinkErrorNotifier;
-    NvBool   bNvlinkRecoveryEnabled;
-} UvmGpuNvlinkInfo;
-
 typedef struct UvmPmaAllocationOptions_tag
 {
    NvU32 flags;
@@ -745,6 +709,21 @@ typedef struct UvmPmaAllocationOptions_tag
    NvU32 resultFlags;          // valid if the allocation function returns NV_OK
 } UvmPmaAllocationOptions;

+//
+// Mirrored in PMA (PMA_STATS)
+//
+typedef struct UvmPmaStatistics_tag
+{
+    volatile NvU64 numPages2m;                // PMA-wide 2MB pages count across all regions
+    volatile NvU64 numFreePages64k;           // PMA-wide free 64KB page count across all regions
+    volatile NvU64 numFreePages2m;            // PMA-wide free 2MB pages count across all regions
+
+
+
+
+
+} UvmPmaStatistics;
+
 /*******************************************************************************
    uvmEventSuspend
    This function will be called by the GPU driver to signal to UVM that the
@@ -786,14 +765,14 @@ typedef NV_STATUS (*uvmEventResume_t) (void);
 /*******************************************************************************
    uvmEventStartDevice
    This function will be called by the GPU driver once it has finished its
-    initialization to tell the UVM driver that this physical GPU has come up.
+    initialization to tell the UVM driver that this GPU has come up.
 */
 typedef NV_STATUS (*uvmEventStartDevice_t) (const NvProcessorUuid *pGpuUuidStruct);

 /*******************************************************************************
    uvmEventStopDevice
-    This function will be called by the GPU driver to let UVM know that a
-    physical GPU is going down.
+    This function will be called by the GPU driver to let UVM know that a GPU
+    is going down.
 */
 typedef NV_STATUS (*uvmEventStopDevice_t) (const NvProcessorUuid *pGpuUuidStruct);

@@ -824,7 +803,7 @@ typedef NV_STATUS (*uvmEventServiceInterrupt_t) (void *pDeviceObject,
 /*******************************************************************************
    uvmEventIsrTopHalf_t
    This function will be called by the GPU driver to let UVM know
-    that an interrupt has occurred on the given physical GPU.
+    that an interrupt has occurred.

    Returns:
        NV_OK if the UVM driver handled the interrupt
@@ -836,41 +815,6 @@ typedef NV_STATUS (*uvmEventIsrTopHalf_t) (const NvProcessorUuid *pGpuUuidStruct
 typedef void (*uvmEventIsrTopHalf_t) (void);
 #endif

-/*******************************************************************************
-    uvmEventDrainP2P
-    This function will be called by the GPU driver to signal to UVM that the
-    GPU has encountered an uncontained error, and all peer work must be drained
-    to recover.  When it is called, the following assumptions/guarantees are
-    valid/made:
-
-      * Impacted user channels have been preempted and disabled
-      * UVM channels are still running normally and will continue to do
-        so unless an unrecoverable error is hit on said channels
-      * UVM must not return from this function until all enqueued work on
-      * peer channels has drained
-      * In the context of this function call, RM will still service faults
-      * UVM must prevent new peer work from being enqueued until the
-        uvmEventResumeP2P callback is issued
-
-    Returns:
-        NV_OK if UVM has idled peer work and will prevent new peer workloads.
-        NV_ERR_TIMEOUT if peer work was unable to be drained within a timeout
-        XXX NV_ERR_* for any other failure (TBD)
-
-*/
-typedef NV_STATUS (*uvmEventDrainP2P_t) (const NvProcessorUuid *pGpuUuidStruct);
-
-/*******************************************************************************
-    uvmEventResumeP2P
-    This function will be called by the GPU driver to signal to UVM that the
-    GPU has recovered from the previously reported uncontained NVLINK error.
-    When it is called, the following assumptions/guarantees are valid/made:
-
-      * UVM is again allowed to enqueue peer work
-      * UVM channels are still running normally
-*/
-typedef NV_STATUS (*uvmEventResumeP2P_t) (const NvProcessorUuid *pGpuUuidStruct);
-
 struct UvmOpsUvmEvents
 {
    uvmEventSuspend_t     suspend;
@@ -883,91 +827,26 @@ struct UvmOpsUvmEvents
    uvmEventWddmRestartAfterTimeout_t wddmRestartAfterTimeout;
    uvmEventServiceInterrupt_t serviceInterrupt;
 #endif
-    uvmEventDrainP2P_t drainP2P;
-    uvmEventResumeP2P_t resumeP2P;
 };

-#define UVM_CSL_SIGN_AUTH_TAG_SIZE_BYTES 32
-#define UVM_CSL_CRYPT_AUTH_TAG_SIZE_BYTES 16
-
-typedef union UvmFaultMetadataPacket_tag
-{
-    struct {
-        NvU8   authTag[UVM_CSL_CRYPT_AUTH_TAG_SIZE_BYTES];
-        NvBool valid;
-    };
-    // padding to 32Bytes
-    NvU8 _padding[32];
-} UvmFaultMetadataPacket;
-
-// This struct shall not be accessed nor modified directly by UVM as it is
-// entirely managed by the RM layer
-typedef struct UvmCslContext_tag
-{
-    struct ccslContext_t *ctx;
-    void *nvidia_stack;
-} UvmCslContext;
-
 typedef struct UvmGpuFaultInfo_tag
 {
    struct
    {
-        // Fault buffer GET register mapping.
-        //
-        // When Confidential Computing is enabled, GET refers to the shadow
-        // buffer (see bufferAddress below), and not to the actual HW buffer.
-        // In this setup, writes of GET (by UVM) do not result on re-evaluation
-        // of any interrupt condition.
+        // Register mappings obtained from RM
        volatile NvU32* pFaultBufferGet;
-
-        // Fault buffer PUT register mapping.
-        //
-        // When Confidential Computing is enabled, PUT refers to the shadow
-        // buffer (see bufferAddress below), and not to the actual HW buffer.
-        // In this setup, writes of PUT (by GSP-RM) do not result on
-        // re-evaluation of any interrupt condition.
        volatile NvU32* pFaultBufferPut;
-
-        // Note: this variable is deprecated since buffer overflow is not a
-        // separate register from future chips.
+        // Note: this variable is deprecated since buffer overflow is not a separate
+        // register from future chips.
        volatile NvU32* pFaultBufferInfo;
-
-        // Register mapping used to clear a replayable fault interrupt in
-        // Turing+ GPUs.
        volatile NvU32* pPmcIntr;
-
-        // Register mapping used to enable replayable fault interrupts.
        volatile NvU32* pPmcIntrEnSet;
-
-        // Register mapping used to disable replayable fault interrupts.
        volatile NvU32* pPmcIntrEnClear;
-
-        // Register used to enable, or disable, faults on prefetches.
        volatile NvU32* pPrefetchCtrl;
-
-        // Replayable fault interrupt mask identifier.
        NvU32 replayableFaultMask;
-
-        // Fault buffer CPU mapping
-        // When Confidential Computing is disabled, the mapping points to the
-        // actual HW fault buffer.
-        //
-        // When Confidential Computing is enabled, the mapping points to a
-        // copy of the HW fault buffer. This "shadow buffer" is maintained
-        // by GSP-RM.
-        void*  bufferAddress;
-
-        // Size, in bytes, of the fault buffer pointed by bufferAddress.
+        // fault buffer cpu mapping and size
+        void* bufferAddress;
        NvU32  bufferSize;
-
-        // Mapping pointing to the start of the fault buffer metadata containing
-        // a 16Byte authentication tag and a valid byte. Always NULL when
-        // Confidential Computing is disabled.
-        UvmFaultMetadataPacket *bufferMetadata;
-
-        // CSL context used for performing decryption of replayable faults when
-        // Confidential Computing is enabled.
-        UvmCslContext cslCtx;
    } replayable;
    struct
    {
@@ -986,24 +865,10 @@ typedef struct UvmGpuFaultInfo_tag

        // Preallocated stack for functions called from the UVM isr bottom half
        void *isr_bh_sp;
-
-        // Used only when Hopper Confidential Compute is enabled
-        // Register mappings obtained from RM
-        volatile NvU32* pFaultBufferPut;
-
-        // Used only when Hopper Confidential Compute is enabled
-        // Cached get index of the non-replayable shadow buffer
-        NvU32 shadowBufferGet;
-
-        // See replayable.bufferMetadata
-        UvmFaultMetadataPacket  *shadowBufferMetadata;
    } nonReplayable;
    NvHandle faultBufferHandle;
-    struct Device *pDevice;
 } UvmGpuFaultInfo;

-struct Device;
-
 typedef struct UvmGpuPagingChannel_tag
 {
    struct gpuDevice  *device;
@@ -1011,7 +876,6 @@ typedef struct UvmGpuPagingChannel_tag
    NvHandle          channelHandle;
    NvHandle          errorNotifierHandle;
    void              *pushStreamSp;
-    struct Device     *pDevice;
 } UvmGpuPagingChannel, *UvmGpuPagingChannelHandle;

 typedef struct UvmGpuAccessCntrInfo_tag
@@ -1035,26 +899,44 @@ typedef struct UvmGpuAccessCntrInfo_tag
    void* bufferAddress;
    NvU32  bufferSize;
    NvHandle accessCntrBufferHandle;
+
+    // The Notification address in the access counter notification msg does not
+    // contain the correct upper bits 63-47 for GPA-based notifications. RM
+    // provides us with the correct offset to be added.
+    // See Bug 1803015
+    NvU64 baseDmaSysmemAddr;
 } UvmGpuAccessCntrInfo;

+typedef enum
+{
+    UVM_ACCESS_COUNTER_GRANULARITY_64K = 1,
+    UVM_ACCESS_COUNTER_GRANULARITY_2M  = 2,
+    UVM_ACCESS_COUNTER_GRANULARITY_16M = 3,
+    UVM_ACCESS_COUNTER_GRANULARITY_16G = 4,
+} UVM_ACCESS_COUNTER_GRANULARITY;
+
+typedef enum
+{
+    UVM_ACCESS_COUNTER_USE_LIMIT_NONE = 1,
+    UVM_ACCESS_COUNTER_USE_LIMIT_QTR  = 2,
+    UVM_ACCESS_COUNTER_USE_LIMIT_HALF = 3,
+    UVM_ACCESS_COUNTER_USE_LIMIT_FULL = 4,
+} UVM_ACCESS_COUNTER_USE_LIMIT;
+
 typedef struct UvmGpuAccessCntrConfig_tag
 {
-    NvU32 granularity;
+    NvU32 mimcGranularity;
+
+    NvU32 momcGranularity;
+
+    NvU32 mimcUseLimit;
+
+    NvU32 momcUseLimit;
+
    NvU32 threshold;
 } UvmGpuAccessCntrConfig;

-//
-// When modifying this enum, make sure they are compatible with the mirrored
-// MEMORY_PROTECTION enum in phys_mem_allocator.h.
-//
-typedef enum UvmPmaGpuMemoryType_tag
-{
-    UVM_PMA_GPU_MEMORY_TYPE_UNPROTECTED = 0,
-    UVM_PMA_GPU_MEMORY_TYPE_PROTECTED   = 1
-} UVM_PMA_GPU_MEMORY_TYPE;
-
 typedef UvmGpuChannelInfo gpuChannelInfo;
-typedef UvmGpuTsgAllocParams gpuTsgAllocParams;
 typedef UvmGpuChannelAllocParams gpuChannelAllocParams;
 typedef UvmGpuCaps gpuCaps;
 typedef UvmGpuCopyEngineCaps gpuCeCaps;
@@ -1069,45 +951,20 @@ typedef UvmGpuAccessCntrConfig gpuAccessCntrConfig;
 typedef UvmGpuFaultInfo gpuFaultInfo;
 typedef UvmGpuMemoryInfo gpuMemoryInfo;
 typedef UvmGpuExternalMappingInfo gpuExternalMappingInfo;
-typedef UvmGpuExternalPhysAddrInfo gpuExternalPhysAddrInfo;
 typedef UvmGpuChannelResourceInfo gpuChannelResourceInfo;
 typedef UvmGpuChannelInstanceInfo gpuChannelInstanceInfo;
 typedef UvmGpuChannelResourceBindParams gpuChannelResourceBindParams;
 typedef UvmGpuFbInfo gpuFbInfo;
 typedef UvmGpuEccInfo gpuEccInfo;
-typedef UvmGpuNvlinkInfo gpuNvlinkInfo;
 typedef UvmGpuPagingChannel *gpuPagingChannelHandle;
 typedef UvmGpuPagingChannelInfo gpuPagingChannelInfo;
 typedef UvmGpuPagingChannelAllocParams gpuPagingChannelAllocParams;
 typedef UvmPmaAllocationOptions gpuPmaAllocationOptions;

-typedef struct UvmCslIv
-{
-    NvU8 iv[12];
-    NvU8 fresh;
-} UvmCslIv;

-typedef enum UvmCslOperation
-{
-    UVM_CSL_OPERATION_ENCRYPT,
-    UVM_CSL_OPERATION_DECRYPT
-} UvmCslOperation;

-typedef enum UVM_KEY_ROTATION_STATUS {
-    // Key rotation complete/not in progress
-    UVM_KEY_ROTATION_STATUS_IDLE = 0,
-    // RM is waiting for clients to report their channels are idle for key rotation
-    UVM_KEY_ROTATION_STATUS_PENDING = 1,
-    // Key rotation is in progress
-    UVM_KEY_ROTATION_STATUS_IN_PROGRESS = 2,
-    // Key rotation timeout failure, RM will RC non-idle channels.
-    // UVM should never see this status value.
-    UVM_KEY_ROTATION_STATUS_FAILED_TIMEOUT = 3,
-    // Key rotation failed because upper threshold was crossed, RM will RC non-idle channels
-    UVM_KEY_ROTATION_STATUS_FAILED_THRESHOLD = 4,
-    // Internal RM failure while rotating keys for a certain channel, RM will RC the channel.
-    UVM_KEY_ROTATION_STATUS_FAILED_ROTATION = 5,
-    UVM_KEY_ROTATION_STATUS_MAX_COUNT = 6,
-} UVM_KEY_ROTATION_STATUS;
+
+
+

 #endif // _NV_UVM_TYPES_H_
--- a/kernel-open/common/inc/nv_uvm_user_types.h
+++ b/kernel-open/common/inc/nv_uvm_user_types.h
@@ -1,166 +0,0 @@
-/*
- * SPDX-FileCopyrightText: Copyright (c) 2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-//
-// This file provides common types for the UVM kernel driver, UVM user layer,
-// and RM's UVM interface.
-//
-
-#ifndef _NV_UVM_USER_TYPES_H_
-#define _NV_UVM_USER_TYPES_H_
-
-#include "nvtypes.h"
-
-//
-// Default Page Size if left "0" because in RM BIG page size is default & there
-// are multiple BIG page sizes in RM. These defines are used as flags to "0"
-// should be OK when user is not sure which pagesize allocation it wants
-//
-#define UVM_PAGE_SIZE_DEFAULT    0x0ULL
-#define UVM_PAGE_SIZE_4K         0x1000ULL
-#define UVM_PAGE_SIZE_64K        0x10000ULL
-#define UVM_PAGE_SIZE_128K       0x20000ULL
-#define UVM_PAGE_SIZE_2M         0x200000ULL
-#define UVM_PAGE_SIZE_512M       0x20000000ULL
-#define UVM_PAGE_SIZE_256G       0x4000000000ULL
-
-typedef enum
-{
-    UVM_VIRT_MODE_NONE = 0,             // Baremetal or passthrough virtualization
-    UVM_VIRT_MODE_LEGACY = 1,           // Virtualization without SRIOV support
-    UVM_VIRT_MODE_SRIOV_HEAVY = 2,      // Virtualization with SRIOV Heavy configured
-    UVM_VIRT_MODE_SRIOV_STANDARD = 3,   // Virtualization with SRIOV Standard configured
-    UVM_VIRT_MODE_COUNT = 4,
-} UVM_VIRT_MODE;
-
-//------------------------------------------------------------------------------
-// UVM GPU mapping types
-//
-// These types indicate the kinds of accesses allowed from a given GPU at the
-// specified virtual address range. There are 3 basic kinds of accesses: read,
-// write and atomics. Each type indicates what kinds of accesses are allowed.
-// Accesses of any disallowed kind are fatal. The "Default" type specifies that
-// the UVM driver should decide on the types of accesses allowed.
-//------------------------------------------------------------------------------
-typedef enum
-{
-    UvmGpuMappingTypeDefault = 0,
-    UvmGpuMappingTypeReadWriteAtomic = 1,
-    UvmGpuMappingTypeReadWrite = 2,
-    UvmGpuMappingTypeReadOnly = 3,
-    UvmGpuMappingTypeCount = 4
-} UvmGpuMappingType;
-
-//------------------------------------------------------------------------------
-// UVM GPU caching types
-//
-// These types indicate the cacheability of the specified virtual address range
-// from a given GPU. The "Default" type specifies that the UVM driver should
-// set caching on or off as required to follow the UVM coherence model. The
-// "ForceUncached" and "ForceCached" types will always turn caching off or on
-// respectively. These two types override the cacheability specified by the UVM
-// coherence model.
-//------------------------------------------------------------------------------
-typedef enum
-{
-    UvmGpuCachingTypeDefault = 0,
-    UvmGpuCachingTypeForceUncached = 1,
-    UvmGpuCachingTypeForceCached = 2,
-    UvmGpuCachingTypeCount = 3
-} UvmGpuCachingType;
-
-//------------------------------------------------------------------------------
-// UVM GPU format types
-//
-// These types indicate the memory format of the specified virtual address
-// range for a given GPU. The "Default" type specifies that the UVM driver will
-// detect the format based on the allocation and is mutually inclusive with
-// UvmGpuFormatElementBitsDefault.
-//------------------------------------------------------------------------------
-typedef enum {
-   UvmGpuFormatTypeDefault = 0,
-   UvmGpuFormatTypeBlockLinear = 1,
-   UvmGpuFormatTypeCount = 2
-} UvmGpuFormatType;
-
-//------------------------------------------------------------------------------
-// UVM GPU Element bits types
-//
-// These types indicate the element size of the specified virtual address range
-// for a given GPU. The "Default" type specifies that the UVM driver will
-// detect the element size based on the allocation and is mutually inclusive
-// with UvmGpuFormatTypeDefault. The element size is specified in bits:
-// UvmGpuFormatElementBits8 uses the 8-bits format.
-//------------------------------------------------------------------------------
-typedef enum {
-   UvmGpuFormatElementBitsDefault = 0,
-   UvmGpuFormatElementBits8 = 1,
-   UvmGpuFormatElementBits16 = 2,
-   // Cuda does not support 24-bit width
-   UvmGpuFormatElementBits32 = 4,
-   UvmGpuFormatElementBits64 = 5,
-   UvmGpuFormatElementBits128 = 6,
-   UvmGpuFormatElementBitsCount = 7
-} UvmGpuFormatElementBits;
-
-//------------------------------------------------------------------------------
-// UVM GPU Compression types
-//
-// These types indicate the compression type of the specified virtual address
-// range for a given GPU. The "Default" type specifies that the UVM driver will
-// detect the compression attributes based on the allocation. Any type other
-// than the default will override the compression behavior of the physical
-// allocation. UvmGpuCompressionTypeEnabledNoPlc will disable PLC but enables
-// generic compression. UvmGpuCompressionTypeEnabledNoPlc type is only supported
-// on Turing plus GPUs. Since UvmGpuCompressionTypeEnabledNoPlc type enables
-// generic compression, it can only be used when the compression attribute of
-// the underlying physical allocation is enabled.
-//------------------------------------------------------------------------------
-typedef enum {
-    UvmGpuCompressionTypeDefault = 0,
-    UvmGpuCompressionTypeEnabledNoPlc = 1,
-    UvmGpuCompressionTypeCount = 2
-} UvmGpuCompressionType;
-
-//
-// Mirrored in PMA (PMA_STATS)
-//
-typedef struct UvmPmaStatistics_tag
-{
-    volatile NvU64 numPages2m;                // PMA-wide 2MB pages count across all regions
-    volatile NvU64 numFreePages64k;           // PMA-wide free 64KB page count across all regions
-    volatile NvU64 numFreePages2m;            // PMA-wide free 2MB pages count across all regions
-    volatile NvU64 numPages2mProtected;       // PMA-wide 2MB pages count in protected memory
-    volatile NvU64 numFreePages64kProtected;  // PMA-wide free 64KB page count in protected memory
-    volatile NvU64 numFreePages2mProtected;   // PMA-wide free 2MB pages count in protected memory
-} UvmPmaStatistics;
-
-typedef enum
-{
-    UVM_ACCESS_COUNTER_GRANULARITY_64K = 1,
-    UVM_ACCESS_COUNTER_GRANULARITY_2M  = 2,
-    UVM_ACCESS_COUNTER_GRANULARITY_16M = 3,
-    UVM_ACCESS_COUNTER_GRANULARITY_16G = 4,
-} UVM_ACCESS_COUNTER_GRANULARITY;
-
-#endif // _NV_UVM_USER_TYPES_H_
--- a/kernel-open/common/inc/nvgputypes.h
+++ b/kernel-open/common/inc/nvgputypes.h
@@ -150,7 +150,9 @@ typedef struct NvSyncPointFenceRec {
 |*                                                                           *|
 \***************************************************************************/

+#if !defined(XAPIGEN)   /* NvOffset is XAPIGEN builtin type, so skip typedef */
 typedef NvU64           NvOffset; /* GPU address                             */
+#endif

 #define NvOffset_HI32(n)  ((NvU32)(((NvU64)(n)) >> 32))
 #define NvOffset_LO32(n)  ((NvU32)((NvU64)(n)))
--- a/kernel-open/common/inc/nvi2c.h
+++ b/kernel-open/common/inc/nvi2c.h
@@ -1,37 +0,0 @@
-/*
- * SPDX-FileCopyrightText: Copyright (c) 2019 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-#ifndef _NV_I2C_H_
-#define _NV_I2C_H_
-
-#define NV_I2C_MSG_WR 0x0000
-#define NV_I2C_MSG_RD 0x0001
-
-typedef struct nv_i2c_msg_s
-{
-    NvU16 addr;
-    NvU16 flags;
-    NvU16 len;
-    NvU8* buf;
-} nv_i2c_msg_t;
-
-#endif
--- a/kernel-open/common/inc/nvimpshared.h
+++ b/kernel-open/common/inc/nvimpshared.h
@@ -1,96 +0,0 @@
-/*
- * SPDX-FileCopyrightText: Copyright (c) 2020-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-/******************************************************************************\
-*                                                                              *
-*  Description:                                                                *
-*    Accommodates sharing of IMP-related structures between kernel interface   *
-*    files and core RM.                                                        *
-*                                                                              *
-\******************************************************************************/
-
-#pragma once
-
-#include <nvtypes.h>
-#if defined(_MSC_VER)
-#pragma warning(disable:4324)
-#endif
-
-//
-// This file was generated with FINN, an NVIDIA coding tool.
-// Source file:      nvimpshared.finn
-//
-
-
-
-
-//
-// There are only a small number of discrete dramclk frequencies available on
-// the system.  This structure contains IMP-relevant information associated
-// with a specific dramclk frequency.
-//
-typedef struct DRAM_CLK_INSTANCE {
-    NvU32 dram_clk_freq_khz;
-
-    NvU32 mchub_clk_khz;
-
-    NvU32 mc_clk_khz;
-
-    NvU32 max_iso_bw_kbps;
-
-    //
-    // switch_latency_ns is the maximum time required to switch the dramclk
-    // frequency to the frequency specified in dram_clk_freq_khz.
-    //
-    NvU32 switch_latency_ns;
-} DRAM_CLK_INSTANCE;
-
-//
-// This table is used to collect information from other modules that is needed
-// for RM IMP calculations.  (Used on Tegra only.)
-//
-typedef struct TEGRA_IMP_IMPORT_DATA {
-    //
-    // max_iso_bw_kbps stores the maximum possible ISO bandwidth available to
-    // display, assuming display is the only active ISO client.  (Note that ISO
-    // bandwidth will typically be allocated to multiple clients, so display
-    // will generally not have access to the maximum possible bandwidth.)
-    //
-    NvU32             max_iso_bw_kbps;
-
-    // On Orin, each dram channel is 16 bits wide.
-    NvU32             num_dram_channels;
-
-    //
-    // dram_clk_instance stores entries for all possible dramclk frequencies,
-    // sorted by dramclk frequency in increasing order.
-    //
-    // "24" is expected to be larger than the actual number of required entries
-    // (which is provided by a BPMP API), but it can be increased if necessary.
-    //
-    // num_dram_clk_entries is filled in with the actual number of distinct
-    // dramclk entries.
-    //
-    NvU32             num_dram_clk_entries;
-    DRAM_CLK_INSTANCE dram_clk_instance[24];
-} TEGRA_IMP_IMPORT_DATA;
--- a/kernel-open/common/inc/nvkms-api-types.h
+++ b/kernel-open/common/inc/nvkms-api-types.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2014-2023 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2014-2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -29,7 +29,6 @@
 #include <nvlimits.h>

 #define NVKMS_MAX_SUBDEVICES                  NV_MAX_SUBDEVICES
-#define NVKMS_MAX_HEADS_PER_DISP              NV_MAX_HEADS

 #define NVKMS_LEFT                            0
 #define NVKMS_RIGHT                           1
@@ -45,13 +44,6 @@

 #define NVKMS_DEVICE_ID_TEGRA                 0x0000ffff

-#define NVKMS_MAX_SUPERFRAME_VIEWS            4
-
-#define NVKMS_LOG2_LUT_ARRAY_SIZE             10
-#define NVKMS_LUT_ARRAY_SIZE                  (1 << NVKMS_LOG2_LUT_ARRAY_SIZE)
-
-#define NVKMS_OLUT_FP_NORM_SCALE_DEFAULT      0xffffffff
-
 typedef NvU32 NvKmsDeviceHandle;
 typedef NvU32 NvKmsDispHandle;
 typedef NvU32 NvKmsConnectorHandle;
@@ -60,7 +52,6 @@ typedef NvU32 NvKmsFrameLockHandle;
 typedef NvU32 NvKmsDeferredRequestFifoHandle;
 typedef NvU32 NvKmsSwapGroupHandle;
 typedef NvU32 NvKmsVblankSyncObjectHandle;
-typedef NvU32 NvKmsVblankSemControlHandle;

 struct NvKmsSize {
    NvU16 width;
@@ -187,14 +178,6 @@ enum NvKmsEventType {
    NVKMS_EVENT_TYPE_FLIP_OCCURRED,
 };

-enum NvKmsFlipResult {
-    NV_KMS_FLIP_RESULT_SUCCESS = 0,    /* Success */
-    NV_KMS_FLIP_RESULT_INVALID_PARAMS, /* Parameter validation failed */
-    NV_KMS_FLIP_RESULT_IN_PROGRESS,    /* Flip would fail because an outstanding
-                                          flip containing changes that cannot be
-                                          queued is in progress */
-};
-
 typedef enum {
    NV_EVO_SCALER_1TAP      = 0,
    NV_EVO_SCALER_2TAPS     = 1,
@@ -237,90 +220,6 @@ struct NvKmsUsageBounds {
    } layer[NVKMS_MAX_LAYERS_PER_HEAD];
 };

-/*!
- * Per-component arrays of NvU16s describing the LUT; used for both the input
- * LUT and output LUT.
- */
-struct NvKmsLutRamps {
-    NvU16 red[NVKMS_LUT_ARRAY_SIZE];   /*! in */
-    NvU16 green[NVKMS_LUT_ARRAY_SIZE]; /*! in */
-    NvU16 blue[NVKMS_LUT_ARRAY_SIZE];  /*! in */
-};
-
-/* Datatypes for LUT capabilities */
-enum NvKmsLUTFormat {
-    /*
-     * Normalized fixed-point format mapping [0, 1] to [0x0, 0xFFFF].
-     */
-    NVKMS_LUT_FORMAT_UNORM16,
-
-    /*
-     * Half-precision floating point.
-     */
-    NVKMS_LUT_FORMAT_FP16,
-
-    /*
-     * 14-bit fixed-point format required to work around hardware bug 813188.
-     *
-     * To convert from UNORM16 to UNORM14_WAR_813188:
-     * unorm14_war_813188 = ((unorm16 >> 2) & ~7) + 0x6000
-     */
-    NVKMS_LUT_FORMAT_UNORM14_WAR_813188
-};
-
-enum NvKmsLUTVssSupport {
-    NVKMS_LUT_VSS_NOT_SUPPORTED,
-    NVKMS_LUT_VSS_SUPPORTED,
-    NVKMS_LUT_VSS_REQUIRED,
-};
-
-enum NvKmsLUTVssType {
-    NVKMS_LUT_VSS_TYPE_NONE,
-    NVKMS_LUT_VSS_TYPE_LINEAR,
-    NVKMS_LUT_VSS_TYPE_LOGARITHMIC,
-};
-
-struct NvKmsLUTCaps {
-    /*! Whether this layer or head on this device supports this LUT stage. */
-    NvBool supported;
-
-    /*! Whether this LUT supports VSS. */
-    enum NvKmsLUTVssSupport vssSupport;
-
-    /*!
-     * The type of VSS segmenting this LUT uses.
-     */
-    enum NvKmsLUTVssType vssType;
-
-    /*!
-     * Expected number of VSS segments.
-     */
-    NvU32 vssSegments;
-
-    /*!
-     * Expected number of LUT entries.
-     */
-    NvU32 lutEntries;
-
-    /*!
-     * Format for each of the LUT entries.
-     */
-    enum NvKmsLUTFormat entryFormat;
-};
-
-/* each LUT entry uses this many bytes */
-#define NVKMS_LUT_CAPS_LUT_ENTRY_SIZE (4 * sizeof(NvU16))
-
-/* if the LUT surface uses VSS, size of the VSS header */
-#define NVKMS_LUT_VSS_HEADER_SIZE (4 * NVKMS_LUT_CAPS_LUT_ENTRY_SIZE)
-
-struct NvKmsLUTSurfaceParams {
-    NvKmsSurfaceHandle surfaceHandle;
-    NvU64 offset NV_ALIGN_BYTES(8);
-    NvU32 vssSegments;
-    NvU32 lutEntries;
-};
-
 /*
 * A 3x4 row-major colorspace conversion matrix.
 *
@@ -516,9 +415,9 @@ struct NvKmsLayerCapabilities {
    NvBool supportsWindowMode              :1;

    /*!
-     * Whether layer supports ICtCp pipe.
+     * Whether layer supports HDR pipe.
     */
-    NvBool supportsICtCp                   :1;
+    NvBool supportsHDR                     :1;


    /*!
@@ -539,10 +438,6 @@ struct NvKmsLayerCapabilities {
     * still expected to honor the NvKmsUsageBounds for each head.
     */
    NvU64 supportedSurfaceMemoryFormats NV_ALIGN_BYTES(8);
-
-    /* Capabilities for each LUT stage in the EVO3 precomp pipeline. */
-    struct NvKmsLUTCaps ilut;
-    struct NvKmsLUTCaps tmo;
 };

 /*!
@@ -635,156 +530,4 @@ typedef struct {
    NvBool noncoherent;
 } NvKmsDispIOCoherencyModes;

-enum NvKmsInputColorRange {
-    /*
-     * If DEFAULT is provided, driver will assume full range for RGB formats
-     * and limited range for YUV formats.
-     */
-    NVKMS_INPUT_COLOR_RANGE_DEFAULT = 0,
-
-    NVKMS_INPUT_COLOR_RANGE_LIMITED = 1,
-
-    NVKMS_INPUT_COLOR_RANGE_FULL = 2,
-};
-
-enum NvKmsInputColorSpace {
-    /* Unknown colorspace */
-    NVKMS_INPUT_COLOR_SPACE_NONE = 0,
-
-    NVKMS_INPUT_COLOR_SPACE_BT601 = 1,
-    NVKMS_INPUT_COLOR_SPACE_BT709 = 2,
-    NVKMS_INPUT_COLOR_SPACE_BT2020 = 3,
-    NVKMS_INPUT_COLOR_SPACE_BT2100 = NVKMS_INPUT_COLOR_SPACE_BT2020,
-
-    NVKMS_INPUT_COLOR_SPACE_SCRGB = 4
-};
-
-enum NvKmsInputTf {
-    NVKMS_INPUT_TF_LINEAR = 0,
-    NVKMS_INPUT_TF_PQ = 1
-};
-
-enum NvKmsOutputColorimetry {
-    NVKMS_OUTPUT_COLORIMETRY_DEFAULT = 0,
-
-    NVKMS_OUTPUT_COLORIMETRY_BT601 = 1,
-    NVKMS_OUTPUT_COLORIMETRY_BT709 = 2,
-    NVKMS_OUTPUT_COLORIMETRY_BT2100 = 3,
-};
-
-enum NvKmsOutputTf {
-    /*
-     * NVKMS itself won't apply any OETF (clients are still
-     * free to provide a custom OLUT)
-     */
-    NVKMS_OUTPUT_TF_NONE = 0,
-    NVKMS_OUTPUT_TF_TRADITIONAL_GAMMA_SDR = 1,
-    NVKMS_OUTPUT_TF_PQ = 2,
-};
-
-/*!
- * EOTF Data Byte 1 as per CTA-861-G spec.
- * This is expected to match exactly with the spec.
- */
-enum NvKmsInfoFrameEOTF {
-    NVKMS_INFOFRAME_EOTF_SDR_GAMMA = 0,
-    NVKMS_INFOFRAME_EOTF_HDR_GAMMA = 1,
-    NVKMS_INFOFRAME_EOTF_ST2084 = 2,
-    NVKMS_INFOFRAME_EOTF_HLG = 3,
-};
-
-/*!
- * HDR Static Metadata Type1 Descriptor as per CEA-861.3 spec.
- * This is expected to match exactly with the spec.
- */
-struct NvKmsHDRStaticMetadata {
-    /*!
-     * Color primaries of the data.
-     * These are coded as unsigned 16-bit values in units of 0.00002,
-     * where 0x0000 represents zero and 0xC350 represents 1.0000.
-     */
-    struct {
-        NvU16 x, y;
-    } displayPrimaries[3];
-
-    /*!
-     * White point of colorspace data.
-     * These are coded as unsigned  16-bit values in units of 0.00002,
-     * where 0x0000 represents zero and 0xC350 represents 1.0000.
-     */
-    struct {
-        NvU16 x, y;
-    } whitePoint;
-
-    /**
-     * Maximum mastering display luminance.
-     * This value is coded as an unsigned 16-bit value in units of 1 cd/m2,
-     * where 0x0001 represents 1 cd/m2 and 0xFFFF represents 65535 cd/m2.
-     */
-    NvU16 maxDisplayMasteringLuminance;
-
-    /*!
-     * Minimum mastering display luminance.
-     * This value is coded as an unsigned 16-bit value in units of
-     * 0.0001 cd/m2, where 0x0001 represents 0.0001 cd/m2 and 0xFFFF
-     * represents 6.5535 cd/m2.
-     */
-    NvU16 minDisplayMasteringLuminance;
-
-    /*!
-     * Maximum content light level.
-     * This value is coded as an unsigned 16-bit value in units of 1 cd/m2,
-     * where 0x0001 represents 1 cd/m2 and 0xFFFF represents 65535 cd/m2.
-     */
-    NvU16 maxCLL;
-
-    /*!
-     * Maximum frame-average light level.
-     * This value is coded as an unsigned 16-bit value in units of 1 cd/m2,
-     * where 0x0001 represents 1 cd/m2 and 0xFFFF represents 65535 cd/m2.
-     */
-    NvU16 maxFALL;
-};
-
-/*!
- * A superframe is made of two or more video streams that are combined in
- * a specific way. A DP serializer (an external device connected to a Tegra
- * ARM SOC over DP or HDMI) can receive a video stream comprising multiple
- * videos combined into a single frame and then split it into multiple
- * video streams. The following structure describes the number of views
- * and dimensions of each view inside a superframe.
- */
-struct NvKmsSuperframeInfo {
-    NvU8 numViews;
-    struct {
-        /* x offset inside superframe at which this view starts */
-        NvU16 x;
-
-        /* y offset inside superframe at which this view starts */
-        NvU16 y;
-
-        /* Horizontal active width in pixels for this view */
-        NvU16 width;
-
-        /* Vertical active height in lines for this view */
-        NvU16 height;
-    } view[NVKMS_MAX_SUPERFRAME_VIEWS];
-};
-
-/* Fields within NvKmsVblankSemControlDataOneHead::flags */
-#define NVKMS_VBLANK_SEM_CONTROL_SWAP_INTERVAL          15:0
-
-struct NvKmsVblankSemControlDataOneHead {
-    NvU32 requestCounterAccel;
-    NvU32 requestCounter;
-    NvU32 flags;
-
-    NvU32 semaphore;
-    NvU64 vblankCount NV_ALIGN_BYTES(8);
-};
-
-struct NvKmsVblankSemControlData {
-    struct NvKmsVblankSemControlDataOneHead head[NV_MAX_HEADS];
-};
-
 #endif /* NVKMS_API_TYPES_H */
--- a/kernel-open/common/inc/nvkms-format.h
+++ b/kernel-open/common/inc/nvkms-format.h
@@ -86,9 +86,8 @@ enum NvKmsSurfaceMemoryFormat {
    NvKmsSurfaceMemoryFormatY12___V12U12_N420 = 32,
    NvKmsSurfaceMemoryFormatY8___U8___V8_N444 = 33,
    NvKmsSurfaceMemoryFormatY8___U8___V8_N420 = 34,
-    NvKmsSurfaceMemoryFormatRF16GF16BF16XF16  = 35,
    NvKmsSurfaceMemoryFormatMin = NvKmsSurfaceMemoryFormatI8,
-    NvKmsSurfaceMemoryFormatMax = NvKmsSurfaceMemoryFormatRF16GF16BF16XF16,
+    NvKmsSurfaceMemoryFormatMax = NvKmsSurfaceMemoryFormatY8___U8___V8_N420,
 };

 typedef struct NvKmsSurfaceMemoryFormatInfo {
--- a/kernel-open/common/inc/nvkms-kapi.h
+++ b/kernel-open/common/inc/nvkms-kapi.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2015-2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -24,10 +24,8 @@
 #if !defined(__NVKMS_KAPI_H__)

 #include "nvtypes.h"
-#include "nv_mig_types.h"

 #include "nv-gpu-info.h"
-#include "nv_dpy_id.h"
 #include "nvkms-api-types.h"
 #include "nvkms-format.h"

@@ -51,8 +49,6 @@ struct NvKmsKapiDevice;
 struct NvKmsKapiMemory;
 struct NvKmsKapiSurface;
 struct NvKmsKapiChannelEvent;
-struct NvKmsKapiSemaphoreSurface;
-struct NvKmsKapiSemaphoreSurfaceCallback;

 typedef NvU32 NvKmsKapiConnector;
 typedef NvU32 NvKmsKapiDisplay;
@@ -71,14 +67,6 @@ typedef NvU32 NvKmsKapiDisplay;
 */
 typedef void NvKmsChannelEventProc(void *dataPtr, NvU32 dataU32);

-/*
- * Note: Same as above, this function must not call back into NVKMS-KAPI, nor
- * directly into RM. Doing so could cause deadlocks given the notification
- * function will most likely be called from within RM's interrupt handler
- * callchain.
- */
-typedef void NvKmsSemaphoreSurfaceCallbackProc(void *pData);
-
 /** @} */

 /**
@@ -126,14 +114,6 @@ struct NvKmsKapiDisplayMode {
 #define NVKMS_KAPI_LAYER_INVALID_IDX           0xff
 #define NVKMS_KAPI_LAYER_PRIMARY_IDX              0

-struct NvKmsKapiLutCaps {
-    struct {
-        struct NvKmsLUTCaps ilut;
-        struct NvKmsLUTCaps tmo;
-    } layer[NVKMS_KAPI_LAYER_MAX];
-    struct NvKmsLUTCaps olut;
-};
-
 struct NvKmsKapiDeviceResourcesInfo {

    NvU32 numHeads;
@@ -146,11 +126,6 @@ struct NvKmsKapiDeviceResourcesInfo {
        NvU32 validCursorCompositionModes;
        NvU64 supportedCursorSurfaceMemoryFormats;

-        struct {
-            NvU64 maxSubmittedOffset;
-            NvU64 stride;
-        } semsurf;
-
        struct {
            NvU16 validRRTransforms;
            NvU32 validCompositionModes;
@@ -168,25 +143,12 @@ struct NvKmsKapiDeviceResourcesInfo {

        NvU32 hasVideoMemory;

-        NvU32 numDisplaySemaphores;
-
        NvU8  genericPageKind;

        NvBool  supportsSyncpts;
-
-        NvBool requiresVrrSemaphores;
-
-        NvBool  supportsInputColorRange;
-        NvBool  supportsInputColorSpace;
    } caps;

    NvU64 supportedSurfaceMemoryFormats[NVKMS_KAPI_LAYER_MAX];
-    NvBool supportsICtCp[NVKMS_KAPI_LAYER_MAX];
-
-    struct NvKmsKapiLutCaps lutCaps;
-
-    NvU64 vtFbBaseAddress;
-    NvU64 vtFbSize;
 };

 #define NVKMS_KAPI_LAYER_MASK(layerType) (1 << (layerType))
@@ -202,6 +164,8 @@ struct NvKmsKapiConnectorInfo {

    NvU32 physicalIndex;

+    NvU32 headMask;
+
    NvKmsConnectorSignalFormat signalFormat;
    NvKmsConnectorType         type;

@@ -212,7 +176,6 @@ struct NvKmsKapiConnectorInfo {
    NvU32        numIncompatibleConnectors;
    NvKmsKapiConnector incompatibleConnectorHandles[NVKMS_KAPI_MAX_CONNECTORS];

-    NVDpyIdList dynamicDpyIdList;
 };

 struct NvKmsKapiStaticDisplayInfo {
@@ -230,31 +193,20 @@ struct NvKmsKapiStaticDisplayInfo {
    NvU32  numPossibleClones;
    NvKmsKapiDisplay possibleCloneHandles[NVKMS_KAPI_MAX_CLONE_DISPLAYS];

-    NvU32 headMask;
-
-    NvBool isDpMST;
 };

-struct NvKmsKapiSyncParams {
-    union {
-        struct {
-            /*!
-             * Possible syncpt use case in kapi.
-             * For pre-syncpt, use only id and value
-             * and for post-syncpt, use only fd.
-             */
-            NvU32   preSyncptId;
-            NvU32   preSyncptValue;
-        } syncpt;
+struct NvKmsKapiSyncpt {

-        struct {
-            NvU32 index;
-        } semaphore;
-    } u;
+    /*!
+     * Possible syncpt use case in kapi.
+     * For pre-syncpt, use only id and value
+     * and for post-syncpt, use only fd.
+     */
+    NvBool  preSyncptSpecified;
+    NvU32   preSyncptId;
+    NvU32   preSyncptValue;

-    NvBool preSyncptSpecified;
-    NvBool postSyncptRequested;
-    NvBool semaphoreSpecified;
+    NvBool  postSyncptRequested;
 };

 struct NvKmsKapiLayerConfig {
@@ -264,15 +216,7 @@ struct NvKmsKapiLayerConfig {
        NvU8 surfaceAlpha;
    } compParams;
    struct NvKmsRRParams rrParams;
-    struct NvKmsKapiSyncParams syncParams;
-
-    struct {
-        struct NvKmsHDRStaticMetadata val;
-        NvBool enabled;
-    } hdrMetadata;
-
-    enum NvKmsInputTf inputTf;
-    enum NvKmsOutputTf outputTf;
+    struct NvKmsKapiSyncpt syncptParams;

    NvU8 minPresentInterval;
    NvBool tearing;
@@ -282,60 +226,16 @@ struct NvKmsKapiLayerConfig {

    NvS16 dstX, dstY;
    NvU16 dstWidth, dstHeight;
-
-    enum NvKmsInputColorSpace inputColorSpace;
-    enum NvKmsInputColorRange inputColorRange;
-
-    struct {
-        NvBool enabled;
-        struct NvKmsKapiSurface *lutSurface;
-        NvU64 offset;
-        NvU32 vssSegments;
-        NvU32 lutEntries;
-    } ilut;
-
-    struct {
-        NvBool enabled;
-        struct NvKmsKapiSurface *lutSurface;
-        NvU64 offset;
-        NvU32 vssSegments;
-        NvU32 lutEntries;
-    } tmo;
-
-    struct NvKmsCscMatrix csc;
-    NvBool cscUseMain;
-
-    struct {
-        struct NvKmsCscMatrix lmsCtm;
-        struct NvKmsCscMatrix lmsToItpCtm;
-        struct NvKmsCscMatrix itpToLmsCtm;
-        struct NvKmsCscMatrix blendCtm;
-        struct {
-            NvBool lmsCtm      : 1;
-            NvBool lmsToItpCtm : 1;
-            NvBool itpToLmsCtm : 1;
-            NvBool blendCtm    : 1;
-        } enabled;
-    } matrixOverrides;
 };

 struct NvKmsKapiLayerRequestedConfig {
    struct NvKmsKapiLayerConfig config;
    struct {
-        NvBool surfaceChanged          : 1;
-        NvBool srcXYChanged            : 1;
-        NvBool srcWHChanged            : 1;
-        NvBool dstXYChanged            : 1;
-        NvBool dstWHChanged            : 1;
-        NvBool cscChanged              : 1;
-        NvBool inputTfChanged          : 1;
-        NvBool outputTfChanged         : 1;
-        NvBool inputColorSpaceChanged  : 1;
-        NvBool inputColorRangeChanged  : 1;
-        NvBool hdrMetadataChanged      : 1;
-        NvBool matrixOverridesChanged  : 1;
-        NvBool ilutChanged             : 1;
-        NvBool tmoChanged              : 1;
+        NvBool surfaceChanged : 1;
+        NvBool srcXYChanged   : 1;
+        NvBool srcWHChanged   : 1;
+        NvBool dstXYChanged   : 1;
+        NvBool dstWHChanged   : 1;
    } flags;
 };

@@ -377,54 +277,14 @@ struct NvKmsKapiHeadModeSetConfig {
    NvKmsKapiDisplay displays[NVKMS_KAPI_MAX_CLONE_DISPLAYS];

    struct NvKmsKapiDisplayMode mode;
-
-    NvBool vrrEnabled;
-
-    struct {
-        NvBool enabled;
-        enum NvKmsInfoFrameEOTF eotf;
-        struct NvKmsHDRStaticMetadata staticMetadata;
-    } hdrInfoFrame;
-
-    enum NvKmsOutputColorimetry colorimetry;
-
-    struct {
-        struct {
-            NvU32 depth;
-            NvU32 start;
-            NvU32 end;
-            struct NvKmsLutRamps *pRamps;
-        } input;
-
-        struct {
-            NvBool enabled;
-            struct NvKmsLutRamps *pRamps;
-        } output;
-    } lut;
-
-    struct {
-        NvBool enabled;
-        struct NvKmsKapiSurface *lutSurface;
-        NvU64 offset;
-        NvU32 vssSegments;
-        NvU32 lutEntries;
-    } olut;
-
-    NvU32 olutFpNormScale;
 };

 struct NvKmsKapiHeadRequestedConfig {
    struct NvKmsKapiHeadModeSetConfig modeSetConfig;
    struct {
-        NvBool activeChanged          : 1;
-        NvBool displaysChanged        : 1;
-        NvBool modeChanged            : 1;
-        NvBool hdrInfoFrameChanged    : 1;
-        NvBool colorimetryChanged     : 1;
-        NvBool legacyIlutChanged      : 1;
-        NvBool legacyOlutChanged      : 1;
-        NvBool olutChanged            : 1;
-        NvBool olutFpNormScaleChanged : 1;
+        NvBool activeChanged   : 1;
+        NvBool displaysChanged : 1;
+        NvBool modeChanged     : 1;
    } flags;

    struct NvKmsKapiCursorRequestedConfig cursorRequestedConfig;
@@ -449,9 +309,6 @@ struct NvKmsKapiHeadReplyConfig {
 };

 struct NvKmsKapiModeSetReplyConfig {
-    enum NvKmsFlipResult flipResult;
-    NvBool vrrFlip;
-    NvS32 vrrSemaphoreIndex;
    struct NvKmsKapiHeadReplyConfig
        headReplyConfig[NVKMS_KAPI_MAX_HEADS];
 };
@@ -497,8 +354,6 @@ struct NvKmsKapiEvent {
 struct NvKmsKapiAllocateDeviceParams {
    /* [IN] GPU ID obtained from enumerateGpus() */
    NvU32 gpuId;
-    /* [IN] MIG device if requested */
-    MIGDeviceId migDevice;

    /* [IN] Private data of device allocator */
    void *privateData;
@@ -513,9 +368,6 @@ struct NvKmsKapiDynamicDisplayParams {
    /* [OUT] Connection status */
    NvU32 connected;

-    /* [OUT] VRR status */
-    NvBool vrrSupported;
-
    /* [IN/OUT] EDID of connected monitor/ Input to override EDID */
    struct {
        NvU16  bufferSize;
@@ -564,51 +416,6 @@ struct NvKmsKapiCreateSurfaceParams {
    NvU8 log2GobsPerBlockY;
 };

-enum NvKmsKapiAllocationType {
-    NVKMS_KAPI_ALLOCATION_TYPE_SCANOUT = 0,
-    NVKMS_KAPI_ALLOCATION_TYPE_NOTIFIER = 1,
-    NVKMS_KAPI_ALLOCATION_TYPE_OFFSCREEN = 2,
-};
-
-struct NvKmsKapiAllocateMemoryParams {
-    /* [IN] BlockLinear or Pitch */
-    enum NvKmsSurfaceMemoryLayout layout;
-
-    /* [IN] Allocation type */
-    enum NvKmsKapiAllocationType type;
-
-    /* [IN] Size, in bytes, of the memory to allocate */
-    NvU64 size;
-
-    /* [IN] Whether memory can be updated directly on the screen */
-    NvBool noDisplayCaching;
-
-    /* [IN] Whether to allocate memory from video memory or system memory */
-    NvBool useVideoMemory;
-
-    /* [IN/OUT] For input, non-zero if compression backing store should be
-     * allocated for the memory, for output, non-zero if compression backing
-     * store was allocated for the memory */
-    NvU8 *compressible;
-};
-
-typedef enum NvKmsKapiRegisterWaiterResultRec {
-    NVKMS_KAPI_REG_WAITER_FAILED,
-    NVKMS_KAPI_REG_WAITER_SUCCESS,
-    NVKMS_KAPI_REG_WAITER_ALREADY_SIGNALLED,
-} NvKmsKapiRegisterWaiterResult;
-
-struct NvKmsKapiGpuInfo {
-    nv_gpu_info_t gpuInfo;
-    MIGDeviceId   migDevice;
-};
-
-struct NvKmsKapiCallbacks {
-    void (*suspendResume)(NvBool suspend);
-    void (*remove)(NvU32 gpuId);
-    void (*probe)(const struct NvKmsKapiGpuInfo *gpu_info);
-};
-
 struct NvKmsKapiFunctionsTable {

    /*!
@@ -625,19 +432,14 @@ struct NvKmsKapiFunctionsTable {
    } systemInfo;

    /*!
-     * Enumerate the available GPUs that can be used with NVKMS.
+     * Enumerate the available physical GPUs that can be used with NVKMS.
     *
-     * The gpuCallback will be called with a NvKmsKapiGpuInfo for each
-     * physical and MIG GPU currently available in the system.
-     *
-     * \param [in] gpuCallback          Client function to handle each GPU.
+     * \param [out]  gpuInfo  The information of the enumerated GPUs.
+     *                        It is an array of NVIDIA_MAX_GPUS elements.
     *
     * \return  Count of enumerated gpus.
     */
-    NvU32 (*enumerateGpus)
-    (
-        void (*gpuCallback)(const struct NvKmsKapiGpuInfo *info)
-    );
+    NvU32 (*enumerateGpus)(nv_gpu_info_t *gpuInfo);

    /*!
     * Allocate an NVK device using which you can query/allocate resources on
@@ -676,75 +478,6 @@ struct NvKmsKapiFunctionsTable {
     */
    void (*releaseOwnership)(struct NvKmsKapiDevice *device);

-    /*!
-     * Grant modeset permissions for a display to fd. Only one (dispIndex, head,
-     * display) is currently supported.
-     *
-     * \param [in]  fd         fd from opening /dev/nvidia-modeset.
-     *
-     * \param [in]  device     A device returned by allocateDevice().
-     *
-     * \param [in]  head       head of display.
-     *
-     * \param [in]  display    The display to grant.
-     *
-     * \return NV_TRUE on success, NV_FALSE on failure.
-     */
-    NvBool (*grantPermissions)
-    (
-        NvS32 fd,
-        struct NvKmsKapiDevice *device,
-        NvU32 head,
-        NvKmsKapiDisplay display
-    );
-
-    /*!
-     * Revoke modeset permissions previously granted. Only one (dispIndex,
-     * head, display) is currently supported.
-     *
-     * \param [in]  device     A device returned by allocateDevice().
-     *
-     * \param [in]  head       head of display.
-     *
-     * \param [in]  display    The display to revoke.
-     *
-     * \return NV_TRUE on success, NV_FALSE on failure.
-     */
-    NvBool (*revokePermissions)
-    (
-        struct NvKmsKapiDevice *device,
-        NvU32 head,
-        NvKmsKapiDisplay display
-    );
-
-    /*!
-     * Grant modeset sub-owner permissions to fd. This is used by clients to
-     * convert drm 'master' permissions into nvkms sub-owner permission.
-     *
-     * \param [in]  fd         fd from opening /dev/nvidia-modeset.
-     *
-     * \param [in]  device     A device returned by allocateDevice().
-     *
-     * \return NV_TRUE on success, NV_FALSE on failure.
-     */
-    NvBool (*grantSubOwnership)
-    (
-        NvS32 fd,
-        struct NvKmsKapiDevice *device
-    );
-
-    /*!
-     * Revoke sub-owner permissions previously granted.
-     *
-     * \param [in]  device     A device returned by allocateDevice().
-     *
-     * \return NV_TRUE on success, NV_FALSE on failure.
-     */
-    NvBool (*revokeSubOwnership)
-    (
-        struct NvKmsKapiDevice *device
-    );
-
    /*!
     * Registers for notification, via
     * NvKmsKapiAllocateDeviceParams::eventCallback, of the events specified
@@ -867,22 +600,60 @@ struct NvKmsKapiFunctionsTable {
    );

    /*!
-     * Allocate some unformatted video or system memory of the specified size.
+     * Allocate some unformatted video memory of the specified size.
     *
-     * This function allocates video or system memory on the specified GPU. It
-     * should be suitable for mapping on the CPU as a pitch linear or
-     * block-linear surface.
+     * This function allocates video memory on the specified GPU.
+     * It should be suitable for mapping on the CPU as a pitch
+     * linear or block-linear surface.
     *
-     * \param [in]     device  A device allocated using allocateDevice().
+     * \param [in] device  A device allocated using allocateDevice().
     *
-     * \param [in/out] params  Parameters required for memory allocation.
+     * \param [in] layout  BlockLinear or Pitch.
+     *
+     * \param [in] size    Size, in bytes, of the memory to allocate.
+     *
+     * \param [in/out] compressible For input, non-zero if compression
+     *                              backing store should be allocated for
+     *                              the memory, for output, non-zero if
+     *                              compression backing store was
+     *                              allocated for the memory.
     *
     * \return An valid memory handle on success, NULL on failure.
     */
-    struct NvKmsKapiMemory* (*allocateMemory)
+    struct NvKmsKapiMemory* (*allocateVideoMemory)
    (
        struct NvKmsKapiDevice *device,
-        struct NvKmsKapiAllocateMemoryParams *params
+        enum NvKmsSurfaceMemoryLayout layout,
+        NvU64 size,
+        NvU8 *compressible
+    );
+
+    /*!
+     * Allocate some unformatted system memory of the specified size.
+     *
+     * This function allocates system memory . It should be suitable
+     * for mapping on the CPU as a pitch linear or block-linear surface.
+     *
+     * \param [in] device  A device allocated using allocateDevice().
+     *
+     * \param [in] layout  BlockLinear or Pitch.
+     *
+     * \param [in] size    Size, in bytes, of the memory to allocate.
+     *
+     * \param [in/out] compressible For input, non-zero if compression
+     *                              backing store should be allocated for
+     *                              the memory, for output, non-zero if
+     *                              compression backing store was
+     *                              allocated for the memory.
+     *
+     * \return An valid memory handle on success, NULL on failure.
+     */
+    struct NvKmsKapiMemory* (*allocateSystemMemory)
+    (
+        struct NvKmsKapiDevice *device,
+        enum NvKmsSurfaceMemoryLayout layout,
+        NvU64 size,
+        NvU8 *compressible
    );

    /*!
@@ -1021,17 +792,6 @@ struct NvKmsKapiFunctionsTable {
        const void *pLinearAddress
    );

-    /*!
-     * Check if memory object allocated is video memory.
-     *
-     * \param [in]  memory           Memory allocated using allocateMemory()
-     *
-     * \return NV_TRUE if memory is vidmem, NV_FALSE otherwise.
-     */
-    NvBool (*isVidmem)(
-        const struct NvKmsKapiMemory *memory
-    );
-
    /*!
     * Create a formatted surface from an NvKmsKapiMemory object.
     *
@@ -1282,319 +1042,6 @@ struct NvKmsKapiFunctionsTable {
                                       NvP64 dmaBuf,
                                       NvU32 limit);

-    /*!
-     * Import a semaphore surface allocated elsewhere to NVKMS and return a
-     * handle to the new object.
-     *
-     * \param [in] device            A device allocated using allocateDevice().
-     *
-     * \param [in] nvKmsParamsUser   Userspace pointer to driver-specific
-     *                               parameters describing the semaphore
-     *                               surface being imported.
-     *
-     * \param [in] nvKmsParamsSize   Size of the driver-specific parameter
-     *                               struct.
-     *
-     * \param [out] pSemaphoreMap    Returns a CPU mapping of the semaphore
-     *                               surface's semaphore memory to the client.
-     *
-     * \param [out] pMaxSubmittedMap Returns a CPU mapping of the semaphore
-     *                               surface's semaphore memory to the client.
-     *
-     * \return struct NvKmsKapiSemaphoreSurface* on success, NULL on failure.
-     */
-    struct NvKmsKapiSemaphoreSurface* (*importSemaphoreSurface)
-    (
-         struct NvKmsKapiDevice *device,
-         NvU64 nvKmsParamsUser,
-         NvU64 nvKmsParamsSize,
-         void **pSemaphoreMap,
-         void **pMaxSubmittedMap
-    );
-
-    /*!
-     * Free an imported semaphore surface.
-     *
-     * \param [in]  device              The device passed to
-     *                                  importSemaphoreSurface() when creating
-     *                                  semaphoreSurface.
-     *
-     * \param [in]  semaphoreSurface    A semaphore surface returned by
-     *                                  importSemaphoreSurface().
-     */
-    void (*freeSemaphoreSurface)
-    (
-        struct NvKmsKapiDevice *device,
-        struct NvKmsKapiSemaphoreSurface *semaphoreSurface
-    );
-
-    /*!
-     * Register a callback to be called when a semaphore reaches a value.
-     *
-     * The callback will be called when the semaphore at index in
-     * semaphoreSurface reaches the value wait_value.  The callback will
-     * be called at most once and is automatically unregistered when called.
-     * It may also be unregistered (i.e., cancelled) explicitly using the
-     * unregisterSemaphoreSurfaceCallback() function. To avoid leaking the
-     * memory used to track the registered callback, callers must ensure one
-     * of these methods of unregistration is used for every successful
-     * callback registration that returns a non-NULL pCallbackHandle.
-     *
-     * \param [in]  device              The device passed to
-     *                                  importSemaphoreSurface() when creating
-     *                                  semaphoreSurface.
-     *
-     * \param [in]  semaphoreSurface    A semaphore surface returned by
-     *                                  importSemaphoreSurface().
-     *
-     * \param [in]  pCallback           A pointer to the function to call when
-     *                                  the specified value is reached. NULL
-     *                                  means no callback.
-     *
-     * \param [in]  pData               Arbitrary data to be passed back to the
-     *                                  callback as its sole parameter.
-     *
-     * \param [in]  index               The index of the semaphore within
-     *                                  semaphoreSurface.
-     *
-     * \param [in]  wait_value          The value the semaphore must reach or
-     *                                  exceed before the callback is called.
-     *
-     * \param [in]  new_value           The value the semaphore will be set to
-     *                                  when it reaches or exceeds <wait_value>.
-     *                                  0 means do not update the value.
-     *
-     * \param [out] pCallbackHandle     On success, the value pointed to will
-     *                                  contain an opaque handle to the
-     *                                  registered callback that may be used to
-     *                                  cancel it if needed. Unused if pCallback
-     *                                  is NULL.
-     *
-     * \return NVKMS_KAPI_REG_WAITER_SUCCESS if the waiter was registered or if
-     *         no callback was requested and the semaphore at <index> has
-     *         already reached or exceeded <wait_value>
-     *
-     *         NVKMS_KAPI_REG_WAITER_ALREADY_SIGNALLED if a callback was
-     *         requested and the semaphore at <index> has already reached or
-     *         exceeded <wait_value>
-     *
-     *         NVKMS_KAPI_REG_WAITER_FAILED if waiter registration failed.
-     */
-    NvKmsKapiRegisterWaiterResult
-    (*registerSemaphoreSurfaceCallback)
-    (
-        struct NvKmsKapiDevice *device,
-        struct NvKmsKapiSemaphoreSurface *semaphoreSurface,
-        NvKmsSemaphoreSurfaceCallbackProc *pCallback,
-        void *pData,
-        NvU64 index,
-        NvU64 wait_value,
-        NvU64 new_value,
-        struct NvKmsKapiSemaphoreSurfaceCallback **pCallbackHandle
-    );
-
-    /*!
-     * Unregister a callback registered via registerSemaphoreSurfaceCallback()
-     *
-     * If the callback has not yet been called, this function will cancel the
-     * callback and free its associated resources.
-     *
-     * Note this function treats the callback handle as a pointer. While this
-     * function does not dereference that pointer itself, the underlying call
-     * to RM does within a properly guarded critical section that first ensures
-     * it is not in the process of being used within a callback. This means
-     * the callstack must take into consideration that pointers are not in
-     * general unique handles if they may have been freed, since a subsequent
-     * malloc could return the same pointer value at that point. This callchain
-     * avoids that by leveraging the behavior of the underlying RM APIs:
-     *
-     * 1) A callback handle is referenced relative to its corresponding
-     *    (semaphore surface, index, wait_value) tuple here and within RM. It
-     *    is not a valid handle outside of that scope.
-     *
-     * 2) A callback can not be registered against an already-reached value
-     *    for a given semaphore surface index.
-     *
-     * 3) A given callback handle can not be registered twice against the same
-     *    (semaphore surface, index, wait_value) tuple, so unregistration will
-     *    never race with registration at the RM level, and would only race at
-     *    a higher level if used incorrectly. Since this is kernel code, we
-     *    can safely assume there won't be malicious clients purposely misuing
-     *    the API, but the burden is placed on the caller to ensure its usage
-     *    does not lead to races at higher levels.
-     *
-     * These factors considered together ensure any valid registered handle is
-     * either still in the relevant waiter list and refers to the same event/
-     * callback as when it was registered, or has been removed from the list
-     * as part of a critical section that also destroys the list itself and
-     * makes future lookups in that list impossible, and hence eliminates the
-     * chance of comparing a stale handle with a new handle of the same value
-     * as part of a lookup.
-     *
-     * \param [in]  device              The device passed to
-     *                                  importSemaphoreSurface() when creating
-     *                                  semaphoreSurface.
-     *
-     * \param [in]  semaphoreSurface    The semaphore surface passed to
-     *                                  registerSemaphoreSurfaceCallback() when
-     *                                  registering the callback.
-     *
-     * \param [in]  index               The index passed to
-     *                                  registerSemaphoreSurfaceCallback() when
-     *                                  registering the callback.
-     *
-     * \param [in]  wait_value          The wait_value passed to
-     *                                  registerSemaphoreSurfaceCallback() when
-     *                                  registering the callback.
-     *
-     * \param [in]  callbackHandle      The callback handle returned by
-     *                                  registerSemaphoreSurfaceCallback().
-     */
-    NvBool
-    (*unregisterSemaphoreSurfaceCallback)
-    (
-        struct NvKmsKapiDevice *device,
-        struct NvKmsKapiSemaphoreSurface *semaphoreSurface,
-        NvU64 index,
-        NvU64 wait_value,
-        struct NvKmsKapiSemaphoreSurfaceCallback *callbackHandle
-    );
-
-    /*!
-     * Update the value of a semaphore surface from the CPU.
-     *
-     * Update the semaphore value at the specified index from the CPU, then
-     * wake up any pending CPU waiters associated with that index that are
-     * waiting on it reaching a value <= the new value.
-     */
-    NvBool
-    (*setSemaphoreSurfaceValue)
-    (
-        struct NvKmsKapiDevice *device,
-        struct NvKmsKapiSemaphoreSurface *semaphoreSurface,
-        NvU64 index,
-        NvU64 new_value
-    );
-
-    /*!
-     * Set the pointer to the callback function table.
-     */
-    void
-    (*setCallbacks)
-    (
-        const struct NvKmsKapiCallbacks *callbacks
-    );
-
-    /*!
-     * Immediately initialize the specified display semaphore to the pending state.
-     *
-     * Must be called prior to applying a mode set that utilizes the specified
-     * display semaphore for synchronization.
-     *
-     * \param [in] device         The device which will utilize the semaphore.
-     *
-     * \param [in] semaphoreIndex Index of the desired semaphore within the
-     *                            NVKMS semaphore pool. Must be less than
-     *                            NvKmsKapiDeviceResourcesInfo::caps::numDisplaySemaphores
-     *                            for the specified device.
-     */
-    NvBool
-    (*tryInitDisplaySemaphore)
-    (
-        struct NvKmsKapiDevice *device,
-        NvU32 semaphoreIndex
-    );
-
-    /*!
-     * Immediately set the specified display semaphore to the displayable state.
-     *
-     * Must be called after \ref tryInitDisplaySemaphore to indicate a mode
-     * configuration change that utilizes the specified display semaphore for
-     * synchronization may proceed.
-     *
-     * \param [in] device         The device which will utilize the semaphore.
-     *
-     * \param [in] semaphoreIndex Index of the desired semaphore within the
-     *                            NVKMS semaphore pool. Must be less than
-     *                            NvKmsKapiDeviceResourcesInfo::caps::numDisplaySemaphores
-     *                            for the specified device.
-     */
-    void
-    (*signalDisplaySemaphore)
-    (
-        struct NvKmsKapiDevice *device,
-        NvU32 semaphoreIndex
-    );
-
-    /*!
-     * Immediately cancel use of a display semaphore by resetting its value to
-     * its initial state.
-     *
-     * This can be used by clients to restore a semaphore to a consistent state
-     * when they have prepared it for use by previously calling
-     * \ref tryInitDisplaySemaphore() on it, but are then prevented from
-     * submitting the associated hardware operations to consume it due to the
-     * subsequent failure of some software or hardware operation.
-     *
-     * \param [in] device         The device which will utilize the semaphore.
-     *
-     * \param [in] semaphoreIndex Index of the desired semaphore within the
-     *                            NVKMS semaphore pool. Must be less than
-     *                            NvKmsKapiDeviceResourcesInfo::caps::numDisplaySemaphores
-     *                            for the specified device.
-     */
-    void
-    (*cancelDisplaySemaphore)
-    (
-        struct NvKmsKapiDevice *device,
-        NvU32 semaphoreIndex
-    );
-
-    /*!
-     * Signal the VRR semaphore at the specified index from the CPU.
-     * If device does not support VRR semaphores, this is a no-op.
-     * Returns true if signal is success or no-op, otherwise returns false.
-     *
-     * \param [in]  device  A device allocated using allocateDevice().
-     *
-     * \param [in]  index   The VRR semaphore index to be signalled.
-     */
-    NvBool
-    (*signalVrrSemaphore)
-    (
-        struct NvKmsKapiDevice *device,
-        NvS32 index
-    );
-
-    /*!
-     * Check or wait on a head's LUT notifier.
-     *
-     * \param [in]  device              A device allocated using allocateDevice().
-     *
-     * \param [in]  head                The head to check for LUT completion.
-     *
-     * \param [in]  waitForCompletion   If true, wait for the notifier in NvKms
-     *                                  before returning.
-     *
-     * \param [out] complete            Returns whether the notifier has completed.
-     */
-    NvBool
-    (*checkLutNotifier)
-    (
-        struct NvKmsKapiDevice *device,
-        NvU32 head,
-        NvBool waitForCompletion
-    );
-
-    /*
-     * Notify NVKMS that the system's framebuffer console has been disabled and
-     * the reserved allocation for the old framebuffer console can be unmapped.
-     */
-    void
-    (*framebufferConsoleDisabled)
-    (
-        struct NvKmsKapiDevice *device
-    );
 };

 /** @} */
@@ -1609,20 +1056,6 @@ NvBool nvKmsKapiGetFunctionsTable
    struct NvKmsKapiFunctionsTable *funcsTable
 );

-NvU32 nvKmsKapiF16ToF32(NvU16 a);
-
-NvU16 nvKmsKapiF32ToF16(NvU32 a);
-
-NvU32 nvKmsKapiF32Mul(NvU32 a, NvU32 b);
-
-NvU32 nvKmsKapiF32Div(NvU32 a, NvU32 b);
-
-NvU32 nvKmsKapiF32Add(NvU32 a, NvU32 b);
-
-NvU32 nvKmsKapiF32ToUI32RMinMag(NvU32 a, NvBool exact);
-
-NvU32 nvKmsKapiUI32ToF32(NvU32 a);
-
 /** @} */

 #endif /* defined(__NVKMS_KAPI_H__) */
--- a/kernel-open/common/inc/nvlimits.h
+++ b/kernel-open/common/inc/nvlimits.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2017-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2017 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -25,34 +25,35 @@

 //
 // This file was generated with FINN, an NVIDIA coding tool.
-// Source file:      nvlimits.finn
+// Source file: nvlimits.finn
 //




+
+
+
+
+
+
+
 /*
 * This is the maximum number of GPUs supported in a single system.
 */
-#define NV_MAX_DEVICES                32
+#define NV_MAX_DEVICES          32

 /*
 * This is the maximum number of subdevices within a single device.
 */
-#define NV_MAX_SUBDEVICES             8
+#define NV_MAX_SUBDEVICES       8

 /*
 * This is the maximum length of the process name string.
 */
-#define NV_PROC_NAME_MAX_LENGTH       100U
+#define NV_PROC_NAME_MAX_LENGTH 100U

 /*
 * This is the maximum number of heads per GPU.
 */
-#define NV_MAX_HEADS                  4
-
-/*
- * Maximum length of a MIG device UUID. It is a 36-byte UUID string plus a
- * 4-byte prefix and NUL terminator: 'M' 'I' 'G' '-' UUID '\0x0'
- */
-#define NV_MIG_DEVICE_UUID_STR_LENGTH 41U
+#define NV_MAX_HEADS            4
--- a/kernel-open/common/inc/nvmisc.h
+++ b/kernel-open/common/inc/nvmisc.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 1993-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 1993-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -33,26 +33,43 @@ extern "C" {

 #include "nvtypes.h"

-// Miscellaneous macros useful for bit field manipulations.
-#ifndef NVBIT
-#define NVBIT(b)         (1U<<(b))
+#if !defined(NVIDIA_UNDEF_LEGACY_BIT_MACROS)
+//
+// Miscellaneous macros useful for bit field manipulations
+//
+// STUPID HACK FOR CL 19434692.  Will revert when fix CL is delivered bfm -> chips_a.
+#ifndef BIT
+#define BIT(b)                  (1U<<(b))
 #endif
-#ifndef NVBIT_TYPE
-#define NVBIT_TYPE(b, t) (((t)1U)<<(b))
+#ifndef BIT32
+#define BIT32(b)                ((NvU32)1U<<(b))
 #endif
-#ifndef NVBIT32
-#define NVBIT32(b)       NVBIT_TYPE(b, NvU32)
-#endif
-#ifndef NVBIT64
-#define NVBIT64(b)       NVBIT_TYPE(b, NvU64)
+#ifndef BIT64
+#define BIT64(b)                ((NvU64)1U<<(b))
 #endif

-//Concatenate 2 32bit values to a 64bit value
-#define NV_CONCAT_32_TO_64(hi, lo) ((((NvU64)hi) << 32) | ((NvU64)lo))
+#endif
+
+//
+// It is recommended to use the following bit macros to avoid macro name
+// collisions with other src code bases.
+//
+#ifndef NVBIT
+#define NVBIT(b)                  (1U<<(b))
+#endif
+#ifndef NVBIT_TYPE
+#define NVBIT_TYPE(b, t)          (((t)1U)<<(b))
+#endif
+#ifndef NVBIT32
+#define NVBIT32(b)                NVBIT_TYPE(b, NvU32)
+#endif
+#ifndef NVBIT64
+#define NVBIT64(b)                NVBIT_TYPE(b, NvU64)
+#endif

 // Helper macro's for 32 bit bitmasks
 #define NV_BITMASK32_ELEMENT_SIZE            (sizeof(NvU32) << 3)
-#define NV_BITMASK32_IDX(chId)               (((chId) & ~(0x1F)) >> 5)
+#define NV_BITMASK32_IDX(chId)               (((chId) & ~(0x1F)) >> 5)  
 #define NV_BITMASK32_OFFSET(chId)            ((chId) & (0x1F))
 #define NV_BITMASK32_SET(pChannelMask, chId) \
        (pChannelMask)[NV_BITMASK32_IDX(chId)] |= NVBIT(NV_BITMASK32_OFFSET(chId))
@@ -217,14 +234,12 @@ extern "C" {
 #define DRF_EXTENT(drf)         (drf##_HIGH_FIELD)
 #define DRF_SHIFT(drf)          ((drf##_LOW_FIELD) % 32U)
 #define DRF_SHIFT_RT(drf)       ((drf##_HIGH_FIELD) % 32U)
-#define DRF_SIZE(drf)           ((drf##_HIGH_FIELD)-(drf##_LOW_FIELD)+1U)
 #define DRF_MASK(drf)           (0xFFFFFFFFU >> (31U - ((drf##_HIGH_FIELD) % 32U) + ((drf##_LOW_FIELD) % 32U)))
 #else
 #define DRF_BASE(drf)           (NV_FALSE?drf)  // much better
 #define DRF_EXTENT(drf)         (NV_TRUE?drf)  // much better
 #define DRF_SHIFT(drf)          (((NvU32)DRF_BASE(drf)) % 32U)
 #define DRF_SHIFT_RT(drf)       (((NvU32)DRF_EXTENT(drf)) % 32U)
-#define DRF_SIZE(drf)           (DRF_EXTENT(drf)-DRF_BASE(drf)+1U)
 #define DRF_MASK(drf)           (0xFFFFFFFFU>>(31U - DRF_SHIFT_RT(drf) + DRF_SHIFT(drf)))
 #endif
 #define DRF_DEF(d,r,f,c)        (((NvU32)(NV ## d ## r ## f ## c))<<DRF_SHIFT(NV ## d ## r ## f))
@@ -234,12 +249,12 @@ extern "C" {
 #define DRF_EXTENT(drf)         (1?drf)  // much better
 #define DRF_SHIFT(drf)          ((DRF_ISBIT(0,drf)) % 32)
 #define DRF_SHIFT_RT(drf)       ((DRF_ISBIT(1,drf)) % 32)
-#define DRF_SIZE(drf)           (DRF_EXTENT(drf)-DRF_BASE(drf)+1U)
 #define DRF_MASK(drf)           (0xFFFFFFFFU>>(31-((DRF_ISBIT(1,drf)) % 32)+((DRF_ISBIT(0,drf)) % 32)))
 #define DRF_DEF(d,r,f,c)        ((NV ## d ## r ## f ## c)<<DRF_SHIFT(NV ## d ## r ## f))
 #define DRF_NUM(d,r,f,n)        (((n)&DRF_MASK(NV ## d ## r ## f))<<DRF_SHIFT(NV ## d ## r ## f))
 #endif
 #define DRF_SHIFTMASK(drf)      (DRF_MASK(drf)<<(DRF_SHIFT(drf)))
+#define DRF_SIZE(drf)           (DRF_EXTENT(drf)-DRF_BASE(drf)+1U)

 #define DRF_VAL(d,r,f,v)        (((v)>>DRF_SHIFT(NV ## d ## r ## f))&DRF_MASK(NV ## d ## r ## f))
 #endif
@@ -477,23 +492,6 @@ do                                                      \
 //
 #define NV_TWO_N_MINUS_ONE(n) (((1ULL<<(n/2))<<((n+1)/2))-1)

-//
-// Create a 64b bitmask with n bits set
-// This is the same as ((1ULL<<n) - 1), but it doesn't overflow for n=64
-//
-// ...
-// n=-1, 0x0000000000000000
-// n=0,  0x0000000000000000
-// n=1,  0x0000000000000001
-// ...
-// n=63, 0x7FFFFFFFFFFFFFFF
-// n=64, 0xFFFFFFFFFFFFFFFF
-// n=65, 0xFFFFFFFFFFFFFFFF
-// n=66, 0xFFFFFFFFFFFFFFFF
-// ...
-//
-#define NV_BITMASK64(n) ((n<1) ? 0ULL : (NV_U64_MAX>>((n>64) ? 0 : (64-n))))
-
 #define DRF_READ_1WORD_BS(d,r,f,v) \
    ((DRF_EXTENT_MW(NV##d##r##f)<8)?DRF_READ_1BYTE_BS(NV##d##r##f,(v)): \
    ((DRF_EXTENT_MW(NV##d##r##f)<16)?DRF_READ_2BYTE_BS(NV##d##r##f,(v)): \
@@ -574,12 +572,6 @@ nvMaskPos32(const NvU32 mask, const NvU32 bitIdx)
    n32 = BIT_IDX_32(LOWESTBIT(n32));\
 }

-// Destructive operation on n64
-#define LOWESTBITIDX_64(n64)         \
-{                                    \
-    n64 = BIT_IDX_64(LOWESTBIT(n64));\
-}
-
 // Destructive operation on n32
 #define HIGHESTBITIDX_32(n32)   \
 {                               \
@@ -591,17 +583,6 @@ nvMaskPos32(const NvU32 mask, const NvU32 bitIdx)
    n32 = count;                \
 }

-// Destructive operation on n64
-#define HIGHESTBITIDX_64(n64)   \
-{                               \
-    NvU64 count = 0;            \
-    while (n64 >>= 1)           \
-    {                           \
-        count++;                \
-    }                           \
-    n64 = count;                \
-}
-
 // Destructive operation on n32
 #define ROUNDUP_POW2(n32) \
 {                         \
@@ -711,35 +692,6 @@ nvPrevPow2_U64(const NvU64 x )
    }                                                       \
 }

-/*!
- * Returns the position of nth set bit in the given mask.
- *
- * Returns -1 if mask has fewer than n bits set.
- *
- * n is 0 indexed and has valid values 0..31 inclusive, so "zeroth" set bit is
- * the first set LSB.
- *
- * Example, if mask = 0x000000F0u and n = 1, the return value will be 5.
- * Example, if mask = 0x000000F0u and n = 4, the return value will be -1.
- */
-static NV_FORCEINLINE NvS32
-nvGetNthSetBitIndex32(NvU32 mask, NvU32 n)
-{
-    NvU32 seenSetBitsCount = 0;
-    NvS32 index;
-    FOR_EACH_INDEX_IN_MASK(32, index, mask)
-    {
-        if (seenSetBitsCount == n)
-        {
-            return index;
-        }
-        ++seenSetBitsCount;
-    }
-    FOR_EACH_INDEX_IN_MASK_END;
-
-    return -1;
-}
-
 //
 // Size to use when declaring variable-sized arrays
 //
@@ -783,15 +735,12 @@ nvGetNthSetBitIndex32(NvU32 mask, NvU32 n)
 // Returns the offset (in bytes) of 'member' in struct 'type'.
 #ifndef NV_OFFSETOF
    #if defined(__GNUC__) && (__GNUC__ > 3)
-        #define NV_OFFSETOF(type, member)   ((NvUPtr) __builtin_offsetof(type, member))
+        #define NV_OFFSETOF(type, member)   ((NvU32)__builtin_offsetof(type, member))
    #else
-        #define NV_OFFSETOF(type, member)    ((NvUPtr) &(((type *)0)->member))
+        #define NV_OFFSETOF(type, member)    ((NvU32)(NvU64)&(((type *)0)->member)) // shouldn't we use PtrToUlong? But will need to include windows header.
    #endif
 #endif

-// Given a pointer and the member it is of the parent struct, return a pointer to the parent struct
-#define NV_CONTAINEROF(ptr, type, member) ((type *) (((NvUPtr) ptr) - NV_OFFSETOF(type, member)))
-
 //
 // Performs a rounded division of b into a (unsigned). For SIGNED version of
 // NV_ROUNDED_DIV() macro check the comments in bug 769777.
@@ -958,40 +907,6 @@ static NV_FORCEINLINE void *NV_NVUPTR_TO_PTR(NvUPtr address)
    return uAddr.p;
 }

-// Get bit at pos (k) from x
-#define NV_BIT_GET(k, x)                       (((x) >> (k)) & 1)
-// Get bit at pos (n) from (hi) if >= 64, otherwise from (lo). This is paired with NV_BIT_SET_128 which sets the bit.
-#define NV_BIT_GET_128(n, lo, hi)              (((n) < 64) ? NV_BIT_GET((n), (lo)) : NV_BIT_GET((n) - 64, (hi)))
-//
-// Set the bit at pos (b) for U64 which is < 128. Since the (b) can be >= 64, we need 2 U64 to store this.
-// Use (lo) if (b) is less than 64, and (hi) if >= 64.
-//
-#define NV_BIT_SET_128(b, lo, hi)              { nvAssert( (b) < 128 ); if ( (b) < 64 ) (lo) |= NVBIT64(b); else (hi) |= NVBIT64( b & 0x3F ); }
-//
-// Clear the bit at pos (b) for U64 which is < 128.
-// Use (lo) if (b) is less than 64, and (hi) if >= 64.
-//
-#define NV_BIT_CLEAR_128(b, lo, hi)            { nvAssert( (b) < 128 ); if ( (b) < 64 ) (lo) &= ~NVBIT64(b); else (hi) &= ~NVBIT64( b & 0x3F ); }
-
-// Get the number of elements the specified fixed-size array
-#define NV_ARRAY_ELEMENTS(x)                   ((sizeof(x)/sizeof((x)[0])))
-
-#if !defined(NVIDIA_UNDEF_LEGACY_BIT_MACROS)
-//
-// Deprecated macros whose definition can be removed once the code base no longer references them.
-// Use the NVBIT* macros instead of these macros.
-//
-#ifndef BIT
-#define BIT(b)   (1U<<(b))
-#endif
-#ifndef BIT32
-#define BIT32(b) ((NvU32)1U<<(b))
-#endif
-#ifndef BIT64
-#define BIT64(b) ((NvU64)1U<<(b))
-#endif
-#endif
-
 #ifdef __cplusplus
 }
 #endif //__cplusplus
--- a/kernel-open/common/inc/nvstatus.h
+++ b/kernel-open/common/inc/nvstatus.h
@@ -24,6 +24,11 @@
 #ifndef SDK_NVSTATUS_H
 #define SDK_NVSTATUS_H

+/* XAPIGEN - this file is not suitable for (nor needed by) xapigen.         */
+/*           Rather than #ifdef out every such include in every sdk         */
+/*           file, punt here.                                               */
+#if !defined(XAPIGEN)        /* rest of file */
+
 #ifdef __cplusplus
 extern "C" {
 #endif
@@ -120,4 +125,6 @@ const char *nvstatusToString(NV_STATUS nvStatusIn);
 }
 #endif

+#endif // XAPIGEN
+
 #endif /* SDK_NVSTATUS_H */
--- a/kernel-open/common/inc/nvstatuscodes.h
+++ b/kernel-open/common/inc/nvstatuscodes.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 2014-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 2014-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -24,6 +24,11 @@
 #ifndef SDK_NVSTATUSCODES_H
 #define SDK_NVSTATUSCODES_H

+/* XAPIGEN - this file is not suitable for (nor needed by) xapigen.         */
+/*           Rather than #ifdef out every such include in every sdk         */
+/*           file, punt here.                                               */
+#if !defined(XAPIGEN)        /* rest of file */
+
 NV_STATUS_CODE(NV_OK,                                  0x00000000, "Success")
 NV_STATUS_CODE(NV_ERR_GENERIC,                         0x0000FFFF, "Failure: Generic Error")

@@ -148,24 +153,6 @@ NV_STATUS_CODE(NV_ERR_NVLINK_CLOCK_ERROR,              0x00000076, "Nvlink Clock
 NV_STATUS_CODE(NV_ERR_NVLINK_TRAINING_ERROR,           0x00000077, "Nvlink Training Error")
 NV_STATUS_CODE(NV_ERR_NVLINK_CONFIGURATION_ERROR,      0x00000078, "Nvlink Configuration Error")
 NV_STATUS_CODE(NV_ERR_RISCV_ERROR,                     0x00000079, "Generic RISC-V assert or halt")
-NV_STATUS_CODE(NV_ERR_FABRIC_MANAGER_NOT_PRESENT,      0x0000007A, "Fabric Manager is not loaded")
-NV_STATUS_CODE(NV_ERR_ALREADY_SIGNALLED,               0x0000007B, "Semaphore Surface value already >= requested wait value")
-NV_STATUS_CODE(NV_ERR_QUEUE_TASK_SLOT_NOT_AVAILABLE,   0x0000007C, "PMU RPC error due to no queue slot available for this event")
-NV_STATUS_CODE(NV_ERR_KEY_ROTATION_IN_PROGRESS,        0x0000007D, "Operation not allowed as key rotation is in progress")
-NV_STATUS_CODE(NV_ERR_TEST_ONLY_CODE_NOT_ENABLED,      0x0000007E, "Test-only code path not enabled")
-NV_STATUS_CODE(NV_ERR_SECURE_BOOT_FAILED,              0x0000007F, "GFW secure boot failed")
-NV_STATUS_CODE(NV_ERR_INSUFFICIENT_ZBC_ENTRY,          0x00000080, "No more ZBC entry for the client")
-NV_STATUS_CODE(NV_ERR_NVLINK_FABRIC_NOT_READY,         0x00000081, "Nvlink Fabric Status or Fabric Probe is not yet complete, caller needs to retry")
-NV_STATUS_CODE(NV_ERR_NVLINK_FABRIC_FAILURE,           0x00000082, "Nvlink Fabric Probe failed")
-NV_STATUS_CODE(NV_ERR_GPU_MEMORY_ONLINING_FAILURE,     0x00000083, "GPU Memory Onlining failed")
-NV_STATUS_CODE(NV_ERR_REDUCTION_MANAGER_NOT_AVAILABLE, 0x00000084, "Reduction Manager is not available")
-NV_STATUS_CODE(NV_ERR_THRESHOLD_CROSSED,               0x00000085, "A fatal threshold has been crossed")
-NV_STATUS_CODE(NV_ERR_RESOURCE_RETIREMENT_ERROR,       0x00000086, "An error occurred while trying to retire a resource")
-NV_STATUS_CODE(NV_ERR_FABRIC_STATE_OUT_OF_SYNC,        0x00000087, "NVLink fabric state cached by the driver is out of sync")
-NV_STATUS_CODE(NV_ERR_BUFFER_FULL,                     0x00000088, "Buffer is full")
-NV_STATUS_CODE(NV_ERR_BUFFER_EMPTY,                    0x00000089, "Buffer is empty")
-NV_STATUS_CODE(NV_ERR_MC_FLA_OFFSET_TABLE_FULL,        0x0000008A, "Multicast FLA offset table has no available slots")
-NV_STATUS_CODE(NV_ERR_DMA_XFER_FAILED,                 0x0000008B, "DMA transfer failed")

 // Warnings:
 NV_STATUS_CODE(NV_WARN_HOT_SWITCH,                     0x00010001, "WARNING Hot switch")
@@ -176,6 +163,7 @@ NV_STATUS_CODE(NV_WARN_MORE_PROCESSING_REQUIRED,       0x00010005, "WARNING More
 NV_STATUS_CODE(NV_WARN_NOTHING_TO_DO,                  0x00010006, "WARNING Nothing to do")
 NV_STATUS_CODE(NV_WARN_NULL_OBJECT,                    0x00010007, "WARNING NULL object found")
 NV_STATUS_CODE(NV_WARN_OUT_OF_RANGE,                   0x00010008, "WARNING value out of range")
-NV_STATUS_CODE(NV_WARN_THRESHOLD_CROSSED,              0x00010009, "WARNING Threshold has been crossed")
+
+#endif // XAPIGEN

 #endif /* SDK_NVSTATUSCODES_H */
--- a/kernel-open/common/inc/nvtypes.h
+++ b/kernel-open/common/inc/nvtypes.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 1993-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 1993-2020 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -24,6 +24,10 @@
 #ifndef NVTYPES_INCLUDED
 #define NVTYPES_INCLUDED

+#ifdef __cplusplus
+extern "C" {
+#endif
+
 #include "cpuopsys.h"

 #ifndef NVTYPES_USE_STDINT
@@ -51,10 +55,6 @@
 #endif
 #endif // __cplusplus

-#ifdef __cplusplus
-extern "C" {
-#endif
-
 #if defined(MAKE_NV64TYPES_8BYTES_ALIGNED) && defined(__i386__)
 // ensure or force 8-bytes alignment of NV 64-bit types
 #define OPTIONAL_ALIGN8_ATTR __attribute__((aligned(8)))
@@ -145,18 +145,7 @@ typedef   signed short     NvS16; /* -32768 to 32767                         */
 #endif

 // Macro to build an NvU32 from four bytes, listed from msb to lsb
-#define NvU32_BUILD(a, b, c, d) \
-    ((NvU32)( \
-     (((NvU32)(a) & 0xff) << 24) | \
-     (((NvU32)(b) & 0xff) << 16) | \
-     (((NvU32)(c) & 0xff) << 8)  | \
-     (((NvU32)(d) & 0xff))))
-
-// Macro to build an NvU64 from two DWORDS, listed from msb to lsb
-#define NvU64_BUILD(a, b) \
-    ((NvU64)( \
-     (((NvU64)(a) & ~0U) << 32) | \
-     (((NvU64)(b) & ~0U))))
+#define NvU32_BUILD(a, b, c, d) (((a) << 24) | ((b) << 16) | ((c) << 8) | (d))

 #if NVTYPES_USE_STDINT
 typedef uint32_t           NvV32; /* "void": enumerated or multiple fields   */
@@ -524,12 +513,6 @@ typedef struct
 // place to re-locate these from nvos.h which cannot be included by a number
 // of builds that need them

-#if defined(__GNUC__) || defined(__clang__) || defined(__INTEL_COMPILER)
-    #define NV_ATTRIBUTE_UNUSED __attribute__((__unused__))
-#else
-    #define NV_ATTRIBUTE_UNUSED
-#endif
-
 #if defined(_MSC_VER)

    #if _MSC_VER >= 1310
@@ -553,6 +536,8 @@ typedef struct

    #define NV_FORCERESULTCHECK

+    #define NV_ATTRIBUTE_UNUSED
+
    #define NV_FORMAT_PRINTF(_f, _a)

 #else // ! defined(_MSC_VER)
@@ -650,6 +635,12 @@ typedef struct
        #define NV_FORCERESULTCHECK
    #endif

+    #if defined(__GNUC__) || defined(__clang__) || defined(__INTEL_COMPILER)
+        #define NV_ATTRIBUTE_UNUSED __attribute__((__unused__))
+    #else
+        #define NV_ATTRIBUTE_UNUSED
+    #endif
+
    /*
     * Functions decorated with NV_FORMAT_PRINTF(f, a) have a format string at
     * parameter number 'f' and variadic arguments start at parameter number 'a'.
--- a/kernel-open/common/inc/os-interface.h
+++ b/kernel-open/common/inc/os-interface.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 1999-2025 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 1999-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -40,11 +40,8 @@
 #include "nv_stdarg.h"
 #include <nv-kernel-interface-api.h>
 #include <os/nv_memory_type.h>
-#include <os/nv_memory_area.h>
 #include <nv-caps.h>

-#include "rs_access.h"
-


 typedef struct
@@ -62,11 +59,6 @@ struct os_work_queue;
 /* Each OS defines its own version of this opaque type */
 typedef struct os_wait_queue os_wait_queue;

-/* Flags needed by os_get_current_proccess_flags */
-#define OS_CURRENT_PROCESS_FLAG_NONE            0x0
-#define OS_CURRENT_PROCESS_FLAG_KERNEL_THREAD   0x1
-#define OS_CURRENT_PROCESS_FLAG_EXITING         0x2
-
 /*
 * ---------------------------------------------------------------------------
 *
@@ -75,175 +67,152 @@ typedef struct os_wait_queue os_wait_queue;
 * ---------------------------------------------------------------------------
 */

-NV_STATUS   NV_API_CALL  os_alloc_mem                     (void **, NvU64);
-void        NV_API_CALL  os_free_mem                      (void *);
-NV_STATUS   NV_API_CALL  os_get_system_time               (NvU32 *, NvU32 *);
-NvU64       NV_API_CALL  os_get_monotonic_time_ns         (void);
-NvU64       NV_API_CALL  os_get_monotonic_time_ns_hr      (void);
-NvU64       NV_API_CALL  os_get_monotonic_tick_resolution_ns (void);
-NV_STATUS   NV_API_CALL  os_delay                         (NvU32);
-NV_STATUS   NV_API_CALL  os_delay_us                      (NvU32);
-NvU64       NV_API_CALL  os_get_cpu_frequency             (void);
-NvU32       NV_API_CALL  os_get_current_process           (void);
-void        NV_API_CALL  os_get_current_process_name      (char *, NvU32);
-NV_STATUS   NV_API_CALL  os_get_current_thread            (NvU64 *);
-char*       NV_API_CALL  os_string_copy                   (char *, const char *);
-NvU32       NV_API_CALL  os_string_length                 (const char *);
-NvU32       NV_API_CALL  os_strtoul                       (const char *, char **, NvU32);
-NvS32       NV_API_CALL  os_string_compare                (const char *, const char *);
-NvS32       NV_API_CALL  os_snprintf                      (char *, NvU32, const char *, ...);
-NvS32       NV_API_CALL  os_vsnprintf                     (char *, NvU32, const char *, va_list);
-void        NV_API_CALL  os_log_error                     (const char *, va_list);
-void*       NV_API_CALL  os_mem_copy                      (void *, const void *, NvU32);
-NV_STATUS   NV_API_CALL  os_memcpy_from_user              (void *, const void *, NvU32);
-NV_STATUS   NV_API_CALL  os_memcpy_to_user                (void *, const void *, NvU32);
-void*       NV_API_CALL  os_mem_set                       (void *, NvU8, NvU32);
-NvS32       NV_API_CALL  os_mem_cmp                       (const NvU8 *, const NvU8 *, NvU32);
-void*       NV_API_CALL  os_pci_init_handle               (NvU32, NvU8, NvU8, NvU8, NvU16 *, NvU16 *);
-NV_STATUS   NV_API_CALL  os_pci_read_byte                 (void *, NvU32, NvU8 *);
-NV_STATUS   NV_API_CALL  os_pci_read_word                 (void *, NvU32, NvU16 *);
-NV_STATUS   NV_API_CALL  os_pci_read_dword                (void *, NvU32, NvU32 *);
-NV_STATUS   NV_API_CALL  os_pci_write_byte                (void *, NvU32, NvU8);
-NV_STATUS   NV_API_CALL  os_pci_write_word                (void *, NvU32, NvU16);
-NV_STATUS   NV_API_CALL  os_pci_write_dword               (void *, NvU32, NvU32);
-NvBool      NV_API_CALL  os_pci_remove_supported          (void);
-void        NV_API_CALL  os_pci_remove                    (void *);
-void*       NV_API_CALL  os_map_kernel_space              (NvU64, NvU64, NvU32);
-void        NV_API_CALL  os_unmap_kernel_space            (void *, NvU64);
-#if defined(NV_VMWARE)
-void*       NV_API_CALL  os_map_user_space                (MemoryArea *, NvU32, NvU32, void **);
-void        NV_API_CALL  os_unmap_user_space              (void *, NvU64, void *);
-#endif
-NV_STATUS   NV_API_CALL  os_flush_cpu_cache_all           (void);
-NV_STATUS   NV_API_CALL  os_flush_user_cache              (void);
+NvU64       NV_API_CALL  os_get_num_phys_pages       (void);
+NV_STATUS   NV_API_CALL  os_alloc_mem                (void **, NvU64);
+void        NV_API_CALL  os_free_mem                 (void *);
+NV_STATUS   NV_API_CALL  os_get_current_time         (NvU32 *, NvU32 *);
+NvU64       NV_API_CALL  os_get_current_tick         (void);
+NvU64       NV_API_CALL  os_get_current_tick_hr      (void);
+NvU64       NV_API_CALL  os_get_tick_resolution      (void);
+NV_STATUS   NV_API_CALL  os_delay                    (NvU32);
+NV_STATUS   NV_API_CALL  os_delay_us                 (NvU32);
+NvU64       NV_API_CALL  os_get_cpu_frequency        (void);
+NvU32       NV_API_CALL  os_get_current_process      (void);
+void        NV_API_CALL  os_get_current_process_name (char *, NvU32);
+NV_STATUS   NV_API_CALL  os_get_current_thread       (NvU64 *);
+char*       NV_API_CALL  os_string_copy              (char *, const char *);
+NvU32       NV_API_CALL  os_string_length            (const char *);
+NvU32       NV_API_CALL  os_strtoul                  (const char *, char **, NvU32);
+NvS32       NV_API_CALL  os_string_compare           (const char *, const char *);
+NvS32       NV_API_CALL  os_snprintf                 (char *, NvU32, const char *, ...);
+NvS32       NV_API_CALL  os_vsnprintf                (char *, NvU32, const char *, va_list);
+void        NV_API_CALL  os_log_error                (const char *, va_list);
+void*       NV_API_CALL  os_mem_copy                 (void *, const void *, NvU32);
+NV_STATUS   NV_API_CALL  os_memcpy_from_user         (void *, const void *, NvU32);
+NV_STATUS   NV_API_CALL  os_memcpy_to_user           (void *, const void *, NvU32);
+void*       NV_API_CALL  os_mem_set                  (void *, NvU8, NvU32);
+NvS32       NV_API_CALL  os_mem_cmp                  (const NvU8 *, const NvU8 *, NvU32);
+void*       NV_API_CALL  os_pci_init_handle          (NvU32, NvU8, NvU8, NvU8, NvU16 *, NvU16 *);
+NV_STATUS   NV_API_CALL  os_pci_read_byte            (void *, NvU32, NvU8 *);
+NV_STATUS   NV_API_CALL  os_pci_read_word            (void *, NvU32, NvU16 *);
+NV_STATUS   NV_API_CALL  os_pci_read_dword           (void *, NvU32, NvU32 *);
+NV_STATUS   NV_API_CALL  os_pci_write_byte           (void *, NvU32, NvU8);
+NV_STATUS   NV_API_CALL  os_pci_write_word           (void *, NvU32, NvU16);
+NV_STATUS   NV_API_CALL  os_pci_write_dword          (void *, NvU32, NvU32);
+NvBool      NV_API_CALL  os_pci_remove_supported     (void);
+void        NV_API_CALL  os_pci_remove               (void *);
+void*       NV_API_CALL  os_map_kernel_space         (NvU64, NvU64, NvU32);
+void        NV_API_CALL  os_unmap_kernel_space       (void *, NvU64);
+void*       NV_API_CALL  os_map_user_space           (NvU64, NvU64, NvU32, NvU32, void **);
+void        NV_API_CALL  os_unmap_user_space         (void *, NvU64, void *);
+NV_STATUS   NV_API_CALL  os_flush_cpu_cache          (void);
+NV_STATUS   NV_API_CALL  os_flush_cpu_cache_all      (void);
+NV_STATUS   NV_API_CALL  os_flush_user_cache         (void);
 void        NV_API_CALL  os_flush_cpu_write_combine_buffer(void);
-NvU8        NV_API_CALL  os_io_read_byte                  (NvU32);
-NvU16       NV_API_CALL  os_io_read_word                  (NvU32);
-NvU32       NV_API_CALL  os_io_read_dword                 (NvU32);
-void        NV_API_CALL  os_io_write_byte                 (NvU32, NvU8);
-void        NV_API_CALL  os_io_write_word                 (NvU32, NvU16);
-void        NV_API_CALL  os_io_write_dword                (NvU32, NvU32);
-NvBool      NV_API_CALL  os_is_administrator              (void);
-NvBool      NV_API_CALL  os_check_access                  (RsAccessRight accessRight);
-void        NV_API_CALL  os_dbg_init                      (void);
-void        NV_API_CALL  os_dbg_breakpoint                (void);
-void        NV_API_CALL  os_dbg_set_level                 (NvU32);
-NvU32       NV_API_CALL  os_get_cpu_count                 (void);
-NvU32       NV_API_CALL  os_get_cpu_number                (void);
-void        NV_API_CALL  os_disable_console_access        (void);
-void        NV_API_CALL  os_enable_console_access         (void);
-NV_STATUS   NV_API_CALL  os_registry_init                 (void);
-NvU64       NV_API_CALL  os_get_max_user_va               (void);
-NV_STATUS   NV_API_CALL  os_schedule                      (void);
-NV_STATUS   NV_API_CALL  os_alloc_spinlock                (void **);
-void        NV_API_CALL  os_free_spinlock                 (void *);
-NvU64       NV_API_CALL  os_acquire_spinlock              (void *);
-void        NV_API_CALL  os_release_spinlock              (void *, NvU64);
-NV_STATUS   NV_API_CALL  os_queue_work_item               (struct os_work_queue *, void *);
-NV_STATUS   NV_API_CALL  os_flush_work_queue              (struct os_work_queue *, NvBool);
-NvBool      NV_API_CALL  os_is_queue_flush_ongoing        (struct os_work_queue *);
-NV_STATUS   NV_API_CALL  os_alloc_mutex                   (void **);
-void        NV_API_CALL  os_free_mutex                    (void *);
-NV_STATUS   NV_API_CALL  os_acquire_mutex                 (void *);
-NV_STATUS   NV_API_CALL  os_cond_acquire_mutex            (void *);
-void        NV_API_CALL  os_release_mutex                 (void *);
-void*       NV_API_CALL  os_alloc_semaphore               (NvU32);
-void        NV_API_CALL  os_free_semaphore                (void *);
-NV_STATUS   NV_API_CALL  os_acquire_semaphore             (void *);
-NV_STATUS   NV_API_CALL  os_cond_acquire_semaphore        (void *);
-NV_STATUS   NV_API_CALL  os_release_semaphore             (void *);
-void*       NV_API_CALL  os_alloc_rwlock                  (void);
-void        NV_API_CALL  os_free_rwlock                   (void *);
-NV_STATUS   NV_API_CALL  os_acquire_rwlock_read           (void *);
-NV_STATUS   NV_API_CALL  os_acquire_rwlock_write          (void *);
-NV_STATUS   NV_API_CALL  os_cond_acquire_rwlock_read      (void *);
-NV_STATUS   NV_API_CALL  os_cond_acquire_rwlock_write     (void *);
-void        NV_API_CALL  os_release_rwlock_read           (void *);
-void        NV_API_CALL  os_release_rwlock_write          (void *);
-NvBool      NV_API_CALL  os_semaphore_may_sleep           (void);
-NV_STATUS   NV_API_CALL  os_get_version_info              (os_version_info*);
-NV_STATUS   NV_API_CALL  os_get_is_openrm                 (NvBool *);
-NvBool      NV_API_CALL  os_is_isr                        (void);
-NvBool      NV_API_CALL  os_pat_supported                 (void);
-void        NV_API_CALL  os_dump_stack                    (void);
-NvBool      NV_API_CALL  os_is_efi_enabled                (void);
-NvBool      NV_API_CALL  os_is_xen_dom0                   (void);
-NvBool      NV_API_CALL  os_is_vgx_hyper                  (void);
-NV_STATUS   NV_API_CALL  os_inject_vgx_msi                (NvU16, NvU64, NvU32);
-NvBool      NV_API_CALL  os_is_grid_supported             (void);
-NvU32       NV_API_CALL  os_get_grid_csp_support          (void);
-void        NV_API_CALL  os_bug_check                     (NvU32, const char *);
-NV_STATUS   NV_API_CALL  os_lock_user_pages               (void *, NvU64, void **, NvU32);
-NV_STATUS   NV_API_CALL  os_lookup_user_io_memory         (void *, NvU64, NvU64 **);
-NV_STATUS   NV_API_CALL  os_unlock_user_pages             (NvU64, void *, NvU32);
-NV_STATUS   NV_API_CALL  os_match_mmap_offset             (void *, NvU64, NvU64 *);
-NV_STATUS   NV_API_CALL  os_get_euid                      (NvU32 *);
-NV_STATUS   NV_API_CALL  os_get_smbios_header             (NvU64 *pSmbsAddr);
-NV_STATUS   NV_API_CALL  os_get_acpi_rsdp_from_uefi       (NvU32 *);
-void        NV_API_CALL  os_add_record_for_crashLog       (void *, NvU32);
-void        NV_API_CALL  os_delete_record_for_crashLog    (void *);
-NV_STATUS   NV_API_CALL  os_call_vgpu_vfio                (void *, NvU32);
-NV_STATUS   NV_API_CALL  os_device_vm_present             (void);
-NV_STATUS   NV_API_CALL  os_numa_memblock_size            (NvU64 *);
-NV_STATUS   NV_API_CALL  os_alloc_pages_node              (NvS32, NvU32, NvU32, NvU64 *);
-NV_STATUS   NV_API_CALL  os_get_page                      (NvU64 address);
-NV_STATUS   NV_API_CALL  os_put_page                      (NvU64 address);
-NvU32       NV_API_CALL  os_get_page_refcount             (NvU64 address);
-NvU32       NV_API_CALL  os_count_tail_pages              (NvU64 address);
-void        NV_API_CALL  os_free_pages_phys               (NvU64, NvU32);
-NV_STATUS   NV_API_CALL  os_open_temporary_file           (void **);
-void        NV_API_CALL  os_close_file                    (void *);
-NV_STATUS   NV_API_CALL  os_write_file                    (void *, NvU8 *, NvU64, NvU64);
-NV_STATUS   NV_API_CALL  os_read_file                     (void *, NvU8 *, NvU64, NvU64);
-NV_STATUS   NV_API_CALL  os_open_readonly_file            (const char *, void **);
-NV_STATUS   NV_API_CALL  os_open_and_read_file            (const char *, NvU8 *, NvU64);
-NvBool      NV_API_CALL  os_is_nvswitch_present           (void);
-NV_STATUS   NV_API_CALL  os_get_random_bytes              (NvU8 *, NvU16);
-NvU32       NV_API_CALL  os_get_current_process_flags     (void);
-NV_STATUS   NV_API_CALL  os_alloc_wait_queue              (os_wait_queue **);
-void        NV_API_CALL  os_free_wait_queue               (os_wait_queue *);
-void        NV_API_CALL  os_wait_uninterruptible          (os_wait_queue *);
-void        NV_API_CALL  os_wait_interruptible            (os_wait_queue *);
-void        NV_API_CALL  os_wake_up                       (os_wait_queue *);
-nv_cap_t*   NV_API_CALL  os_nv_cap_init                   (const char *);
-nv_cap_t*   NV_API_CALL  os_nv_cap_create_dir_entry       (nv_cap_t *, const char *, int);
-nv_cap_t*   NV_API_CALL  os_nv_cap_create_file_entry      (nv_cap_t *, const char *, int);
-void        NV_API_CALL  os_nv_cap_destroy_entry          (nv_cap_t *);
-int         NV_API_CALL  os_nv_cap_validate_and_dup_fd    (const nv_cap_t *, int);
-void        NV_API_CALL  os_nv_cap_close_fd               (int);
-NvS32       NV_API_CALL  os_imex_channel_get              (NvU64);
-NvS32       NV_API_CALL  os_imex_channel_count            (void);
+NvU8        NV_API_CALL  os_io_read_byte             (NvU32);
+NvU16       NV_API_CALL  os_io_read_word             (NvU32);
+NvU32       NV_API_CALL  os_io_read_dword            (NvU32);
+void        NV_API_CALL  os_io_write_byte            (NvU32, NvU8);
+void        NV_API_CALL  os_io_write_word            (NvU32, NvU16);
+void        NV_API_CALL  os_io_write_dword           (NvU32, NvU32);
+NvBool      NV_API_CALL  os_is_administrator         (void);
+NvBool      NV_API_CALL  os_allow_priority_override  (void);
+void        NV_API_CALL  os_dbg_init                 (void);
+void        NV_API_CALL  os_dbg_breakpoint           (void);
+void        NV_API_CALL  os_dbg_set_level            (NvU32);
+NvU32       NV_API_CALL  os_get_cpu_count            (void);
+NvU32       NV_API_CALL  os_get_cpu_number           (void);
+void        NV_API_CALL  os_disable_console_access   (void);
+void        NV_API_CALL  os_enable_console_access    (void);
+NV_STATUS   NV_API_CALL  os_registry_init            (void);
+NV_STATUS   NV_API_CALL  os_schedule                 (void);
+NV_STATUS   NV_API_CALL  os_alloc_spinlock           (void **);
+void        NV_API_CALL  os_free_spinlock            (void *);
+NvU64       NV_API_CALL  os_acquire_spinlock         (void *);
+void        NV_API_CALL  os_release_spinlock         (void *, NvU64);
+NV_STATUS   NV_API_CALL  os_queue_work_item          (struct os_work_queue *, void *);
+NV_STATUS   NV_API_CALL  os_flush_work_queue         (struct os_work_queue *);
+NV_STATUS   NV_API_CALL  os_alloc_mutex              (void **);
+void        NV_API_CALL  os_free_mutex               (void *);
+NV_STATUS   NV_API_CALL  os_acquire_mutex            (void *);
+NV_STATUS   NV_API_CALL  os_cond_acquire_mutex       (void *);
+void        NV_API_CALL  os_release_mutex            (void *);
+void*       NV_API_CALL  os_alloc_semaphore          (NvU32);
+void        NV_API_CALL  os_free_semaphore           (void *);
+NV_STATUS   NV_API_CALL  os_acquire_semaphore        (void *);
+NV_STATUS   NV_API_CALL  os_cond_acquire_semaphore   (void *);
+NV_STATUS   NV_API_CALL  os_release_semaphore        (void *);
+NvBool      NV_API_CALL  os_semaphore_may_sleep      (void);
+NV_STATUS   NV_API_CALL  os_get_version_info         (os_version_info*);
+NvBool      NV_API_CALL  os_is_isr                   (void);
+NvBool      NV_API_CALL  os_pat_supported            (void);
+void        NV_API_CALL  os_dump_stack               (void);
+NvBool      NV_API_CALL  os_is_efi_enabled           (void);
+NvBool      NV_API_CALL  os_is_xen_dom0              (void);
+NvBool      NV_API_CALL  os_is_vgx_hyper             (void);
+NV_STATUS   NV_API_CALL  os_inject_vgx_msi           (NvU16, NvU64, NvU32);
+NvBool      NV_API_CALL  os_is_grid_supported        (void);
+NvU32       NV_API_CALL  os_get_grid_csp_support     (void);
+void        NV_API_CALL  os_get_screen_info          (NvU64 *, NvU16 *, NvU16 *, NvU16 *, NvU16 *, NvU64, NvU64);
+void        NV_API_CALL  os_bug_check                (NvU32, const char *);
+NV_STATUS   NV_API_CALL  os_lock_user_pages          (void *, NvU64, void **, NvU32);
+NV_STATUS   NV_API_CALL  os_lookup_user_io_memory    (void *, NvU64, NvU64 **, void**);
+NV_STATUS   NV_API_CALL  os_unlock_user_pages        (NvU64, void *);
+NV_STATUS   NV_API_CALL  os_match_mmap_offset        (void *, NvU64, NvU64 *);
+NV_STATUS   NV_API_CALL  os_get_euid                 (NvU32 *);
+NV_STATUS   NV_API_CALL  os_get_smbios_header        (NvU64 *pSmbsAddr);
+NV_STATUS   NV_API_CALL  os_get_acpi_rsdp_from_uefi  (NvU32 *);
+void        NV_API_CALL  os_add_record_for_crashLog  (void *, NvU32);
+void        NV_API_CALL  os_delete_record_for_crashLog (void *);
+NV_STATUS   NV_API_CALL  os_call_vgpu_vfio           (void *, NvU32);
+NV_STATUS   NV_API_CALL  os_numa_memblock_size       (NvU64 *);
+NV_STATUS   NV_API_CALL  os_alloc_pages_node         (NvS32, NvU32, NvU32, NvU64 *);
+NV_STATUS   NV_API_CALL  os_get_page                 (NvU64 address);
+NV_STATUS   NV_API_CALL  os_put_page                 (NvU64 address);
+NvU32       NV_API_CALL  os_get_page_refcount        (NvU64 address);
+NvU32       NV_API_CALL  os_count_tail_pages         (NvU64 address);
+void        NV_API_CALL  os_free_pages_phys          (NvU64, NvU32);
+NV_STATUS   NV_API_CALL  os_call_nv_vmbus            (NvU32, void *);
+NV_STATUS   NV_API_CALL  os_open_temporary_file      (void **);
+void        NV_API_CALL  os_close_file               (void *);
+NV_STATUS   NV_API_CALL  os_write_file               (void *, NvU8 *, NvU64, NvU64);
+NV_STATUS   NV_API_CALL  os_read_file                (void *, NvU8 *, NvU64, NvU64);
+NV_STATUS   NV_API_CALL  os_open_readonly_file       (const char *, void **);
+NV_STATUS   NV_API_CALL  os_open_and_read_file       (const char *, NvU8 *, NvU64);
+NvBool      NV_API_CALL  os_is_nvswitch_present      (void);
+void        NV_API_CALL  os_get_random_bytes         (NvU8 *, NvU16);
+NV_STATUS   NV_API_CALL  os_alloc_wait_queue         (os_wait_queue **);
+void        NV_API_CALL  os_free_wait_queue          (os_wait_queue *);
+void        NV_API_CALL  os_wait_uninterruptible     (os_wait_queue *);
+void        NV_API_CALL  os_wait_interruptible       (os_wait_queue *);
+void        NV_API_CALL  os_wake_up                  (os_wait_queue *);
+nv_cap_t*   NV_API_CALL  os_nv_cap_init               (const char *);
+nv_cap_t*   NV_API_CALL  os_nv_cap_create_dir_entry   (nv_cap_t *, const char *, int);
+nv_cap_t*   NV_API_CALL  os_nv_cap_create_file_entry  (nv_cap_t *, const char *, int);
+void        NV_API_CALL  os_nv_cap_destroy_entry      (nv_cap_t *);
+int         NV_API_CALL  os_nv_cap_validate_and_dup_fd(const nv_cap_t *, int);
+void        NV_API_CALL  os_nv_cap_close_fd           (int);

-NV_STATUS   NV_API_CALL  os_get_tegra_platform       (NvU32 *);
-enum os_pci_req_atomics_type {
-    OS_INTF_PCIE_REQ_ATOMICS_32BIT,
-    OS_INTF_PCIE_REQ_ATOMICS_64BIT,
-    OS_INTF_PCIE_REQ_ATOMICS_128BIT
-};
-NV_STATUS   NV_API_CALL  os_enable_pci_req_atomics   (void *, enum os_pci_req_atomics_type);
-void        NV_API_CALL  os_pci_trigger_flr(void *handle);
-NV_STATUS   NV_API_CALL  os_get_numa_node_memory_usage (NvS32, NvU64 *, NvU64 *);
-NV_STATUS   NV_API_CALL  os_numa_add_gpu_memory      (void *, NvU64, NvU64, NvU32 *);
-NV_STATUS   NV_API_CALL  os_numa_remove_gpu_memory   (void *, NvU64, NvU64, NvU32); 
-NV_STATUS   NV_API_CALL  os_offline_page_at_address(NvU64 address);
-void*       NV_API_CALL  os_get_pid_info(void);
-void        NV_API_CALL  os_put_pid_info(void *pid_info);
-NV_STATUS   NV_API_CALL  os_find_ns_pid(void *pid_info, NvU32 *ns_pid);
-NvBool      NV_API_CALL  os_is_init_ns(void);
-NV_STATUS   NV_API_CALL  os_iommu_sva_bind(void *arg, void **handle, NvU32 *pasid);
-void        NV_API_CALL  os_iommu_sva_unbind(void *handle);

-extern NvU64 os_page_size;
-extern NvU64 os_max_page_size;
+
+
+
+
+
+
+
+
+
+
+
+
+
+extern NvU32 os_page_size;
 extern NvU64 os_page_mask;
 extern NvU8  os_page_shift;
-extern NvBool os_cc_enabled;
-extern NvBool os_cc_sev_snp_enabled;
-extern NvBool os_cc_sme_enabled;
-extern NvBool os_cc_snp_vtom_enabled;
-extern NvBool os_cc_tdx_enabled;
+extern NvU32 os_sev_status;
+extern NvBool os_sev_enabled;
 extern NvBool os_dma_buf_enabled;
-extern NvBool os_imex_channel_is_supported;

 /*
 * ---------------------------------------------------------------------------
@@ -276,9 +245,11 @@ int  NV_API_CALL  nv_printf(NvU32 debuglevel, const char *printf_format, ...);
 #define NV_LOCK_USER_PAGES_FLAGS_WRITE_NO                  0x00000000
 #define NV_LOCK_USER_PAGES_FLAGS_WRITE_YES                 0x00000001

-// NV OS Tegra platform type defines
-#define NV_OS_TEGRA_PLATFORM_SIM        0
-#define NV_OS_TEGRA_PLATFORM_FPGA       1
-#define NV_OS_TEGRA_PLATFORM_SILICON    2
+
+
+
+
+
+

 #endif /* OS_INTERFACE_H */
--- a/kernel-open/common/inc/os/nv_memory_area.h
+++ b/kernel-open/common/inc/os/nv_memory_area.h
@@ -1,104 +0,0 @@
-/*
- * SPDX-FileCopyrightText: Copyright (c) 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef NV_MEMORY_AREA_H
-#define NV_MEMORY_AREA_H
-
-typedef struct MemoryRange
-{
-    NvU64 start;
-    NvU64 size;
-} MemoryRange;
-
-typedef struct MemoryArea
-{
-    MemoryRange *pRanges;
-    NvU64 numRanges;
-} MemoryArea;
-
-static inline NvU64 memareaSize(MemoryArea memArea)
-{
-    NvU64 size = 0;
-    NvU64 idx = 0;
-    for (idx = 0; idx < memArea.numRanges; idx++)
-    {
-        size += memArea.pRanges[idx].size;
-    }
-    return size;
-}
-
-static inline MemoryRange
-mrangeMake
-(
-    NvU64 start,
-    NvU64 size
-)
-{
-    MemoryRange range;
-    range.start = start;
-    range.size = size;
-    return range;
-}
-
-static inline NvU64
-mrangeLimit
-(
-    MemoryRange a
-)
-{
-    return a.start + a.size;
-}
-
-static inline NvBool
-mrangeIntersects
-(
-    MemoryRange a,
-    MemoryRange b
-)
-{
-    return ((a.start >= b.start) && (a.start < mrangeLimit(b))) ||
-        ((b.start >= a.start) && (b.start < mrangeLimit(a)));
-}
-
-static inline NvBool
-mrangeContains
-(
-    MemoryRange outer,
-    MemoryRange inner
-)
-{
-    return (inner.start >= outer.start) && (mrangeLimit(inner) <= mrangeLimit(outer));
-}
-
-static inline MemoryRange
-mrangeOffset
-(
-    MemoryRange range,
-    NvU64 amt
-)
-{
-    range.start += amt;
-    return range;
-}
-
-#endif /* NV_MEMORY_AREA_H */
--- a/kernel-open/common/inc/os_dsi_panel_props.h
+++ b/kernel-open/common/inc/os_dsi_panel_props.h
@@ -1,387 +0,0 @@
-/*
- * SPDX-FileCopyrightText: Copyright (c) 2022 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-#ifndef _OS_DSI_PANEL_PARAMS_H_
-#define _OS_DSI_PANEL_PARAMS_H_
-
-#define DSI_GENERIC_LONG_WRITE                  0x29
-#define DSI_DCS_LONG_WRITE                      0x39
-#define DSI_GENERIC_SHORT_WRITE_1_PARAMS        0x13
-#define DSI_GENERIC_SHORT_WRITE_2_PARAMS        0x23
-#define DSI_DCS_WRITE_0_PARAM                   0x05
-#define DSI_DCS_WRITE_1_PARAM                   0x15
-#define DSI_DCS_READ_PARAM                      0x06
-#define DSI_DCS_COMPRESSION_MODE		        0x07
-#define DSI_DCS_PPS_LONG_WRITE			        0x0A
-
-#define DSI_DCS_SET_ADDR_MODE                   0x36
-#define DSI_DCS_EXIT_SLEEP_MODE                 0x11
-#define DSI_DCS_ENTER_SLEEP_MODE                0x10
-#define DSI_DCS_SET_DISPLAY_ON                  0x29
-#define DSI_DCS_SET_DISPLAY_OFF                 0x28
-#define DSI_DCS_SET_TEARING_EFFECT_OFF          0x34
-#define DSI_DCS_SET_TEARING_EFFECT_ON           0x35
-#define DSI_DCS_NO_OP                           0x0
-#define DSI_NULL_PKT_NO_DATA                    0x9
-#define DSI_BLANKING_PKT_NO_DATA                0x19
-#define DSI_DCS_SET_COMPRESSION_METHOD          0xC0
-
-/* DCS commands for command mode */
-#define DSI_ENTER_PARTIAL_MODE                  0x12
-#define DSI_SET_PIXEL_FORMAT                    0x3A
-#define DSI_AREA_COLOR_MODE                     0x4C
-#define DSI_SET_PARTIAL_AREA                    0x30
-#define DSI_SET_PAGE_ADDRESS                    0x2B
-#define DSI_SET_ADDRESS_MODE                    0x36
-#define DSI_SET_COLUMN_ADDRESS                  0x2A
-#define DSI_WRITE_MEMORY_START                  0x2C
-#define DSI_WRITE_MEMORY_CONTINUE               0x3C
-
-#define PKT_ID0(id)     ((((id) & 0x3f) << 3) | \
-                        (((DSI_ENABLE) & 0x1) << 9))
-#define PKT_LEN0(len)   (((len) & 0x7) << 0)
-#define PKT_ID1(id)     ((((id) & 0x3f) << 13) | \
-                        (((DSI_ENABLE) & 0x1) << 19))
-#define PKT_LEN1(len)   (((len) & 0x7) << 10)
-#define PKT_ID2(id)     ((((id) & 0x3f) << 23) | \
-                        (((DSI_ENABLE) & 0x1) << 29))
-#define PKT_LEN2(len)   (((len) & 0x7) << 20)
-#define PKT_ID3(id)     ((((id) & 0x3f) << 3) | \
-                        (((DSI_ENABLE) & 0x1) << 9))
-#define PKT_LEN3(len)   (((len) & 0x7) << 0)
-#define PKT_ID4(id)     ((((id) & 0x3f) << 13) | \
-                        (((DSI_ENABLE) & 0x1) << 19))
-#define PKT_LEN4(len)   (((len) & 0x7) << 10)
-#define PKT_ID5(id)     ((((id) & 0x3f) << 23) | \
-                        (((DSI_ENABLE) & 0x1) << 29))
-#define PKT_LEN5(len)   (((len) & 0x7) << 20)
-#define PKT_LP          (((DSI_ENABLE) & 0x1) << 30)
-#define NUMOF_PKT_SEQ   12
-
-/* DSI pixel data format, enum values should match with dt-bindings in tegra-panel.h */
-typedef enum
-{
-    DSI_PIXEL_FORMAT_16BIT_P,
-    DSI_PIXEL_FORMAT_18BIT_P,
-    DSI_PIXEL_FORMAT_18BIT_NP,
-    DSI_PIXEL_FORMAT_24BIT_P,
-    DSI_PIXEL_FORMAT_8BIT_DSC,
-    DSI_PIXEL_FORMAT_12BIT_DSC,
-    DSI_PIXEL_FORMAT_16BIT_DSC,
-    DSI_PIXEL_FORMAT_10BIT_DSC,
-    DSI_PIXEL_FORMAT_30BIT_P,
-    DSI_PIXEL_FORMAT_36BIT_P,
-} DSIPIXELFORMAT;
-
-/* DSI virtual channel number */
-typedef enum
-{
-    DSI_VIRTUAL_CHANNEL_0,
-    DSI_VIRTUAL_CHANNEL_1,
-    DSI_VIRTUAL_CHANNEL_2,
-    DSI_VIRTUAL_CHANNEL_3,
-} DSIVIRTUALCHANNEL;
-
-/* DSI transmit method for video data */
-typedef enum
-{
-    DSI_VIDEO_TYPE_VIDEO_MODE,
-    DSI_VIDEO_TYPE_COMMAND_MODE,
-} DSIVIDEODATAMODE;
-
-/* DSI HS clock mode */
-typedef enum
-{
-    DSI_VIDEO_CLOCK_CONTINUOUS,
-    DSI_VIDEO_CLOCK_TX_ONLY,
-} DSICLOCKMODE;
-
-/* DSI burst mode setting in video mode. Each mode is assigned with a
- * fixed value. The rationale behind this is to avoid change of these
- * values, since the calculation of dsi clock depends on them. */
-typedef enum
-{
-    DSI_VIDEO_NON_BURST_MODE = 0,
-    DSI_VIDEO_NON_BURST_MODE_WITH_SYNC_END = 1,
-    DSI_VIDEO_BURST_MODE_LOWEST_SPEED = 2,
-    DSI_VIDEO_BURST_MODE_LOW_SPEED = 3,
-    DSI_VIDEO_BURST_MODE_MEDIUM_SPEED = 4,
-    DSI_VIDEO_BURST_MODE_FAST_SPEED = 5,
-    DSI_VIDEO_BURST_MODE_FASTEST_SPEED = 6,
-} DSIVIDEOBURSTMODE;
-
-/* DSI Ganged Mode */
-typedef enum
-{
-    DSI_GANGED_SYMMETRIC_LEFT_RIGHT = 1,
-    DSI_GANGED_SYMMETRIC_EVEN_ODD = 2,
-    DSI_GANGED_SYMMETRIC_LEFT_RIGHT_OVERLAP = 3,
-} DSIGANGEDTYPE;
-
-typedef enum
-{
-    DSI_LINK0,
-    DSI_LINK1,
-} DSILINKNUM;
-
-/* DSI Command Packet type */
-typedef enum
-{
-    DSI_PACKET_CMD,
-    DSI_DELAY_MS,
-    DSI_GPIO_SET,
-    DSI_SEND_FRAME,
-    DSI_PACKET_VIDEO_VBLANK_CMD,
-    DSI_DELAY_US,
-} DSICMDPKTTYPE;
-
-/* DSI Phy type */
-typedef enum
-{
-    DSI_DPHY,
-    DSI_CPHY,
-} DSIPHYTYPE;
-
-enum {
-    DSI_GPIO_LCD_RESET,
-    DSI_GPIO_PANEL_EN,
-    DSI_GPIO_PANEL_EN_1,
-    DSI_GPIO_BL_ENABLE,
-    DSI_GPIO_BL_PWM,
-    DSI_GPIO_AVDD_AVEE_EN,
-    DSI_GPIO_VDD_1V8_LCD_EN,
-    DSI_GPIO_TE,
-    DSI_GPIO_BRIDGE_EN_0,
-    DSI_GPIO_BRIDGE_EN_1,
-    DSI_GPIO_BRIDGE_REFCLK_EN,
-    DSI_N_GPIO_PANEL, /* add new gpio above this entry */
-};
-
-enum
-{
-    DSI_DISABLE,
-    DSI_ENABLE,
-};
-
-
-typedef struct
-{
-    NvU8      cmd_type;
-    NvU8      data_id;
-    union
-    {
-        NvU16 data_len;
-        NvU16 delay_ms;
-        NvU16 delay_us;
-        NvU32 gpio;
-        NvU16 frame_cnt;
-        struct
-        {
-            NvU8 data0;
-            NvU8 data1;
-        } sp;
-    } sp_len_dly;
-    NvU32      *pdata;
-    NvU8      link_id;
-    NvBool    club_cmd;
-} DSI_CMD, *PDSICMD;
-
-typedef struct
-{
-    NvU16             t_hsdexit_ns;
-    NvU16             t_hstrail_ns;
-    NvU16             t_datzero_ns;
-    NvU16             t_hsprepare_ns;
-    NvU16             t_hsprebegin_ns;
-    NvU16             t_hspost_ns;
-
-    NvU16             t_clktrail_ns;
-    NvU16             t_clkpost_ns;
-    NvU16             t_clkzero_ns;
-    NvU16             t_tlpx_ns;
-
-    NvU16             t_clkprepare_ns;
-    NvU16             t_clkpre_ns;
-    NvU16             t_wakeup_ns;
-
-    NvU16             t_taget_ns;
-    NvU16             t_tasure_ns;
-    NvU16             t_tago_ns;
-} DSI_PHY_TIMING_IN_NS;
-
-typedef struct
-{
-    NvU32 hActive;
-    NvU32 vActive;
-    NvU32 hFrontPorch;
-    NvU32 vFrontPorch;
-    NvU32 hBackPorch;
-    NvU32 vBackPorch;
-    NvU32 hSyncWidth;
-    NvU32 vSyncWidth;
-    NvU32 hPulsePolarity;
-    NvU32 vPulsePolarity;
-    NvU32 pixelClkRate;
-} DSITIMINGS, *PDSITIMINGS;
-
-typedef struct
-{
-    NvU8              n_data_lanes;                   /* required */
-    NvU8              pixel_format;                   /* required */
-    NvU8              refresh_rate;                   /* required */
-    NvU8              rated_refresh_rate;
-    NvU8              panel_reset;                    /* required */
-    NvU8              virtual_channel;                /* required */
-    NvU8              dsi_instance;
-    NvU16             dsi_panel_rst_gpio;
-    NvU16             dsi_panel_bl_en_gpio;
-    NvU16             dsi_panel_bl_pwm_gpio;
-    NvU16             even_odd_split_width;
-    NvU8              controller_vs;
-
-    NvBool            panel_has_frame_buffer; /* required*/
-
-    /* Deprecated. Use DSI_SEND_FRAME panel command instead. */
-    NvBool            panel_send_dc_frames;
-
-    DSI_CMD           *dsi_init_cmd;          /* required */
-    NvU16             n_init_cmd;             /* required */
-    NvU32             *dsi_init_cmd_array;
-    NvU32             init_cmd_array_size;
-    NvBool            sendInitCmdsEarly;
-
-    DSI_CMD           *dsi_early_suspend_cmd;
-    NvU16             n_early_suspend_cmd;
-    NvU32             *dsi_early_suspend_cmd_array;
-    NvU32             early_suspend_cmd_array_size;
-
-    DSI_CMD           *dsi_late_resume_cmd;
-    NvU16             n_late_resume_cmd;
-    NvU32             *dsi_late_resume_cmd_array;
-    NvU32             late_resume_cmd_array_size;
-
-    DSI_CMD           *dsi_postvideo_cmd;
-    NvU16             n_postvideo_cmd;
-    NvU32             *dsi_postvideo_cmd_array;
-    NvU32             postvideo_cmd_array_size;
-
-    DSI_CMD           *dsi_suspend_cmd;               /* required */
-    NvU16             n_suspend_cmd;                  /* required */
-    NvU32             *dsi_suspend_cmd_array;
-    NvU32             suspend_cmd_array_size;
-
-    NvU8              video_data_type;                /* required */
-    NvU8              video_clock_mode;
-    NvU8              video_burst_mode;
-    NvU8              ganged_type;
-    NvU16             ganged_overlap;
-    NvBool            ganged_swap_links;
-    NvBool            ganged_write_to_all_links;
-    NvU8              split_link_type;
-
-    NvU8              suspend_aggr;
-
-    NvU16             panel_buffer_size_byte;
-    NvU16             panel_reset_timeout_msec;
-
-    NvBool            hs_cmd_mode_supported;
-    NvBool            hs_cmd_mode_on_blank_supported;
-    NvBool            enable_hs_clock_on_lp_cmd_mode;
-    NvBool            no_pkt_seq_eot; /* 1st generation panel may not
-                                       * support eot. Don't set it for
-                                       * most panels.*/
-    const NvU32       *pktSeq;
-    NvU32             *pktSeq_array;
-    NvU32             pktSeq_array_size;
-    NvBool            skip_dsi_pkt_header;
-    NvBool            power_saving_suspend;
-    NvBool            suspend_stop_stream_late;
-    NvBool            dsi2lvds_bridge_enable;
-    NvBool            dsi2edp_bridge_enable;
-
-    NvU32             max_panel_freq_khz;
-    NvU32             lp_cmd_mode_freq_khz;
-    NvU32             lp_read_cmd_mode_freq_khz;
-    NvU32             hs_clk_in_lp_cmd_mode_freq_khz;
-    NvU32             burst_mode_freq_khz;
-    NvU32             fpga_freq_khz;
-
-    NvU32             te_gpio;
-    NvBool            te_polarity_low;
-    NvBool            dsiEnVRR;
-    NvBool            dsiVrrPanelSupportsTe;
-    NvBool            dsiForceSetTePin;
-
-    int               panel_gpio[DSI_N_GPIO_PANEL];
-    NvBool            panel_gpio_populated;
-
-    NvU32             dpd_dsi_pads;
-
-    DSI_PHY_TIMING_IN_NS phyTimingNs;
-
-    NvU8              *bl_name;
-
-    NvBool            lp00_pre_panel_wakeup;
-    NvBool            ulpm_not_supported;
-    NvBool            use_video_host_fifo_for_cmd;
-    NvBool            dsi_csi_loopback;
-    NvBool            set_max_timeout;
-    NvBool            use_legacy_dphy_core;
-    // Swap P/N pins polarity of all data lanes
-    NvBool            swap_data_lane_polarity;
-    // Swap P/N pins polarity of clock lane
-    NvBool            swap_clock_lane_polarity;
-    // Reverse clock polarity for partition A/B. 1st SOT bit goes on negedge of Clock lane
-    NvBool            reverse_clock_polarity;
-    // DSI Lane Crossbar. Allocating xbar array for max number of lanes
-    NvBool            lane_xbar_exists;
-    NvU32             lane_xbar_ctrl[8];
-    NvU32             refresh_rate_adj;
-
-    NvU8              dsiPhyType;
-    NvBool            en_data_scrambling;
-
-    NvU32             dsipll_vco_rate_hz;
-    NvU32             dsipll_clkoutpn_rate_hz;
-    NvU32             dsipll_clkouta_rate_hz;
-    NvU32             vpll0_rate_hz;
-
-    DSITIMINGS        dsiTimings;
-
-    // DSC Parameters
-    NvBool            dsiDscEnable;
-    NvU32             dsiDscBpp;
-    NvU32             dsiDscNumSlices;
-    NvU32             dsiDscSliceWidth;
-    NvU32             dsiDscSliceHeight;
-    NvBool            dsiDscEnBlockPrediction;
-    NvBool            dsiDscEnDualDsc;
-    NvU32             dsiDscDecoderMajorVersion;
-    NvU32             dsiDscDecoderMinorVersion;
-    NvBool            dsiDscUseCustomPPS;
-    NvU32             dsiDscCustomPPSData[32];
-
-    // Driver allocates memory for PPS cmd to be sent to Panel
-    NvBool            ppsCmdMemAllocated;
-} DSI_PANEL_INFO;
-
-#endif
--- a/kernel-open/common/inc/os_gpio.h
+++ b/kernel-open/common/inc/os_gpio.h
@@ -1,34 +0,0 @@
-/*
- * SPDX-FileCopyrightText: Copyright (c) 2020 - 2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-#ifndef _OS_GPIO_H_
-#define _OS_GPIO_H_
-
-typedef enum
-{
-    NV_OS_GPIO_FUNC_HOTPLUG_A,
-    NV_OS_GPIO_FUNC_HOTPLUG_B,
-    NV_OS_GPIO_FUNC_HOTPLUG_C,
-    NV_OS_GPIO_FUNC_HOTPLUG_D,
-} NV_OS_GPIO_FUNC_NAMES;
-
-#endif
--- a/kernel-open/common/inc/rm-gpu-ops.h
+++ b/kernel-open/common/inc/rm-gpu-ops.h
@@ -1,5 +1,5 @@
 /*
- * SPDX-FileCopyrightText: Copyright (c) 1999-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
+ * SPDX-FileCopyrightText: Copyright (c) 1999-2021 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
 * SPDX-License-Identifier: MIT
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
@@ -37,7 +37,7 @@ NV_STATUS  NV_API_CALL  rm_gpu_ops_create_session (nvidia_stack_t *, nvgpuSessio
 NV_STATUS  NV_API_CALL  rm_gpu_ops_destroy_session (nvidia_stack_t *, nvgpuSessionHandle_t);
 NV_STATUS  NV_API_CALL  rm_gpu_ops_device_create (nvidia_stack_t *, nvgpuSessionHandle_t, const nvgpuInfo_t *, const NvProcessorUuid *, nvgpuDeviceHandle_t *, NvBool);
 NV_STATUS  NV_API_CALL  rm_gpu_ops_device_destroy (nvidia_stack_t *, nvgpuDeviceHandle_t);
-NV_STATUS  NV_API_CALL  rm_gpu_ops_address_space_create(nvidia_stack_t *, nvgpuDeviceHandle_t, unsigned long long, unsigned long long, NvBool, nvgpuAddressSpaceHandle_t *, nvgpuAddressSpaceInfo_t);
+NV_STATUS  NV_API_CALL  rm_gpu_ops_address_space_create(nvidia_stack_t *, nvgpuDeviceHandle_t, unsigned long long, unsigned long long, nvgpuAddressSpaceHandle_t *, nvgpuAddressSpaceInfo_t);
 NV_STATUS  NV_API_CALL  rm_gpu_ops_dup_address_space(nvidia_stack_t *, nvgpuDeviceHandle_t, NvHandle, NvHandle, nvgpuAddressSpaceHandle_t *, nvgpuAddressSpaceInfo_t);
 NV_STATUS  NV_API_CALL  rm_gpu_ops_address_space_destroy(nvidia_stack_t *, nvgpuAddressSpaceHandle_t);
 NV_STATUS  NV_API_CALL  rm_gpu_ops_memory_alloc_fb(nvidia_stack_t *, nvgpuAddressSpaceHandle_t, NvLength, NvU64 *, nvgpuAllocInfo_t);
@@ -45,6 +45,7 @@ NV_STATUS  NV_API_CALL  rm_gpu_ops_memory_alloc_fb(nvidia_stack_t *, nvgpuAddres
 NV_STATUS  NV_API_CALL  rm_gpu_ops_pma_alloc_pages(nvidia_stack_t *, void *, NvLength, NvU32 , nvgpuPmaAllocationOptions_t, NvU64 *);
 NV_STATUS  NV_API_CALL  rm_gpu_ops_pma_free_pages(nvidia_stack_t *, void *, NvU64 *, NvLength , NvU32, NvU32);
 NV_STATUS  NV_API_CALL  rm_gpu_ops_pma_pin_pages(nvidia_stack_t *, void *, NvU64 *, NvLength , NvU32, NvU32);
+NV_STATUS  NV_API_CALL  rm_gpu_ops_pma_unpin_pages(nvidia_stack_t *, void *, NvU64 *, NvLength , NvU32);
 NV_STATUS  NV_API_CALL  rm_gpu_ops_get_pma_object(nvidia_stack_t *, nvgpuDeviceHandle_t, void **, const nvgpuPmaStatistics_t *);
 NV_STATUS  NV_API_CALL  rm_gpu_ops_pma_register_callbacks(nvidia_stack_t *sp, void *, nvPmaEvictPagesCallback, nvPmaEvictRangeCallback, void *);
 void       NV_API_CALL  rm_gpu_ops_pma_unregister_callbacks(nvidia_stack_t *sp, void *);
@@ -55,16 +56,14 @@ NV_STATUS  NV_API_CALL  rm_gpu_ops_get_p2p_caps(nvidia_stack_t *, nvgpuDeviceHan

 NV_STATUS  NV_API_CALL  rm_gpu_ops_memory_cpu_map(nvidia_stack_t *, nvgpuAddressSpaceHandle_t, NvU64, NvLength, void **, NvU32);
 NV_STATUS  NV_API_CALL  rm_gpu_ops_memory_cpu_ummap(nvidia_stack_t *, nvgpuAddressSpaceHandle_t, void*);
-NV_STATUS  NV_API_CALL  rm_gpu_ops_tsg_allocate(nvidia_stack_t *, nvgpuAddressSpaceHandle_t, const nvgpuTsgAllocParams_t *, nvgpuTsgHandle_t *);
-NV_STATUS  NV_API_CALL  rm_gpu_ops_tsg_destroy(nvidia_stack_t *, nvgpuTsgHandle_t);
-NV_STATUS  NV_API_CALL  rm_gpu_ops_channel_allocate(nvidia_stack_t *, const nvgpuTsgHandle_t, const nvgpuChannelAllocParams_t *, nvgpuChannelHandle_t *, nvgpuChannelInfo_t);
+NV_STATUS  NV_API_CALL  rm_gpu_ops_channel_allocate(nvidia_stack_t *, nvgpuAddressSpaceHandle_t, const nvgpuChannelAllocParams_t *, nvgpuChannelHandle_t *, nvgpuChannelInfo_t);
 NV_STATUS  NV_API_CALL  rm_gpu_ops_channel_destroy(nvidia_stack_t *, nvgpuChannelHandle_t);
 NV_STATUS  NV_API_CALL rm_gpu_ops_memory_free(nvidia_stack_t *, nvgpuAddressSpaceHandle_t, NvU64);
 NV_STATUS  NV_API_CALL rm_gpu_ops_query_caps(nvidia_stack_t *, nvgpuDeviceHandle_t, nvgpuCaps_t);
 NV_STATUS  NV_API_CALL rm_gpu_ops_query_ces_caps(nvidia_stack_t *sp, nvgpuDeviceHandle_t, nvgpuCesCaps_t);
 NV_STATUS  NV_API_CALL rm_gpu_ops_get_gpu_info(nvidia_stack_t *, const NvProcessorUuid *pUuid, const nvgpuClientInfo_t *, nvgpuInfo_t *);
 NV_STATUS  NV_API_CALL rm_gpu_ops_service_device_interrupts_rm(nvidia_stack_t *, nvgpuDeviceHandle_t);
-NV_STATUS  NV_API_CALL rm_gpu_ops_dup_allocation(nvidia_stack_t *, nvgpuAddressSpaceHandle_t, NvU64, nvgpuAddressSpaceHandle_t, NvU64, NvU64 *);
+NV_STATUS  NV_API_CALL rm_gpu_ops_dup_allocation(nvidia_stack_t *, nvgpuAddressSpaceHandle_t, NvU64, nvgpuAddressSpaceHandle_t, NvU64 *);

 NV_STATUS  NV_API_CALL  rm_gpu_ops_dup_memory (nvidia_stack_t *, nvgpuDeviceHandle_t, NvHandle, NvHandle, NvHandle *, nvgpuMemoryInfo_t);

@@ -75,21 +74,17 @@ NV_STATUS NV_API_CALL rm_gpu_ops_own_page_fault_intr(nvidia_stack_t *, nvgpuDevi
 NV_STATUS  NV_API_CALL rm_gpu_ops_init_fault_info(nvidia_stack_t *, nvgpuDeviceHandle_t, nvgpuFaultInfo_t);
 NV_STATUS  NV_API_CALL rm_gpu_ops_destroy_fault_info(nvidia_stack_t *, nvgpuDeviceHandle_t, nvgpuFaultInfo_t);
 NV_STATUS  NV_API_CALL rm_gpu_ops_get_non_replayable_faults(nvidia_stack_t *, nvgpuFaultInfo_t, void *, NvU32 *);
-NV_STATUS  NV_API_CALL rm_gpu_ops_flush_replayable_fault_buffer(nvidia_stack_t *, nvgpuFaultInfo_t, NvBool);
-NV_STATUS  NV_API_CALL rm_gpu_ops_toggle_prefetch_faults(nvidia_stack_t *, nvgpuFaultInfo_t, NvBool);
 NV_STATUS  NV_API_CALL rm_gpu_ops_has_pending_non_replayable_faults(nvidia_stack_t *, nvgpuFaultInfo_t, NvBool *);
-NV_STATUS  NV_API_CALL rm_gpu_ops_init_access_cntr_info(nvidia_stack_t *, nvgpuDeviceHandle_t, nvgpuAccessCntrInfo_t, NvU32);
+NV_STATUS  NV_API_CALL rm_gpu_ops_init_access_cntr_info(nvidia_stack_t *, nvgpuDeviceHandle_t, nvgpuAccessCntrInfo_t);
 NV_STATUS  NV_API_CALL rm_gpu_ops_destroy_access_cntr_info(nvidia_stack_t *, nvgpuDeviceHandle_t, nvgpuAccessCntrInfo_t);
 NV_STATUS  NV_API_CALL rm_gpu_ops_own_access_cntr_intr(nvidia_stack_t *, nvgpuSessionHandle_t, nvgpuAccessCntrInfo_t, NvBool);
-NV_STATUS  NV_API_CALL rm_gpu_ops_enable_access_cntr(nvidia_stack_t *, nvgpuDeviceHandle_t, nvgpuAccessCntrInfo_t, const nvgpuAccessCntrConfig_t *);
+NV_STATUS  NV_API_CALL rm_gpu_ops_enable_access_cntr(nvidia_stack_t *, nvgpuDeviceHandle_t, nvgpuAccessCntrInfo_t, nvgpuAccessCntrConfig_t);
 NV_STATUS  NV_API_CALL rm_gpu_ops_disable_access_cntr(nvidia_stack_t *, nvgpuDeviceHandle_t, nvgpuAccessCntrInfo_t);
-NV_STATUS  NV_API_CALL  rm_gpu_ops_set_page_directory (nvidia_stack_t *, nvgpuAddressSpaceHandle_t, NvU64, unsigned, NvBool, NvU32, NvU64 *);
+NV_STATUS  NV_API_CALL  rm_gpu_ops_set_page_directory (nvidia_stack_t *, nvgpuAddressSpaceHandle_t, NvU64, unsigned, NvBool, NvU32);
 NV_STATUS  NV_API_CALL  rm_gpu_ops_unset_page_directory (nvidia_stack_t *, nvgpuAddressSpaceHandle_t);
-NV_STATUS  NV_API_CALL rm_gpu_ops_get_nvlink_info(nvidia_stack_t *, nvgpuDeviceHandle_t, nvgpuNvlinkInfo_t);
 NV_STATUS  NV_API_CALL rm_gpu_ops_p2p_object_create(nvidia_stack_t *, nvgpuDeviceHandle_t, nvgpuDeviceHandle_t, NvHandle *);
 void       NV_API_CALL rm_gpu_ops_p2p_object_destroy(nvidia_stack_t *, nvgpuSessionHandle_t, NvHandle);
 NV_STATUS  NV_API_CALL rm_gpu_ops_get_external_alloc_ptes(nvidia_stack_t*, nvgpuAddressSpaceHandle_t, NvHandle, NvU64, NvU64, nvgpuExternalMappingInfo_t);
-NV_STATUS  NV_API_CALL rm_gpu_ops_get_external_alloc_phys_addrs(nvidia_stack_t*, nvgpuAddressSpaceHandle_t, NvHandle, NvU64, NvU64, nvgpuExternalPhysAddrInfo_t);
 NV_STATUS  NV_API_CALL rm_gpu_ops_retain_channel(nvidia_stack_t *, nvgpuAddressSpaceHandle_t, NvHandle, NvHandle, void **, nvgpuChannelInstanceInfo_t);
 NV_STATUS  NV_API_CALL rm_gpu_ops_bind_channel_resources(nvidia_stack_t *, void *, nvgpuChannelResourceBindParams_t);
 void       NV_API_CALL rm_gpu_ops_release_channel(nvidia_stack_t *, void *);
@@ -102,18 +97,14 @@ void       NV_API_CALL rm_gpu_ops_paging_channel_destroy(nvidia_stack_t *, nvgpu
 NV_STATUS  NV_API_CALL rm_gpu_ops_paging_channels_map(nvidia_stack_t *, nvgpuAddressSpaceHandle_t, NvU64, nvgpuDeviceHandle_t, NvU64 *);
 void       NV_API_CALL rm_gpu_ops_paging_channels_unmap(nvidia_stack_t *, nvgpuAddressSpaceHandle_t, NvU64, nvgpuDeviceHandle_t);
 NV_STATUS  NV_API_CALL rm_gpu_ops_paging_channel_push_stream(nvidia_stack_t *, nvgpuPagingChannelHandle_t, char *, NvU32);
-void       NV_API_CALL rm_gpu_ops_report_fatal_error(nvidia_stack_t *, NV_STATUS error);

-NV_STATUS  NV_API_CALL rm_gpu_ops_ccsl_context_init(nvidia_stack_t *, struct ccslContext_t **, nvgpuChannelHandle_t);
-NV_STATUS  NV_API_CALL rm_gpu_ops_ccsl_context_clear(nvidia_stack_t *, struct ccslContext_t *);
-NV_STATUS  NV_API_CALL rm_gpu_ops_ccsl_rotate_key(nvidia_stack_t *, UvmCslContext *[], NvU32);
-NV_STATUS  NV_API_CALL rm_gpu_ops_ccsl_rotate_iv(nvidia_stack_t *, struct ccslContext_t *, NvU8);
-NV_STATUS  NV_API_CALL rm_gpu_ops_ccsl_encrypt(nvidia_stack_t *, struct ccslContext_t *, NvU32, NvU8 const *, NvU8 *, NvU8 *);
-NV_STATUS  NV_API_CALL rm_gpu_ops_ccsl_encrypt_with_iv(nvidia_stack_t *, struct ccslContext_t *, NvU32, NvU8 const *, NvU8*, NvU8 *, NvU8 *);
-NV_STATUS  NV_API_CALL rm_gpu_ops_ccsl_decrypt(nvidia_stack_t *, struct ccslContext_t *, NvU32, NvU8 const *, NvU8 const *, NvU32, NvU8 *, NvU8 const *, NvU32, NvU8 const *);
-NV_STATUS  NV_API_CALL rm_gpu_ops_ccsl_sign(nvidia_stack_t *, struct ccslContext_t *, NvU32, NvU8 const *, NvU8 *);
-NV_STATUS  NV_API_CALL rm_gpu_ops_ccsl_query_message_pool(nvidia_stack_t *, struct ccslContext_t *, NvU8, NvU64 *);
-NV_STATUS  NV_API_CALL rm_gpu_ops_ccsl_increment_iv(nvidia_stack_t *, struct ccslContext_t *, NvU8, NvU64, NvU8 *);
-NV_STATUS  NV_API_CALL rm_gpu_ops_ccsl_log_encryption(nvidia_stack_t *, struct ccslContext_t *, NvU8, NvU32);
+
+
+
+
+
+
+
+

 #endif
--- a/kernel-open/common/inc/rs_access.h
+++ b/kernel-open/common/inc/rs_access.h
@@ -1,276 +0,0 @@
-/*
- * SPDX-FileCopyrightText: Copyright (c) 2019-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-#pragma once
-
-#include <nvtypes.h>
-#if defined(_MSC_VER)
-#pragma warning(disable:4324)
-#endif
-
-//
-// This file was generated with FINN, an NVIDIA coding tool.
-// Source file:      rs_access.finn
-//
-
-
-
-
-#include "nvtypes.h"
-#include "nvmisc.h"
-
-
-/****************************************************************************/
-/*                       Access right definitions                           */
-/****************************************************************************/
-
-//
-// The meaning of each access right is documented in
-//   resman/docs/rmapi/resource_server/rm_capabilities.adoc
-//
-// RS_ACCESS_COUNT is the number of access rights that have been defined
-// and are in use. All integers in the range [0, RS_ACCESS_COUNT) should
-// represent valid access rights.
-//
-// When adding a new access right, don't forget to update
-//   1) The descriptions in the resman/docs/rmapi/resource_server/rm_capabilities.adoc
-//   2) RS_ACCESS_COUNT, defined below
-//   3) The declaration of g_rsAccessMetadata in rs_access_rights.c
-//   4) The list of access rights in drivers/common/chip-config/Chipcontrols.pm
-//   5) Any relevant access right callbacks
-//
-
-#define RS_ACCESS_DUP_OBJECT 0U
-#define RS_ACCESS_NICE       1U
-#define RS_ACCESS_DEBUG      2U
-#define RS_ACCESS_PERFMON    3U
-#define RS_ACCESS_COUNT      4U
-
-
-/****************************************************************************/
-/*                     Access right data structures                         */
-/****************************************************************************/
-
-/*!
- * @brief A type that can be used to represent any access right.
- */
-typedef NvU16 RsAccessRight;
-
-/*!
- * @brief An internal type used to represent one limb in an access right mask.
- */
-typedef NvU32 RsAccessLimb;
-#define SDK_RS_ACCESS_LIMB_BITS 32
-
-/*!
- * @brief The number of limbs in the RS_ACCESS_MASK struct.
- */
-#define SDK_RS_ACCESS_MAX_LIMBS 1
-
-/*!
- * @brief The maximum number of possible access rights supported by the
- *        current data structure definition.
- *
- * You probably want RS_ACCESS_COUNT instead, which is the number of actual
- * access rights defined.
- */
-#define SDK_RS_ACCESS_MAX_COUNT (0x20) /* finn: Evaluated from "(SDK_RS_ACCESS_LIMB_BITS * SDK_RS_ACCESS_MAX_LIMBS)" */
-
-/**
- * @brief A struct representing a set of access rights.
- *
- * Note that the values of bit positions larger than RS_ACCESS_COUNT is
- * undefined, and should not be assumed to be 0 (see RS_ACCESS_MASK_FILL).
- */
-typedef struct RS_ACCESS_MASK {
-    RsAccessLimb limbs[SDK_RS_ACCESS_MAX_LIMBS];
-} RS_ACCESS_MASK;
-
-/**
- * @brief A struct representing auxiliary information about each access right.
- */
-typedef struct RS_ACCESS_INFO {
-    NvU32 flags;
-} RS_ACCESS_INFO;
-
-
-/****************************************************************************/
-/*                           Access right macros                            */
-/****************************************************************************/
-
-#define SDK_RS_ACCESS_LIMB_INDEX(index) ((index) / SDK_RS_ACCESS_LIMB_BITS)
-#define SDK_RS_ACCESS_LIMB_POS(index)   ((index) % SDK_RS_ACCESS_LIMB_BITS)
-
-#define SDK_RS_ACCESS_LIMB_ELT(pAccessMask, index) \
-    ((pAccessMask)->limbs[SDK_RS_ACCESS_LIMB_INDEX(index)])
-#define SDK_RS_ACCESS_OFFSET_MASK(index) \
-    NVBIT_TYPE(SDK_RS_ACCESS_LIMB_POS(index), RsAccessLimb)
-
-/*!
- * @brief Checks that accessRight represents a valid access right.
- *
- * The valid range of access rights is [0, RS_ACCESS_COUNT).
- *
- * @param[in] accessRight The access right value to check
- *
- * @return true if accessRight is valid
- * @return false otherwise
- */
-#define RS_ACCESS_BOUNDS_CHECK(accessRight) \
-    (accessRight < RS_ACCESS_COUNT)
-
-/*!
- * @brief Test whether an access right is present in a set
- *
- * @param[in] pAccessMask The set of access rights to read
- * @param[in] index The access right to examine
- *
- * @return NV_TRUE if the access right specified by index was present in the set,
- *         and NV_FALSE otherwise
- */
-#define RS_ACCESS_MASK_TEST(pAccessMask, index) \
-    (RS_ACCESS_BOUNDS_CHECK(index) && \
-        (SDK_RS_ACCESS_LIMB_ELT(pAccessMask, index) & SDK_RS_ACCESS_OFFSET_MASK(index)) != 0)
-
-/*!
- * @brief Add an access right to a mask
- *
- * @param[in] pAccessMask The set of access rights to modify
- * @param[in] index The access right to set
- */
-#define RS_ACCESS_MASK_ADD(pAccessMask, index) \
-    do \
-    { \
-        if (RS_ACCESS_BOUNDS_CHECK(index)) { \
-            SDK_RS_ACCESS_LIMB_ELT(pAccessMask, index) |= SDK_RS_ACCESS_OFFSET_MASK(index); \
-        } \
-    } while (NV_FALSE)
-
-/*!
- * @brief Remove an access right from a mask
- *
- * @param[in] pAccessMask The set of access rights to modify
- * @param[in] index The access right to unset
- */
-#define RS_ACCESS_MASK_REMOVE(pAccessMask, index) \
-    do \
-    { \
-        if (RS_ACCESS_BOUNDS_CHECK(index)) { \
-            SDK_RS_ACCESS_LIMB_ELT(pAccessMask, index) &= ~SDK_RS_ACCESS_OFFSET_MASK(index); \
-        } \
-    } while (NV_FALSE)
-
-/*!
- * @brief Performs an in-place union between two access right masks
- *
- * @param[in,out] pMaskOut The access rights mask to be updated
- * @param[in] pMaskIn The set of access rights to be added to pMaskOut
- */
-#define RS_ACCESS_MASK_UNION(pMaskOut, pMaskIn) \
-    do \
-    { \
-        NvLength limb; \
-        for (limb = 0; limb < SDK_RS_ACCESS_MAX_LIMBS; limb++) \
-        { \
-            SDK_RS_ACCESS_LIMB_ELT(pMaskOut, limb) |= SDK_RS_ACCESS_LIMB_ELT(pMaskIn, limb); \
-        } \
-    } while (NV_FALSE)
-
-/*!
- * @brief Performs an in-place subtract of one mask's rights from another
- *
- * @param[in,out] pMaskOut The access rights mask to be updated
- * @param[in] pMaskIn The set of access rights to be removed from pMaskOut
- */
-#define RS_ACCESS_MASK_SUBTRACT(pMaskOut, pMaskIn) \
-    do \
-    { \
-        NvLength limb; \
-        for (limb = 0; limb < SDK_RS_ACCESS_MAX_LIMBS; limb++) \
-        { \
-            SDK_RS_ACCESS_LIMB_ELT(pMaskOut, limb) &= ~SDK_RS_ACCESS_LIMB_ELT(pMaskIn, limb); \
-        } \
-    } while (NV_FALSE)
-
-/*!
- * @brief Removes all rights from an access rights mask
- *
- * @param[in,out] pAccessMask The access rights mask to be updated
- */
-#define RS_ACCESS_MASK_CLEAR(pAccessMask) \
-    do \
-    { \
-        portMemSet(pAccessMask, 0, sizeof(*pAccessMask)); \
-    } while (NV_FALSE)
-
-/*!
- * @brief Adds all rights to an access rights mask
- *
- * @param[in,out] pAccessMask The access rights mask to be updated
- */
-#define RS_ACCESS_MASK_FILL(pAccessMask) \
-    do \
-    { \
-        portMemSet(pAccessMask, 0xff, sizeof(*pAccessMask)); \
-    } while (NV_FALSE)
-
-
-/****************************************************************************/
-/*                           Share definitions                              */
-/****************************************************************************/
-
-//
-// The usage of Share Policy and the meaning of each share type is documented in
-//   resman/docs/rmapi/resource_server/rm_capabilities.adoc
-//
-#define RS_SHARE_TYPE_NONE              (0U)
-#define RS_SHARE_TYPE_ALL               (1U)
-#define RS_SHARE_TYPE_OS_SECURITY_TOKEN (2U)
-#define RS_SHARE_TYPE_CLIENT            (3U)
-#define RS_SHARE_TYPE_PID               (4U)
-#define RS_SHARE_TYPE_SMC_PARTITION     (5U)
-#define RS_SHARE_TYPE_GPU               (6U)
-#define RS_SHARE_TYPE_FM_CLIENT         (7U)
-// Must be last. Update when a new SHARE_TYPE is added
-#define RS_SHARE_TYPE_MAX               (8U)
-
-
-//
-// Use Revoke to remove an existing policy from the list.
-// Allow is based on OR logic, Require is based on AND logic.
-// To share a right, at least one Allow (non-Require) must match, and all Require must pass.
-// If Compose is specified, policies will be added to the list. Otherwise, they will replace the list.
-//
-#define RS_SHARE_ACTION_FLAG_REVOKE      NVBIT(0)
-#define RS_SHARE_ACTION_FLAG_REQUIRE     NVBIT(1)
-#define RS_SHARE_ACTION_FLAG_COMPOSE     NVBIT(2)
-
-/****************************************************************************/
-/*                       Share flag data structures                         */
-/****************************************************************************/
-
-typedef struct RS_SHARE_POLICY {
-    NvU32          target;
-    RS_ACCESS_MASK accessMask;
-    NvU16          type;                         ///< RS_SHARE_TYPE_
-    NvU8           action;                        ///< RS_SHARE_ACTION_
-} RS_SHARE_POLICY;
--- a/kernel-open/conftest.sh
+++ b/kernel-open/conftest.sh
--- a/kernel-open/count-lines.mk
+++ b/kernel-open/count-lines.mk
@@ -1,25 +0,0 @@
-count:
-	@echo "conftests:$(words $(ALL_CONFTESTS))" \
-		  "objects:$(words $(NV_OBJECTS_DEPEND_ON_CONFTEST))" \
-		  "modules:$(words $(NV_KERNEL_MODULES))"
-
-.PHONY: count
-
-# Include the top-level makefile to get $(NV_KERNEL_MODULES)
-include Makefile
-
-# Set $(src) for the to-be-included nvidia*.Kbuild files
-src := $(CURDIR)
-
-# Include nvidia*.Kbuild and append the nvidia*-y objects to ALL_OBJECTS
-$(foreach _module, $(NV_KERNEL_MODULES),          \
-     $(eval include $(_module)/$(_module).Kbuild) \
- )
-
-# Concatenate all of the conftest lists; use $(sort ) to remove duplicates
-ALL_CONFTESTS := $(sort $(NV_CONFTEST_FUNCTION_COMPILE_TESTS) \
-                        $(NV_CONFTEST_GENERIC_COMPILE_TESTS)  \
-                        $(NV_CONFTEST_MACRO_COMPILE_TESTS)    \
-                        $(NV_CONFTEST_SYMBOL_COMPILE_TESTS)   \
-                        $(NV_CONFTEST_TYPE_COMPILE_TESTS)     \
-                  )
--- a/kernel-open/header-presence-tests.mk
+++ b/kernel-open/header-presence-tests.mk
@@ -1,43 +0,0 @@
-# Each of these headers is checked for presence with a test #include; a
-# corresponding #define will be generated in conftest/headers.h.
-NV_HEADER_PRESENCE_TESTS = \
-  asm/system.h \
-  drm/drmP.h \
-  drm/drm_aperture.h \
-  drm/drm_atomic_state_helper.h \
-  drm/drm_atomic_uapi.h \
-  drm/drm_fbdev_generic.h \
-  drm/drm_fbdev_ttm.h \
-  drm/drm_client_setup.h \
-  drm/drm_probe_helper.h \
-  drm/clients/drm_client_setup.h \
-  dt-bindings/interconnect/tegra_icc_id.h \
-  generated/autoconf.h \
-  generated/compile.h \
-  generated/utsrelease.h \
-  linux/pfn_t.h \
-  linux/aperture.h \
-  linux/dma-direct.h \
-  linux/platform/tegra/mc_utils.h \
-  xen/ioemu.h \
-  linux/fence.h \
-  linux/dma-resv.h \
-  soc/tegra/tegra_bpmp.h \
-  linux/platform/tegra/dce/dce-client-ipc.h \
-  linux/nvhost.h \
-  linux/nvhost_t194.h \
-  linux/host1x-next.h \
-  asm/set_memory.h \
-  asm/pgtable_types.h \
-  linux/dma-map-ops.h \
-  sound/hda_codec.h \
-  linux/interconnect.h \
-  linux/ioasid.h \
-  linux/stdarg.h \
-  linux/iosys-map.h \
-  linux/vfio_pci_core.h \
-  linux/cc_platform.h \
-  linux/slub_def.h \
-  asm/mshyperv.h \
-  crypto/sig.h
-
--- a/kernel-open/nvidia-drm/nv-kthread-q.c
+++ b/kernel-open/nvidia-drm/nv-kthread-q.c
@@ -1,329 +0,0 @@
-/*
- * SPDX-FileCopyrightText: Copyright (c) 2016-2024 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include "nv-kthread-q.h"
-#include "nv-list-helpers.h"
-
-#include <linux/kthread.h>
-#include <linux/interrupt.h>
-#include <linux/completion.h>
-#include <linux/module.h>
-#include <linux/mm.h>
-#include <linux/bug.h>
-
-// Today's implementation is a little simpler and more limited than the
-// API description allows for in nv-kthread-q.h. Details include:
-//
-// 1. Each nv_kthread_q instance is a first-in, first-out queue.
-//
-// 2. Each nv_kthread_q instance is serviced by exactly one kthread.
-//
-// You can create any number of queues, each of which gets its own
-// named kernel thread (kthread). You can then insert arbitrary functions
-// into the queue, and those functions will be run in the context of the
-// queue's kthread.
-
-#ifndef WARN
-    // Only *really* old kernels (2.6.9) end up here. Just use a simple printk
-    // to implement this, because such kernels won't be supported much longer.
-    #define WARN(condition, format...) ({                    \
-        int __ret_warn_on = !!(condition);                   \
-        if (unlikely(__ret_warn_on))                         \
-            printk(KERN_ERR format);                         \
-        unlikely(__ret_warn_on);                             \
-    })
-#endif
-
-#define NVQ_WARN(fmt, ...)                                   \
-    do {                                                     \
-        if (in_interrupt()) {                                \
-            WARN(1, "nv_kthread_q: [in interrupt]: " fmt,    \
-            ##__VA_ARGS__);                                  \
-        }                                                    \
-        else {                                               \
-            WARN(1, "nv_kthread_q: task: %s: " fmt,          \
-                 current->comm,                              \
-                 ##__VA_ARGS__);                             \
-        }                                                    \
-    } while (0)
-
-static int _main_loop(void *args)
-{
-    nv_kthread_q_t *q = (nv_kthread_q_t *)args;
-    nv_kthread_q_item_t *q_item = NULL;
-    unsigned long flags;
-
-    while (1) {
-        // Normally this thread is never interrupted. However,
-        // down_interruptible (instead of down) is called here,
-        // in order to avoid being classified as a potentially
-        // hung task, by the kernel watchdog.
-        while (down_interruptible(&q->q_sem))
-            NVQ_WARN("Interrupted during semaphore wait\n");
-
-        if (atomic_read(&q->main_loop_should_exit))
-            break;
-
-        spin_lock_irqsave(&q->q_lock, flags);
-
-        // The q_sem semaphore prevents us from getting here unless there is
-        // at least one item in the list, so an empty list indicates a bug.
-        if (unlikely(list_empty(&q->q_list_head))) {
-            spin_unlock_irqrestore(&q->q_lock, flags);
-            NVQ_WARN("_main_loop: Empty queue: q: 0x%p\n", q);
-            continue;
-        }
-
-        // Consume one item from the queue
-        q_item = list_first_entry(&q->q_list_head,
-                                   nv_kthread_q_item_t,
-                                   q_list_node);
-
-        list_del_init(&q_item->q_list_node);
-
-        spin_unlock_irqrestore(&q->q_lock, flags);
-
-        // Run the item
-        q_item->function_to_run(q_item->function_args);
-
-        // Make debugging a little simpler by clearing this between runs:
-        q_item = NULL;
-    }
-
-    while (!kthread_should_stop())
-        schedule();
-
-    return 0;
-}
-
-void nv_kthread_q_stop(nv_kthread_q_t *q)
-{
-    // check if queue has been properly initialized
-    if (unlikely(!q->q_kthread))
-        return;
-
-    nv_kthread_q_flush(q);
-
-    // If this assertion fires, then a caller likely either broke the API rules,
-    // by adding items after calling nv_kthread_q_stop, or possibly messed up
-    // with inadequate flushing of self-rescheduling q_items.
-    if (unlikely(!list_empty(&q->q_list_head)))
-        NVQ_WARN("list not empty after flushing\n");
-
-    if (likely(!atomic_read(&q->main_loop_should_exit))) {
-
-        atomic_set(&q->main_loop_should_exit, 1);
-
-        // Wake up the kthread so that it can see that it needs to stop:
-        up(&q->q_sem);
-
-        kthread_stop(q->q_kthread);
-        q->q_kthread = NULL;
-    }
-}
-
-// When CONFIG_VMAP_STACK is defined, the kernel thread stack allocator used by
-// kthread_create_on_node relies on a 2 entry, per-core cache to minimize
-// vmalloc invocations. The cache is NUMA-unaware, so when there is a hit, the
-// stack location ends up being a function of the core assigned to the current
-// thread, instead of being a function of the specified NUMA node. The cache was
-// added to the kernel in commit ac496bf48d97f2503eaa353996a4dd5e4383eaf0
-// ("fork: Optimize task creation by caching two thread stacks per CPU if
-// CONFIG_VMAP_STACK=y")
-//
-// To work around the problematic cache, we create up to three kernel threads
-//   -If the first thread's stack is resident on the preferred node, return this
-//    thread.
-//   -Otherwise, create a second thread. If its stack is resident on the
-//    preferred node, stop the first thread and return this one.
-//   -Otherwise, create a third thread. The stack allocator does not find a
-//    cached stack, and so falls back to vmalloc, which takes the NUMA hint into
-//    consideration. The first two threads are then stopped.
-//
-// When CONFIG_VMAP_STACK is not defined, the first kernel thread is returned.
-//
-// This function is never invoked when there is no NUMA preference (preferred
-// node is NUMA_NO_NODE).
-static struct task_struct *thread_create_on_node(int (*threadfn)(void *data),
-                                                 nv_kthread_q_t *q,
-                                                 int preferred_node,
-                                                 const char *q_name)
-{
-
-    unsigned i, j;
-    static const unsigned attempts = 3;
-    struct task_struct *thread[3];
-
-    for (i = 0;; i++) {
-        struct page *stack;
-
-        thread[i] = kthread_create_on_node(threadfn, q, preferred_node, q_name);
-
-        if (unlikely(IS_ERR(thread[i]))) {
-
-            // Instead of failing, pick the previous thread, even if its
-            // stack is not allocated on the preferred node.
-            if (i > 0)
-                i--;
-
-            break;
-        }
-
-        // vmalloc is not used to allocate the stack, so simply return the
-        // thread, even if its stack may not be allocated on the preferred node
-        if (!is_vmalloc_addr(thread[i]->stack))
-            break;
-
-        // Ran out of attempts - return thread even if its stack may not be
-        // allocated on the preferred node
-        if (i == (attempts - 1))
-            break;
-
-        // Get the NUMA node where the first page of the stack is resident. If
-        // it is the preferred node, select this thread.
-        stack = vmalloc_to_page(thread[i]->stack);
-        if (page_to_nid(stack) == preferred_node)
-            break;
-    }
-
-    for (j = i; j > 0; j--)
-        kthread_stop(thread[j - 1]);
-
-    return thread[i];
-}
-
-int nv_kthread_q_init_on_node(nv_kthread_q_t *q, const char *q_name, int preferred_node)
-{
-    memset(q, 0, sizeof(*q));
-
-    INIT_LIST_HEAD(&q->q_list_head);
-    spin_lock_init(&q->q_lock);
-    sema_init(&q->q_sem, 0);
-
-    if (preferred_node == NV_KTHREAD_NO_NODE) {
-        q->q_kthread = kthread_create(_main_loop, q, q_name);
-    }
-    else {
-        q->q_kthread = thread_create_on_node(_main_loop, q, preferred_node, q_name);
-    }
-
-    if (IS_ERR(q->q_kthread)) {
-        int err = PTR_ERR(q->q_kthread);
-
-        // Clear q_kthread before returning so that nv_kthread_q_stop() can be
-        // safely called on it making error handling easier.
-        q->q_kthread = NULL;
-
-        return err;
-    }
-
-    wake_up_process(q->q_kthread);
-
-    return 0;
-}
-
-int nv_kthread_q_init(nv_kthread_q_t *q, const char *qname)
-{
-    return nv_kthread_q_init_on_node(q, qname, NV_KTHREAD_NO_NODE);
-}
-
-// Returns true (non-zero) if the item was actually scheduled, and false if the
-// item was already pending in a queue.
-static int _raw_q_schedule(nv_kthread_q_t *q, nv_kthread_q_item_t *q_item)
-{
-    unsigned long flags;
-    int ret = 1;
-
-    spin_lock_irqsave(&q->q_lock, flags);
-
-    if (likely(list_empty(&q_item->q_list_node)))
-        list_add_tail(&q_item->q_list_node, &q->q_list_head);
-    else
-        ret = 0;
-
-    spin_unlock_irqrestore(&q->q_lock, flags);
-
-    if (likely(ret))
-        up(&q->q_sem);
-
-    return ret;
-}
-
-void nv_kthread_q_item_init(nv_kthread_q_item_t *q_item,
-                            nv_q_func_t function_to_run,
-                            void *function_args)
-{
-    INIT_LIST_HEAD(&q_item->q_list_node);
-    q_item->function_to_run = function_to_run;
-    q_item->function_args   = function_args;
-}
-
-// Returns true (non-zero) if the q_item got scheduled, false otherwise.
-int nv_kthread_q_schedule_q_item(nv_kthread_q_t *q,
-                                 nv_kthread_q_item_t *q_item)
-{
-    if (unlikely(atomic_read(&q->main_loop_should_exit))) {
-        NVQ_WARN("Not allowed: nv_kthread_q_schedule_q_item was "
-                   "called with a non-alive q: 0x%p\n", q);
-        return 0;
-    }
-
-    return _raw_q_schedule(q, q_item);
-}
-
-static void _q_flush_function(void *args)
-{
-    struct completion *completion = (struct completion *)args;
-    complete(completion);
-}
-
-
-static void _raw_q_flush(nv_kthread_q_t *q)
-{
-    nv_kthread_q_item_t q_item;
-    DECLARE_COMPLETION_ONSTACK(completion);
-
-    nv_kthread_q_item_init(&q_item, _q_flush_function, &completion);
-
-    _raw_q_schedule(q, &q_item);
-
-    // Wait for the flush item to run. Once it has run, then all of the
-    // previously queued items in front of it will have run, so that means
-    // the flush is complete.
-    wait_for_completion(&completion);
-}
-
-void nv_kthread_q_flush(nv_kthread_q_t *q)
-{
-    if (unlikely(atomic_read(&q->main_loop_should_exit))) {
-        NVQ_WARN("Not allowed: nv_kthread_q_flush was called after "
-                   "nv_kthread_q_stop. q: 0x%p\n", q);
-        return;
-    }
-
-    // This 2x flush is not a typing mistake. The queue really does have to be
-    // flushed twice, in order to take care of the case of a q_item that
-    // reschedules itself.
-    _raw_q_flush(q);
-    _raw_q_flush(q);
-}
--- a/kernel-open/nvidia-drm/nv-pci-table.c
+++ b/kernel-open/nvidia-drm/nv-pci-table.c
@@ -25,15 +25,6 @@
 #include <linux/module.h>

 #include "nv-pci-table.h"
-#include "cpuopsys.h"
-
-#if defined(NV_BSD)
-/* Define PCI classes that FreeBSD's linuxkpi is missing */
-#define PCI_VENDOR_ID_NVIDIA 0x10de
-#define PCI_CLASS_DISPLAY_VGA 0x0300
-#define PCI_CLASS_DISPLAY_3D 0x0302
-#define PCI_CLASS_BRIDGE_OTHER 0x0680
-#endif

 /* Devices supported by RM */
 struct pci_device_id nv_pci_table[] = {
@@ -57,7 +48,7 @@ struct pci_device_id nv_pci_table[] = {
 };

 /* Devices supported by all drivers in nvidia.ko */
-struct pci_device_id nv_module_device_table[4] = {
+struct pci_device_id nv_module_device_table[] = {
    {
        .vendor      = PCI_VENDOR_ID_NVIDIA,
        .device      = PCI_ANY_ID,
@@ -85,6 +76,4 @@ struct pci_device_id nv_module_device_table[4] = {
    { }
 };

-#if defined(NV_LINUX)
 MODULE_DEVICE_TABLE(pci, nv_module_device_table);
-#endif
--- a/kernel-open/nvidia-drm/nv-pci-table.h
+++ b/kernel-open/nvidia-drm/nv-pci-table.h
@@ -27,6 +27,5 @@
 #include <linux/pci.h>

 extern struct pci_device_id nv_pci_table[];
-extern struct pci_device_id nv_module_device_table[4];

 #endif /* _NV_PCI_TABLE_H_ */
--- a/kernel-open/nvidia-drm/nv_common_utils.h
+++ b/kernel-open/nvidia-drm/nv_common_utils.h
@@ -1,120 +0,0 @@
-/*
- * SPDX-FileCopyrightText: Copyright (c) 2015 NVIDIA CORPORATION & AFFILIATES. All rights reserved.
- * SPDX-License-Identifier: MIT
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#ifndef __NV_COMMON_UTILS_H__
-#define __NV_COMMON_UTILS_H__
-
-#include "nvtypes.h"
-#include "nvmisc.h"
-
-#if !defined(TRUE)
-#define TRUE NV_TRUE
-#endif
-
-#if !defined(FALSE)
-#define FALSE NV_FALSE
-#endif
-
-#define NV_IS_UNSIGNED(x) ((__typeof__(x))-1 > 0)
-
-/* Get the length of a statically-sized array. */
-#define ARRAY_LEN(_arr) (sizeof(_arr) / sizeof(_arr[0]))
-
-#define NV_INVALID_HEAD         0xFFFFFFFF
-
-#define NV_INVALID_CONNECTOR_PHYSICAL_INFORMATION (~0)
-
-#if !defined(NV_MIN)
-# define NV_MIN(a,b) (((a)<(b))?(a):(b))
-#endif
-
-#define NV_MIN3(a,b,c) NV_MIN(NV_MIN(a, b), c)
-#define NV_MIN4(a,b,c,d) NV_MIN3(NV_MIN(a,b),c,d)
-
-#if !defined(NV_MAX)
-# define NV_MAX(a,b) (((a)>(b))?(a):(b))
-#endif
-
-#define NV_MAX3(a,b,c) NV_MAX(NV_MAX(a, b), c)
-#define NV_MAX4(a,b,c,d) NV_MAX3(NV_MAX(a,b),c,d)
-
-static inline int NV_LIMIT_VAL_TO_MIN_MAX(int val, int min, int max)
-{
-    if (val < min) {
-        return min;
-    }
-    if (val > max) {
-        return max;
-    }
-    return val;
-}
-
-#define NV_ROUNDUP_DIV(x,y) ((x) / (y) + (((x) % (y)) ? 1 : 0))
-
-/*
- * Macros used for computing palette entries:
- *
- * NV_UNDER_REPLICATE(val, source_size, result_size) expands a value
- * of source_size bits into a value of target_size bits by shifting
- * the source value into the high bits and replicating the high bits
- * of the value into the low bits of the result.
- *
- * PALETTE_DEPTH_SHIFT(val, w) maps a colormap entry for a component
- * that has w bits to an appropriate entry in a LUT of 256 entries.
- */
-static inline unsigned int NV_UNDER_REPLICATE(unsigned short val,
-                                              int source_size,
-                                              int result_size)
-{
-    return (val << (result_size - source_size)) |
-        (val >> ((source_size << 1) - result_size));
-}
-
-
-static inline unsigned short PALETTE_DEPTH_SHIFT(unsigned short val, int depth)
-{
-    return NV_UNDER_REPLICATE(val, depth, 8);
-}
-
-/*
- *  Use __builtin_ffs where it is supported, or provide an equivalent
- *  implementation for platforms like riscv where it is not.
- */
-#if defined(__GNUC__) && !NVCPU_IS_RISCV64
-static inline int nv_ffs(int x)
-{
-    return __builtin_ffs(x);
-}
-#else
-static inline int nv_ffs(int x)
-{
-    if (x == 0)
-        return 0;
-
-    LOWESTBITIDX_32(x);
-
-    return 1 + x;
-}
-#endif
-
-#endif /* __NV_COMMON_UTILS_H__ */
--- a/kernel-open/nvidia-drm/nvidia-dma-fence-helper.h
+++ b/kernel-open/nvidia-drm/nvidia-dma-fence-helper.h
@@ -0,0 +1,121 @@
+/*
+ * Copyright (c) 2017, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#ifndef __NVIDIA_DMA_FENCE_HELPER_H__
+#define __NVIDIA_DMA_FENCE_HELPER_H__
+
+#include "nvidia-drm-conftest.h"
+
+#if defined(NV_DRM_FENCE_AVAILABLE)
+
+/*
+ * Fence headers are moved to file dma-fence.h and struct fence has
+ * been renamed to dma_fence by commit -
+ *
+ *      2016-10-25 : f54d1867005c3323f5d8ad83eed823e84226c429
+ */
+
+#if defined(NV_LINUX_FENCE_H_PRESENT)
+#include <linux/fence.h>
+#else
+#include <linux/dma-fence.h>
+#endif
+
+#if defined(NV_LINUX_FENCE_H_PRESENT)
+typedef struct fence nv_dma_fence_t;
+typedef struct fence_ops nv_dma_fence_ops_t;
+#else
+typedef struct dma_fence nv_dma_fence_t;
+typedef struct dma_fence_ops nv_dma_fence_ops_t;
+#endif
+
+#if defined(NV_LINUX_FENCE_H_PRESENT)
+#define NV_DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT FENCE_FLAG_ENABLE_SIGNAL_BIT
+#else
+#define NV_DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT DMA_FENCE_FLAG_ENABLE_SIGNAL_BIT
+#endif
+
+static inline bool nv_dma_fence_is_signaled(nv_dma_fence_t *fence) {
+#if defined(NV_LINUX_FENCE_H_PRESENT)
+    return fence_is_signaled(fence);
+#else
+    return dma_fence_is_signaled(fence);
+#endif
+}
+
+static inline nv_dma_fence_t *nv_dma_fence_get(nv_dma_fence_t *fence)
+{
+#if defined(NV_LINUX_FENCE_H_PRESENT)
+    return fence_get(fence);
+#else
+    return dma_fence_get(fence);
+#endif
+}
+
+static inline void nv_dma_fence_put(nv_dma_fence_t *fence) {
+#if defined(NV_LINUX_FENCE_H_PRESENT)
+    fence_put(fence);
+#else
+    dma_fence_put(fence);
+#endif
+}
+
+static inline signed long
+nv_dma_fence_default_wait(nv_dma_fence_t *fence,
+                          bool intr, signed long timeout) {
+#if defined(NV_LINUX_FENCE_H_PRESENT)
+    return fence_default_wait(fence, intr, timeout);
+#else
+    return dma_fence_default_wait(fence, intr, timeout);
+#endif
+}
+
+static inline int nv_dma_fence_signal(nv_dma_fence_t *fence) {
+#if defined(NV_LINUX_FENCE_H_PRESENT)
+    return fence_signal(fence);
+#else
+    return dma_fence_signal(fence);
+#endif
+}
+
+static inline u64 nv_dma_fence_context_alloc(unsigned num) {
+#if defined(NV_LINUX_FENCE_H_PRESENT)
+    return fence_context_alloc(num);
+#else
+    return dma_fence_context_alloc(num);
+#endif
+}
+
+static inline void
+nv_dma_fence_init(nv_dma_fence_t *fence,
+                  const nv_dma_fence_ops_t *ops,
+                  spinlock_t *lock, u64 context, unsigned seqno) {
+#if defined(NV_LINUX_FENCE_H_PRESENT)
+    fence_init(fence, ops, lock, context, seqno);
+#else
+    dma_fence_init(fence, ops, lock, context, seqno);
+#endif
+}
+
+#endif /* defined(NV_DRM_FENCE_AVAILABLE) */
+
+#endif /* __NVIDIA_DMA_FENCE_HELPER_H__ */
--- a/kernel-open/nvidia-drm/nvidia-dma-resv-helper.h
+++ b/kernel-open/nvidia-drm/nvidia-dma-resv-helper.h
@@ -25,6 +25,8 @@

 #include "nvidia-drm-conftest.h"

+#if defined(NV_DRM_FENCE_AVAILABLE)
+
 /*
 * linux/reservation.h is renamed to linux/dma-resv.h, by commit
 * 52791eeec1d9 (dma-buf: rename reservation_object to dma_resv)
@@ -37,7 +39,7 @@
 #include <linux/reservation.h>
 #endif

-#include <linux/dma-fence.h>
+#include <nvidia-dma-fence-helper.h>

 #if defined(NV_LINUX_DMA_RESV_H_PRESENT)
 typedef struct dma_resv nv_dma_resv_t;
@@ -106,7 +108,7 @@ static inline int nv_dma_resv_reserve_fences(nv_dma_resv_t *obj,
 }

 static inline void nv_dma_resv_add_excl_fence(nv_dma_resv_t *obj,
-                                              struct dma_fence *fence)
+                                              nv_dma_fence_t *fence)
 {
 #if defined(NV_LINUX_DMA_RESV_H_PRESENT)
 #if defined(NV_DMA_RESV_ADD_FENCE_PRESENT)
@@ -119,18 +121,6 @@ static inline void nv_dma_resv_add_excl_fence(nv_dma_resv_t *obj,
 #endif
 }

-static inline void nv_dma_resv_add_shared_fence(nv_dma_resv_t *obj,
-                                                struct dma_fence *fence)
-{
-#if defined(NV_LINUX_DMA_RESV_H_PRESENT)
-#if defined(NV_DMA_RESV_ADD_FENCE_PRESENT)
-    dma_resv_add_fence(obj, fence, DMA_RESV_USAGE_READ);
-#else
-    dma_resv_add_shared_fence(obj, fence);
-#endif
-#else
-    reservation_object_add_shared_fence(obj, fence);
-#endif
-}
+#endif /* defined(NV_DRM_FENCE_AVAILABLE) */

 #endif /* __NVIDIA_DMA_RESV_HELPER_H__ */
--- a/kernel-open/nvidia-drm/nvidia-drm-conftest.h
+++ b/kernel-open/nvidia-drm/nvidia-drm-conftest.h
@@ -24,7 +24,6 @@
 #define __NVIDIA_DRM_CONFTEST_H__

 #include "conftest.h"
-#include "nvtypes.h"

 /*
 * NOTE: This file is expected to get included at the top before including any
@@ -55,156 +54,11 @@

 #endif

-#include <linux/kconfig.h> // for IS_ENABLED()
-
-#if IS_ENABLED(CONFIG_DRM) || defined(__FreeBSD__)
-#define NV_DRM_AVAILABLE
-#endif
-
-#if defined(NV_DRM_FBDEV_GENERIC_SETUP_PRESENT) &&                             \
-    defined(NV_DRM_APERTURE_REMOVE_CONFLICTING_PCI_FRAMEBUFFERS_PRESENT)
-#define NV_DRM_FBDEV_AVAILABLE
-#define NV_DRM_FBDEV_GENERIC_AVAILABLE
-#endif
-
-#if defined(NV_DRM_FBDEV_TTM_SETUP_PRESENT) &&                                 \
-    defined(NV_DRM_APERTURE_REMOVE_CONFLICTING_PCI_FRAMEBUFFERS_PRESENT)
-#if IS_ENABLED(CONFIG_DRM_TTM_HELPER)
-#define NV_DRM_FBDEV_AVAILABLE
-#define NV_DRM_FBDEV_TTM_AVAILABLE
-#endif
-#endif
-
-#if defined(NV_DRM_CLIENT_SETUP_PRESENT) &&                                    \
-    (defined(NV_DRM_APERTURE_REMOVE_CONFLICTING_PCI_FRAMEBUFFERS_PRESENT) ||   \
-     defined(NV_APERTURE_REMOVE_CONFLICTING_PCI_DEVICES_PRESENT))
-// XXX remove dependency on DRM_TTM_HELPER by implementing nvidia-drm's own
-// .fbdev_probe callback that uses NVKMS kapi
-#if IS_ENABLED(CONFIG_DRM_TTM_HELPER)
-#define NV_DRM_FBDEV_AVAILABLE
-#define NV_DRM_CLIENT_AVAILABLE
-#endif
-#endif
-
-/*
- * Adapt to quirks in FreeBSD's Linux kernel compatibility layer.
- */
-#if defined(NV_BSD)
-
-#include <linux/rwsem.h>
-#include <sys/param.h>
-#include <sys/lock.h>
-#include <sys/sx.h>
-
-/* For nv_drm_gem_prime_force_fence_signal */
-#ifndef spin_is_locked
-#if ((__FreeBSD_version >= 1500000) && (__FreeBSD_version < 1500018)) || (__FreeBSD_version < 1401501)
-#define spin_is_locked(lock) mtx_owned(lock.m)
+#if defined(NV_DRM_DRIVER_HAS_GEM_PRIME_RES_OBJ) || \
+    defined(NV_DRM_GEM_OBJECT_HAS_RESV)
+#define NV_DRM_FENCE_AVAILABLE
 #else
-#define spin_is_locked(lock) mtx_owned(lock)
+#undef NV_DRM_FENCE_AVAILABLE
 #endif
-#endif
-
-#ifndef rwsem_is_locked
-#define rwsem_is_locked(sem) (((sem)->sx.sx_lock & (SX_LOCK_SHARED)) \
-                              || ((sem)->sx.sx_lock & ~(SX_LOCK_FLAGMASK & ~SX_LOCK_SHARED)))
-#endif
-
-/*
- * FreeBSD does not define vm_flags_t in its linuxkpi, since there is already
- * a FreeBSD vm_flags_t (of a different size) and they don't want the names to
- * collide. Temporarily redefine it when including nv-mm.h
- */
-#define vm_flags_t unsigned long
-#include "nv-mm.h"
-#undef vm_flags_t
-
-/*
- * sys/nv.h and nvidia/nv.h have the same header guard
- * we need to clear it for nvlist_t to get loaded
- */
-#undef _NV_H_
-#include <sys/nv.h>
-
-/*
- * For now just use set_page_dirty as the lock variant
- * is not ported for FreeBSD. (in progress). This calls
- * vm_page_dirty. Used in nv-mm.h
- */
-#define set_page_dirty_lock set_page_dirty
-
-/*
- * FreeBSD does not implement drm_atomic_state_free, simply
- * default to drm_atomic_state_put
- */
-#define drm_atomic_state_free drm_atomic_state_put
-
-#if __FreeBSD_version < 1300000
-/* redefine LIST_HEAD_INIT to the linux version */
-#include <linux/list.h>
-#define LIST_HEAD_INIT(name) LINUX_LIST_HEAD_INIT(name)
-#endif
-
-/*
- * FreeBSD currently has only vmf_insert_pfn_prot defined, and it has a
- * static assert warning not to use it since all of DRM's usages are in
- * loops with the vm obj lock(s) held. Instead we should use the lkpi
- * function itself directly. For us none of this applies so we can just
- * wrap it in our own definition of vmf_insert_pfn
- */
-#ifndef NV_VMF_INSERT_PFN_PRESENT
-#define NV_VMF_INSERT_PFN_PRESENT 1
-
-#if __FreeBSD_version < 1300000
-#define VM_SHARED       (1 << 17)
-
-/* Not present in 12.2 */
-static inline vm_fault_t
-lkpi_vmf_insert_pfn_prot_locked(struct vm_area_struct *vma, unsigned long addr,
-    unsigned long pfn, pgprot_t prot)
-{
-       vm_object_t vm_obj = vma->vm_obj;
-       vm_page_t page;
-       vm_pindex_t pindex;
-
-       VM_OBJECT_ASSERT_WLOCKED(vm_obj);
-       pindex = OFF_TO_IDX(addr - vma->vm_start);
-       if (vma->vm_pfn_count == 0)
-               vma->vm_pfn_first = pindex;
-       MPASS(pindex <= OFF_TO_IDX(vma->vm_end));
-
-       page = vm_page_grab(vm_obj, pindex, VM_ALLOC_NORMAL);
-       if (page == NULL) {
-               page = PHYS_TO_VM_PAGE(IDX_TO_OFF(pfn));
-               vm_page_xbusy(page);
-               if (vm_page_insert(page, vm_obj, pindex)) {
-                       vm_page_xunbusy(page);
-                       return (VM_FAULT_OOM);
-               }
-               page->valid = VM_PAGE_BITS_ALL;
-       }
-       pmap_page_set_memattr(page, pgprot2cachemode(prot));
-       vma->vm_pfn_count++;
-
-       return (VM_FAULT_NOPAGE);
-}
-#endif
-
-static inline vm_fault_t
-vmf_insert_pfn(struct vm_area_struct *vma, unsigned long addr,
-    unsigned long pfn)
-{
-       vm_fault_t ret;
-
-       VM_OBJECT_WLOCK(vma->vm_obj);
-       ret = lkpi_vmf_insert_pfn_prot_locked(vma, addr, pfn, vma->vm_page_prot);
-       VM_OBJECT_WUNLOCK(vma->vm_obj);
-
-       return (ret);
-}
-
-#endif
-
-#endif /* defined(NV_BSD) */

 #endif /* defined(__NVIDIA_DRM_CONFTEST_H__) */
--- a/kernel-open/nvidia-drm/nvidia-drm-connector.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-connector.c
@@ -20,14 +20,13 @@
 * DEALINGS IN THE SOFTWARE.
 */

-#include "nvidia-drm-conftest.h" /* NV_DRM_AVAILABLE */
+#include "nvidia-drm-conftest.h" /* NV_DRM_ATOMIC_MODESET_AVAILABLE */

-#if defined(NV_DRM_AVAILABLE)
+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)

 #include "nvidia-drm-helper.h"
 #include "nvidia-drm-priv.h"
 #include "nvidia-drm-connector.h"
-#include "nvidia-drm-crtc.h"
 #include "nvidia-drm-utils.h"
 #include "nvidia-drm-encoder.h"

@@ -43,7 +42,6 @@

 #include <drm/drm_atomic.h>
 #include <drm/drm_atomic_helper.h>
-#include <drm/drm_edid.h>

 static void nv_drm_connector_destroy(struct drm_connector *connector)
 {
@@ -100,11 +98,7 @@ __nv_drm_detect_encoder(struct NvKmsKapiDynamicDisplayParams *pDetectParams,
            break;
    }

-#if defined(NV_DRM_CONNECTOR_HAS_OVERRIDE_EDID)
    if (connector->override_edid) {
-#else
-    if (drm_edid_override_connector_update(connector) > 0) {
-#endif
        const struct drm_property_blob *edid = connector->edid_blob_ptr;

        if (edid->length <= sizeof(pDetectParams->edid.buffer)) {
@@ -124,11 +118,6 @@ __nv_drm_detect_encoder(struct NvKmsKapiDynamicDisplayParams *pDetectParams,
        return false;
    }

-#if defined(NV_DRM_CONNECTOR_HAS_VRR_CAPABLE_PROPERTY)
-    drm_connector_attach_vrr_capable_property(&nv_connector->base);
-    drm_connector_set_vrr_capable_property(&nv_connector->base, pDetectParams->vrrSupported ? true : false);
-#endif
-
    if (pDetectParams->connected) {
        if (!pDetectParams->overrideEdid && pDetectParams->edid.bufferSize) {

@@ -208,11 +197,6 @@ done:

    nv_drm_free(pDetectParams);

-    if (status == connector_status_disconnected &&
-        nv_connector->modeset_permission_filep) {
-        nv_drm_connector_revoke_permissions(dev, nv_connector);
-    }
-
    return status;
 }

@@ -228,6 +212,9 @@ nv_drm_connector_detect(struct drm_connector *connector, bool force)
 }

 static struct drm_connector_funcs nv_connector_funcs = {
+#if defined NV_DRM_ATOMIC_HELPER_CONNECTOR_DPMS_PRESENT
+    .dpms                   = drm_atomic_helper_connector_dpms,
+#endif
    .destroy                = nv_drm_connector_destroy,
    .reset                  = drm_atomic_helper_connector_reset,
    .force                  = __nv_drm_connector_force,
@@ -311,11 +298,7 @@ static int nv_drm_connector_get_modes(struct drm_connector *connector)
 }

 static int nv_drm_connector_mode_valid(struct drm_connector    *connector,
-#if defined(NV_DRM_CONNECTOR_HELPER_FUNCS_MODE_VALID_HAS_CONST_MODE_ARG)
-                                       const struct drm_display_mode *mode)
-#else
                                       struct drm_display_mode *mode)
-#endif
 {
    struct drm_device *dev = connector->dev;
    struct nv_drm_device *nv_dev = to_nv_device(dev);
@@ -350,133 +333,10 @@ nv_drm_connector_best_encoder(struct drm_connector *connector)
    return NULL;
 }

-#if defined(NV_DRM_MODE_CREATE_DP_COLORSPACE_PROPERTY_HAS_SUPPORTED_COLORSPACES_ARG)
-static const NvU32 __nv_drm_connector_supported_colorspaces =
-    BIT(DRM_MODE_COLORIMETRY_BT2020_RGB) |
-    BIT(DRM_MODE_COLORIMETRY_BT2020_YCC);
-#endif
-
-#if defined(NV_DRM_CONNECTOR_ATTACH_HDR_OUTPUT_METADATA_PROPERTY_PRESENT)
-static int
-__nv_drm_connector_atomic_check(struct drm_connector *connector,
-                                struct drm_atomic_state *state)
-{
-    struct drm_connector_state *new_connector_state =
-        drm_atomic_get_new_connector_state(state, connector);
-    struct drm_connector_state *old_connector_state =
-        drm_atomic_get_old_connector_state(state, connector);
-    struct nv_drm_device *nv_dev = to_nv_device(connector->dev);
-
-    struct drm_crtc *crtc = new_connector_state->crtc;
-    struct drm_crtc_state *crtc_state;
-    struct nv_drm_crtc_state *nv_crtc_state;
-    struct NvKmsKapiHeadRequestedConfig *req_config;
-
-    if (!crtc) {
-        return 0;
-    }
-
-    crtc_state = drm_atomic_get_new_crtc_state(state, crtc);
-    nv_crtc_state = to_nv_crtc_state(crtc_state);
-    req_config = &nv_crtc_state->req_config;
-
-    /*
-     * Override metadata for the entire head instead of allowing NVKMS to derive
-     * it from the layers' metadata.
-     *
-     * This is the metadata that will sent to the display, and if applicable,
-     * layers will be tone mapped to this metadata rather than that of the
-     * display.
-     */
-    req_config->flags.hdrInfoFrameChanged =
-        !drm_connector_atomic_hdr_metadata_equal(old_connector_state,
-                                                 new_connector_state);
-    if (new_connector_state->hdr_output_metadata &&
-        new_connector_state->hdr_output_metadata->data) {
-
-        /*
-         * Note that HDMI definitions are used here even though we might not
-         * be using HDMI. While that seems odd, it is consistent with
-         * upstream behavior.
-         */
-
-        struct hdr_output_metadata *hdr_metadata =
-            new_connector_state->hdr_output_metadata->data;
-        struct hdr_metadata_infoframe *info_frame =
-            &hdr_metadata->hdmi_metadata_type1;
-        unsigned int i;
-
-        if (hdr_metadata->metadata_type != HDMI_STATIC_METADATA_TYPE1) {
-            return -EINVAL;
-        }
-
-        for (i = 0; i < ARRAY_SIZE(info_frame->display_primaries); i++) {
-            req_config->modeSetConfig.hdrInfoFrame.staticMetadata.displayPrimaries[i].x =
-                info_frame->display_primaries[i].x;
-            req_config->modeSetConfig.hdrInfoFrame.staticMetadata.displayPrimaries[i].y =
-                info_frame->display_primaries[i].y;
-        }
-
-        req_config->modeSetConfig.hdrInfoFrame.staticMetadata.whitePoint.x =
-            info_frame->white_point.x;
-        req_config->modeSetConfig.hdrInfoFrame.staticMetadata.whitePoint.y =
-            info_frame->white_point.y;
-        req_config->modeSetConfig.hdrInfoFrame.staticMetadata.maxDisplayMasteringLuminance =
-            info_frame->max_display_mastering_luminance;
-        req_config->modeSetConfig.hdrInfoFrame.staticMetadata.minDisplayMasteringLuminance =
-            info_frame->min_display_mastering_luminance;
-        req_config->modeSetConfig.hdrInfoFrame.staticMetadata.maxCLL =
-            info_frame->max_cll;
-        req_config->modeSetConfig.hdrInfoFrame.staticMetadata.maxFALL =
-            info_frame->max_fall;
-
-        req_config->modeSetConfig.hdrInfoFrame.eotf = info_frame->eotf;
-
-        req_config->modeSetConfig.hdrInfoFrame.enabled = NV_TRUE;
-    } else {
-        req_config->modeSetConfig.hdrInfoFrame.enabled = NV_FALSE;
-    }
-
-    req_config->flags.colorimetryChanged =
-        (old_connector_state->colorspace != new_connector_state->colorspace);
-    // When adding a case here, also add to __nv_drm_connector_supported_colorspaces
-    switch (new_connector_state->colorspace) {
-        case DRM_MODE_COLORIMETRY_DEFAULT:
-            req_config->modeSetConfig.colorimetry =
-                NVKMS_OUTPUT_COLORIMETRY_DEFAULT;
-            break;
-        case DRM_MODE_COLORIMETRY_BT601_YCC:
-            req_config->modeSetConfig.colorimetry =
-                NVKMS_OUTPUT_COLORIMETRY_BT601;
-            break;
-        case DRM_MODE_COLORIMETRY_BT709_YCC:
-            req_config->modeSetConfig.colorimetry =
-                NVKMS_OUTPUT_COLORIMETRY_BT709;
-            break;
-        case DRM_MODE_COLORIMETRY_BT2020_RGB:
-        case DRM_MODE_COLORIMETRY_BT2020_YCC:
-            // Ignore RGB/YCC
-            // See https://patchwork.freedesktop.org/patch/525496/?series=111865&rev=4
-            req_config->modeSetConfig.colorimetry =
-                NVKMS_OUTPUT_COLORIMETRY_BT2100;
-            break;
-        default:
-            // XXX HDR TODO: Add support for more color spaces
-            NV_DRM_DEV_LOG_ERR(nv_dev, "Unsupported color space");
-            return -EINVAL;
-    }
-
-    return 0;
-}
-#endif /* defined(NV_DRM_CONNECTOR_ATTACH_HDR_OUTPUT_METADATA_PROPERTY_PRESENT) */
-
 static const struct drm_connector_helper_funcs nv_connector_helper_funcs = {
    .get_modes    = nv_drm_connector_get_modes,
    .mode_valid   = nv_drm_connector_mode_valid,
    .best_encoder = nv_drm_connector_best_encoder,
-#if defined(NV_DRM_CONNECTOR_ATTACH_HDR_OUTPUT_METADATA_PROPERTY_PRESENT)
-    .atomic_check = __nv_drm_connector_atomic_check,
-#endif
 };

 static struct drm_connector*
@@ -502,8 +362,6 @@ nv_drm_connector_new(struct drm_device *dev,
    nv_connector->physicalIndex = physicalIndex;
    nv_connector->type     = type;
    nv_connector->internal = internal;
-    nv_connector->modeset_permission_filep = NULL;
-    nv_connector->modeset_permission_crtc = NULL;

    strcpy(nv_connector->dpAddress, dpAddress);

@@ -529,32 +387,6 @@ nv_drm_connector_new(struct drm_device *dev,
            DRM_CONNECTOR_POLL_CONNECT | DRM_CONNECTOR_POLL_DISCONNECT;
    }

-#if defined(NV_DRM_CONNECTOR_ATTACH_HDR_OUTPUT_METADATA_PROPERTY_PRESENT)
-    if (nv_connector->type == NVKMS_CONNECTOR_TYPE_HDMI) {
-#if defined(NV_DRM_MODE_CREATE_DP_COLORSPACE_PROPERTY_HAS_SUPPORTED_COLORSPACES_ARG)
-        if (drm_mode_create_hdmi_colorspace_property(
-                &nv_connector->base,
-                __nv_drm_connector_supported_colorspaces) == 0) {
-#else
-        if (drm_mode_create_hdmi_colorspace_property(&nv_connector->base) == 0) {
-#endif
-            drm_connector_attach_colorspace_property(&nv_connector->base);
-        }
-        drm_connector_attach_hdr_output_metadata_property(&nv_connector->base);
-    } else if (nv_connector->type == NVKMS_CONNECTOR_TYPE_DP) {
-#if defined(NV_DRM_MODE_CREATE_DP_COLORSPACE_PROPERTY_HAS_SUPPORTED_COLORSPACES_ARG)
-        if (drm_mode_create_dp_colorspace_property(
-                &nv_connector->base,
-                __nv_drm_connector_supported_colorspaces) == 0) {
-#else
-        if (drm_mode_create_dp_colorspace_property(&nv_connector->base) == 0) {
-#endif
-            drm_connector_attach_colorspace_property(&nv_connector->base);
-        }
-        drm_connector_attach_hdr_output_metadata_property(&nv_connector->base);
-    }
-#endif /* defined(NV_DRM_CONNECTOR_ATTACH_HDR_OUTPUT_METADATA_PROPERTY_PRESENT) */
-
    /* Register connector with DRM subsystem */

    ret = drm_connector_register(&nv_connector->base);
@@ -593,11 +425,16 @@ nv_drm_get_connector(struct drm_device *dev,
                     char dpAddress[NVKMS_DP_ADDRESS_STRING_LENGTH])
 {
    struct drm_connector *connector = NULL;
+#if defined(NV_DRM_CONNECTOR_LIST_ITER_PRESENT)
    struct drm_connector_list_iter conn_iter;
-    drm_connector_list_iter_begin(dev, &conn_iter);
+    nv_drm_connector_list_iter_begin(dev, &conn_iter);
+#else
+    struct drm_mode_config *config = &dev->mode_config;
+    mutex_lock(&config->mutex);
+#endif

    /* Lookup for existing connector with same physical index */
-    drm_for_each_connector_iter(connector, &conn_iter) {
+    nv_drm_for_each_connector(connector, &conn_iter, dev) {
        struct nv_drm_connector *nv_connector = to_nv_connector(connector);

        if (nv_connector->physicalIndex == physicalIndex) {
@@ -612,7 +449,11 @@ nv_drm_get_connector(struct drm_device *dev,
    connector = NULL;

 done:
-    drm_connector_list_iter_end(&conn_iter);
+#if defined(NV_DRM_CONNECTOR_LIST_ITER_PRESENT)
+    nv_drm_connector_list_iter_end(&conn_iter);
+#else
+    mutex_unlock(&config->mutex);
+#endif

    if (!connector) {
        connector = nv_drm_connector_new(dev,
@@ -623,26 +464,4 @@ done:
    return connector;
 }

-/*
- * Revoke the permissions on this connector.
- */
-bool nv_drm_connector_revoke_permissions(struct drm_device *dev,
-                                         struct nv_drm_connector* nv_connector)
-{
-    struct nv_drm_device *nv_dev = to_nv_device(dev);
-    bool ret = true;
-
-    if (nv_connector->modeset_permission_crtc) {
-        if (nv_connector->nv_detected_encoder) {
-            ret = nvKms->revokePermissions(
-                nv_dev->pDevice, nv_connector->modeset_permission_crtc->head,
-                nv_connector->nv_detected_encoder->hDisplay);
-        }
-        nv_connector->modeset_permission_crtc->modeset_permission_filep = NULL;
-        nv_connector->modeset_permission_crtc = NULL;
-    }
-    nv_connector->modeset_permission_filep = NULL;
-    return ret;
-}
-
 #endif
--- a/kernel-open/nvidia-drm/nvidia-drm-connector.h
+++ b/kernel-open/nvidia-drm/nvidia-drm-connector.h
@@ -25,13 +25,15 @@

 #include "nvidia-drm-conftest.h"

-#if defined(NV_DRM_AVAILABLE)
+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)

 #if defined(NV_DRM_DRMP_H_PRESENT)
 #include <drm/drmP.h>
 #endif

+#if defined(NV_DRM_DRM_CONNECTOR_H_PRESENT)
 #include <drm/drm_connector.h>
+#endif

 #include "nvtypes.h"
 #include "nvkms-api-types.h"
@@ -49,20 +51,6 @@ struct nv_drm_connector {

    atomic_t connection_status_dirty;

-    /**
-     * @modeset_permission_filep:
-     *
-     * The filep using this connector with DRM_IOCTL_NVIDIA_GRANT_PERMISSIONS.
-     */
-    struct drm_file *modeset_permission_filep;
-
-    /**
-     * @modeset_permission_crtc:
-     *
-     * The crtc using this connector with DRM_IOCTL_NVIDIA_GRANT_PERMISSIONS.
-     */
-    struct nv_drm_crtc *modeset_permission_crtc;
-
    struct drm_connector base;
 };

@@ -96,9 +84,6 @@ nv_drm_get_connector(struct drm_device *dev,
                     NvBool internal,
                     char dpAddress[NVKMS_DP_ADDRESS_STRING_LENGTH]);

-bool nv_drm_connector_revoke_permissions(struct drm_device *dev,
-                                         struct nv_drm_connector *nv_connector);
-
-#endif /* NV_DRM_AVAILABLE */
+#endif /* NV_DRM_ATOMIC_MODESET_AVAILABLE */

 #endif /* __NVIDIA_DRM_CONNECTOR_H__ */
--- a/kernel-open/nvidia-drm/nvidia-drm-crtc.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-crtc.c
--- a/kernel-open/nvidia-drm/nvidia-drm-crtc.h
+++ b/kernel-open/nvidia-drm/nvidia-drm-crtc.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2016-2022, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
@@ -25,7 +25,7 @@

 #include "nvidia-drm-conftest.h"

-#if defined(NV_DRM_AVAILABLE)
+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)

 #include "nvidia-drm-helper.h"

@@ -35,15 +35,37 @@

 #include <drm/drm_crtc.h>

+#if defined(NV_DRM_ALPHA_BLENDING_AVAILABLE) || defined(NV_DRM_ROTATION_AVAILABLE)
+/* For DRM_ROTATE_* , DRM_REFLECT_* */
+#include <drm/drm_blend.h>
+#endif
+
+#if defined(NV_DRM_ROTATION_AVAILABLE)
+/* For DRM_MODE_ROTATE_* and DRM_MODE_REFLECT_* */
+#include <uapi/drm/drm_mode.h>
+#endif
+
 #include "nvtypes.h"
 #include "nvkms-kapi.h"

-enum nv_drm_transfer_function {
-    NV_DRM_TRANSFER_FUNCTION_DEFAULT,
-    NV_DRM_TRANSFER_FUNCTION_LINEAR,
-    NV_DRM_TRANSFER_FUNCTION_PQ,
-    NV_DRM_TRANSFER_FUNCTION_MAX,
-};
+#if defined(NV_DRM_ROTATION_AVAILABLE)
+/*
+ * 19-05-2017 c2c446ad29437bb92b157423c632286608ebd3ec has added
+ * DRM_MODE_ROTATE_* and DRM_MODE_REFLECT_* to UAPI and removed
+ * DRM_ROTATE_* and DRM_MODE_REFLECT_*
+ */
+#if !defined(DRM_MODE_ROTATE_0)
+#define DRM_MODE_ROTATE_0       DRM_ROTATE_0
+#define DRM_MODE_ROTATE_90      DRM_ROTATE_90
+#define DRM_MODE_ROTATE_180     DRM_ROTATE_180
+#define DRM_MODE_ROTATE_270     DRM_ROTATE_270
+#define DRM_MODE_REFLECT_X      DRM_REFLECT_X
+#define DRM_MODE_REFLECT_Y      DRM_REFLECT_Y
+#define DRM_MODE_ROTATE_MASK    DRM_ROTATE_MASK
+#define DRM_MODE_REFLECT_MASK   DRM_REFLECT_MASK
+#endif
+
+#endif //NV_DRM_ROTATION_AVAILABLE

 struct nv_drm_crtc {
    NvU32 head;
@@ -63,15 +85,6 @@ struct nv_drm_crtc {
     */
    spinlock_t flip_list_lock;

-    /**
-     * @modeset_permission_filep:
-     *
-     * The filep using this crtc with DRM_IOCTL_NVIDIA_GRANT_PERMISSIONS.
-     */
-    struct drm_file *modeset_permission_filep;
-
-    struct NvKmsLUTCaps olut_caps;
-
    struct drm_crtc base;
 };

@@ -151,12 +164,6 @@ struct nv_drm_crtc_state {
     * nv_drm_atomic_crtc_destroy_state().
     */
    struct nv_drm_flip *nv_flip;
-
-    enum nv_drm_transfer_function regamma_tf;
-    struct drm_property_blob *regamma_lut;
-    uint64_t regamma_divisor;
-    struct nv_drm_lut_surface *regamma_drm_lut_surface;
-    NvBool regamma_changed;
 };

 static inline struct nv_drm_crtc_state *to_nv_crtc_state(struct drm_crtc_state *state)
@@ -164,11 +171,6 @@ static inline struct nv_drm_crtc_state *to_nv_crtc_state(struct drm_crtc_state *
    return container_of(state, struct nv_drm_crtc_state, base);
 }

-static inline const struct nv_drm_crtc_state *to_nv_crtc_state_const(const struct drm_crtc_state *state)
-{
-    return container_of(state, struct nv_drm_crtc_state, base);
-}
-
 struct nv_drm_plane {
    /**
     * @base:
@@ -190,16 +192,6 @@ struct nv_drm_plane {
     * Index of this plane in the per head array of layers.
     */
    uint32_t layer_idx;
-
-    /**
-     * @supportsColorProperties
-     *
-     * If true, supports the COLOR_ENCODING and COLOR_RANGE properties.
-     */
-    bool supportsColorProperties;
-
-    struct NvKmsLUTCaps ilut_caps;
-    struct NvKmsLUTCaps tmo_caps;
 };

 static inline struct nv_drm_plane *to_nv_plane(struct drm_plane *plane)
@@ -210,54 +202,9 @@ static inline struct nv_drm_plane *to_nv_plane(struct drm_plane *plane)
    return container_of(plane, struct nv_drm_plane, base);
 }

-struct nv_drm_nvkms_surface {
-    struct NvKmsKapiDevice *pDevice;
-    struct NvKmsKapiMemory *nvkms_memory;
-    struct NvKmsKapiSurface *nvkms_surface;
-    void *buffer;
-    struct kref refcount;
-};
-
-struct nv_drm_nvkms_surface_params {
-    NvU32 width;
-    NvU32 height;
-    size_t surface_size;
-    enum NvKmsSurfaceMemoryFormat format;
-};
-
-struct nv_drm_lut_surface {
-    struct nv_drm_nvkms_surface base;
-    struct {
-        NvU32 vssSegments;
-        enum NvKmsLUTVssType vssType;
-
-        NvU32 lutEntries;
-        enum NvKmsLUTFormat entryFormat;
-
-    } properties;
-};
-
 struct nv_drm_plane_state {
    struct drm_plane_state base;
    s32 __user *fd_user_ptr;
-    enum nv_drm_input_color_space input_colorspace;
-#if defined(NV_DRM_HAS_HDR_OUTPUT_METADATA)
-    struct drm_property_blob *hdr_output_metadata;
-#endif
-    struct drm_property_blob *lms_ctm;
-    struct drm_property_blob *lms_to_itp_ctm;
-    struct drm_property_blob *itp_to_lms_ctm;
-    struct drm_property_blob *blend_ctm;
-
-    enum nv_drm_transfer_function degamma_tf;
-    struct drm_property_blob *degamma_lut;
-    uint64_t degamma_multiplier; /* S31.32 Sign-Magnitude Format */
-    struct nv_drm_lut_surface *degamma_drm_lut_surface;
-    NvBool degamma_changed;
-
-    struct drm_property_blob *tmo_lut;
-    struct nv_drm_lut_surface *tmo_drm_lut_surface;
-    NvBool tmo_changed;
 };

 static inline struct nv_drm_plane_state *to_nv_drm_plane_state(struct drm_plane_state *state)
@@ -265,11 +212,6 @@ static inline struct nv_drm_plane_state *to_nv_drm_plane_state(struct drm_plane_
    return container_of(state, struct nv_drm_plane_state, base);
 }

-static inline const struct nv_drm_plane_state *to_nv_drm_plane_state_const(const struct drm_plane_state *state)
-{
-    return container_of(state, const struct nv_drm_plane_state, base);
-}
-
 static inline struct nv_drm_crtc *to_nv_crtc(struct drm_crtc *crtc)
 {
    if (crtc == NULL) {
@@ -349,6 +291,6 @@ int nv_drm_get_crtc_crc32_ioctl(struct drm_device *dev,
 int nv_drm_get_crtc_crc32_v2_ioctl(struct drm_device *dev,
                                   void *data, struct drm_file *filep);

-#endif /* NV_DRM_AVAILABLE */
+#endif /* NV_DRM_ATOMIC_MODESET_AVAILABLE */

 #endif /* __NVIDIA_DRM_CRTC_H__ */
--- a/kernel-open/nvidia-drm/nvidia-drm-drv.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-drv.c
--- a/kernel-open/nvidia-drm/nvidia-drm-drv.h
+++ b/kernel-open/nvidia-drm/nvidia-drm-drv.h
@@ -27,19 +27,10 @@

 #if defined(NV_DRM_AVAILABLE)

-struct NvKmsKapiGpuInfo;
-
 int nv_drm_probe_devices(void);

-void nv_drm_remove(NvU32 gpuId);
 void nv_drm_remove_devices(void);

-void nv_drm_suspend_resume(NvBool suspend);
-
-void nv_drm_register_drm_device(const struct NvKmsKapiGpuInfo *);
-
-void nv_drm_update_drm_driver_features(void);
-
 #endif /* defined(NV_DRM_AVAILABLE) */

 #endif /* __NVIDIA_DRM_DRV_H__ */
--- a/kernel-open/nvidia-drm/nvidia-drm-encoder.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-encoder.c
@@ -20,9 +20,9 @@
 * DEALINGS IN THE SOFTWARE.
 */

-#include "nvidia-drm-conftest.h" /* NV_DRM_AVAILABLE */
+#include "nvidia-drm-conftest.h" /* NV_DRM_ATOMIC_MODESET_AVAILABLE */

-#if defined(NV_DRM_AVAILABLE)
+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)

 #include "nvidia-drm-priv.h"
 #include "nvidia-drm-encoder.h"
@@ -139,8 +139,12 @@ nv_drm_encoder_new(struct drm_device *dev,

    ret = drm_encoder_init(dev,
                           &nv_encoder->base, &nv_encoder_funcs,
-                           nvkms_connector_signal_to_drm_encoder_signal(format),
-                           NULL);
+                           nvkms_connector_signal_to_drm_encoder_signal(format)
+#if defined(NV_DRM_ENCODER_INIT_HAS_NAME_ARG)
+                           , NULL
+#endif
+                           );
+
    if (ret != 0) {
        nv_drm_free(nv_encoder);

@@ -201,7 +205,7 @@ nv_drm_add_encoder(struct drm_device *dev, NvKmsKapiDisplay hDisplay)
    encoder = nv_drm_encoder_new(dev,
                                 displayInfo->handle,
                                 connectorInfo->signalFormat,
-                                 get_crtc_mask(dev, displayInfo->headMask));
+                                 get_crtc_mask(dev, connectorInfo->headMask));

    if (IS_ERR(encoder)) {
        ret = PTR_ERR(encoder);
@@ -296,7 +300,7 @@ void nv_drm_handle_display_change(struct nv_drm_device *nv_dev,

    nv_drm_connector_mark_connection_status_dirty(nv_encoder->nv_connector);

-    schedule_delayed_work(&nv_dev->hotplug_event_work, 0);
+    drm_kms_helper_hotplug_event(dev);
 }

 void nv_drm_handle_dynamic_display_connected(struct nv_drm_device *nv_dev,
@@ -315,7 +319,7 @@ void nv_drm_handle_dynamic_display_connected(struct nv_drm_device *nv_dev,
    nv_encoder = get_nv_encoder_from_nvkms_display(dev, hDisplay);

    if (nv_encoder != NULL) {
-        NV_DRM_DEV_LOG_INFO(
+        NV_DRM_DEV_LOG_ERR(
            nv_dev,
            "Encoder with NvKmsKapiDisplay 0x%08x already exists.",
            hDisplay);
@@ -332,6 +336,17 @@ void nv_drm_handle_dynamic_display_connected(struct nv_drm_device *nv_dev,
        return;
    }

-    schedule_delayed_work(&nv_dev->hotplug_event_work, 0);
+    /*
+     * On some kernels, DRM has the notion of a "primary group" that
+     * tracks the global mode setting state for the device.
+     *
+     * On kernels where DRM has a primary group, we need to reinitialize
+     * after adding encoders and connectors.
+     */
+#if defined(NV_DRM_REINIT_PRIMARY_MODE_GROUP_PRESENT)
+    drm_reinit_primary_mode_group(dev);
+#endif
+
+    drm_kms_helper_hotplug_event(dev);
 }
 #endif
--- a/kernel-open/nvidia-drm/nvidia-drm-encoder.h
+++ b/kernel-open/nvidia-drm/nvidia-drm-encoder.h
@@ -25,11 +25,15 @@

 #include "nvidia-drm-conftest.h"

-#if defined(NV_DRM_AVAILABLE)
+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)

 #include "nvidia-drm-priv.h"

+#if defined(NV_DRM_DRM_ENCODER_H_PRESENT)
 #include <drm/drm_encoder.h>
+#else
+#include <drm/drmP.h>
+#endif

 #include "nvkms-kapi.h"

@@ -59,6 +63,6 @@ void nv_drm_handle_display_change(struct nv_drm_device *nv_dev,
 void nv_drm_handle_dynamic_display_connected(struct nv_drm_device *nv_dev,
                                             NvKmsKapiDisplay hDisplay);

-#endif /* NV_DRM_AVAILABLE */
+#endif /* NV_DRM_ATOMIC_MODESET_AVAILABLE */

 #endif /* __NVIDIA_DRM_ENCODER_H__ */
--- a/kernel-open/nvidia-drm/nvidia-drm-fb.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-fb.c
@@ -20,9 +20,9 @@
 * DEALINGS IN THE SOFTWARE.
 */

-#include "nvidia-drm-conftest.h" /* NV_DRM_AVAILABLE */
+#include "nvidia-drm-conftest.h" /* NV_DRM_ATOMIC_MODESET_AVAILABLE */

-#if defined(NV_DRM_AVAILABLE)
+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)

 #include "nvidia-drm-priv.h"
 #include "nvidia-drm-ioctl.h"
@@ -36,15 +36,12 @@

 static void __nv_drm_framebuffer_free(struct nv_drm_framebuffer *nv_fb)
 {
-    struct drm_framebuffer *fb = &nv_fb->base;
    uint32_t i;

    /* Unreference gem object */
-    for (i = 0; i < NVKMS_MAX_PLANES_PER_SURFACE; i++) {
-        struct drm_gem_object *gem = fb->obj[i];
-        if (gem != NULL) {
-            struct nv_drm_gem_object *nv_gem = to_nv_gem_object(gem);
-            nv_drm_gem_object_unreference_unlocked(nv_gem);
+    for (i = 0; i < ARRAY_SIZE(nv_fb->nv_gem); i++) {
+        if (nv_fb->nv_gem[i] != NULL) {
+            nv_drm_gem_object_unreference_unlocked(nv_fb->nv_gem[i]);
        }
    }

@@ -72,8 +69,10 @@ static int
 nv_drm_framebuffer_create_handle(struct drm_framebuffer *fb,
                                 struct drm_file *file, unsigned int *handle)
 {
+    struct nv_drm_framebuffer *nv_fb = to_nv_framebuffer(fb);
+
    return nv_drm_gem_handle_create(file,
-                                    to_nv_gem_object(fb->obj[0]),
+                                    nv_fb->nv_gem[0],
                                    handle);
 }

@@ -83,12 +82,12 @@ static struct drm_framebuffer_funcs nv_framebuffer_funcs = {
 };

 static struct nv_drm_framebuffer *nv_drm_framebuffer_alloc(
-    struct nv_drm_device *nv_dev,
+    struct drm_device *dev,
    struct drm_file *file,
-    const struct drm_mode_fb_cmd2 *cmd)
+    struct drm_mode_fb_cmd2 *cmd)
 {
+    struct nv_drm_device *nv_dev = to_nv_device(dev);
    struct nv_drm_framebuffer *nv_fb;
-    struct nv_drm_gem_object *nv_gem;
    const int num_planes = nv_drm_format_num_planes(cmd->pixel_format);
    uint32_t i;

@@ -102,22 +101,21 @@ static struct nv_drm_framebuffer *nv_drm_framebuffer_alloc(
        return ERR_PTR(-ENOMEM);
    }

-    if (num_planes > NVKMS_MAX_PLANES_PER_SURFACE) {
+    if (num_planes > ARRAY_SIZE(nv_fb->nv_gem)) {
        NV_DRM_DEV_DEBUG_DRIVER(nv_dev, "Unsupported number of planes");
        goto failed;
    }

    for (i = 0; i < num_planes; i++) {
-        nv_gem = nv_drm_gem_object_lookup(file, cmd->handles[i]);
-
-        if (nv_gem == NULL) {
+        if ((nv_fb->nv_gem[i] = nv_drm_gem_object_lookup(
+                        dev,
+                        file,
+                        cmd->handles[i])) == NULL) {
            NV_DRM_DEV_DEBUG_DRIVER(
                nv_dev,
                "Failed to find gem object of type nvkms memory");
            goto failed;
        }
-
-        nv_fb->base.obj[i] = &nv_gem->base;
    }

     return nv_fb;
@@ -137,14 +135,12 @@ static int nv_drm_framebuffer_init(struct drm_device *dev,
 {
    struct nv_drm_device *nv_dev = to_nv_device(dev);
    struct NvKmsKapiCreateSurfaceParams params = { };
-    struct nv_drm_gem_object *nv_gem;
-    struct drm_framebuffer *fb = &nv_fb->base;
    uint32_t i;
    int ret;

    /* Initialize the base framebuffer object and add it to drm subsystem */

-    ret = drm_framebuffer_init(dev, fb, &nv_framebuffer_funcs);
+    ret = drm_framebuffer_init(dev, &nv_fb->base, &nv_framebuffer_funcs);
    if (ret != 0) {
        NV_DRM_DEV_DEBUG_DRIVER(
            nv_dev,
@@ -152,18 +148,15 @@ static int nv_drm_framebuffer_init(struct drm_device *dev,
        return ret;
    }

-    for (i = 0; i < NVKMS_MAX_PLANES_PER_SURFACE; i++) {
-        struct drm_gem_object *gem = fb->obj[i];
-        if (gem != NULL) {
-            nv_gem = to_nv_gem_object(gem);
-
-            params.planes[i].memory = nv_gem->pMemory;
-            params.planes[i].offset = fb->offsets[i];
-            params.planes[i].pitch = fb->pitches[i];
+    for (i = 0; i < ARRAY_SIZE(nv_fb->nv_gem); i++) {
+        if (nv_fb->nv_gem[i] != NULL) {
+            params.planes[i].memory = nv_fb->nv_gem[i]->pMemory;
+            params.planes[i].offset = nv_fb->base.offsets[i];
+            params.planes[i].pitch = nv_fb->base.pitches[i];
        }
    }
-    params.height = fb->height;
-    params.width = fb->width;
+    params.height = nv_fb->base.height;
+    params.width = nv_fb->base.width;
    params.format = format;

    if (have_modifier) {
@@ -171,88 +164,36 @@ static int nv_drm_framebuffer_init(struct drm_device *dev,
        params.layout = (modifier & 0x10) ?
            NvKmsSurfaceMemoryLayoutBlockLinear :
            NvKmsSurfaceMemoryLayoutPitch;
-
-        // See definition of DRM_FORMAT_MOD_NVIDIA_BLOCK_LINEAR_2D, we are testing
-        // 'c', the lossless compression field of the modifier
-        if (params.layout == NvKmsSurfaceMemoryLayoutBlockLinear &&
-            (modifier >> 23) & 0x7) {
-            NV_DRM_DEV_LOG_ERR(
-                    nv_dev,
-                    "Cannot create FB from compressible surface allocation");
-            goto fail;
-        }
-
        params.log2GobsPerBlockY = modifier & 0xf;
    } else {
        params.explicit_layout = false;
    }

-    /*
-     * XXX work around an invalid pitch assumption in DRM.
-     *
-     * The smallest pitch the display hardware allows is 256.
-     *
-     * If a DRM client allocates a 32x32 cursor surface through
-     * DRM_IOCTL_MODE_CREATE_DUMB, we'll correctly round the pitch to 256:
-     *
-     *     pitch = round(32width * 4Bpp, 256) = 256
-     *
-     * and then allocate an 8k surface:
-     *
-     *     size = pitch * 32height = 8196
-     *
-     * and report the rounded pitch and size back to the client through the
-     * struct drm_mode_create_dumb ioctl params.
-     *
-     * But when the DRM client passes that buffer object handle to
-     * DRM_IOCTL_MODE_CURSOR, the client has no way to specify the pitch.  This
-     * path in drm:
-     *
-     *    DRM_IOCTL_MODE_CURSOR
-     *     drm_mode_cursor_ioctl()
-     *      drm_mode_cursor_common()
-     *       drm_mode_cursor_universal()
-     *
-     * will implicitly create a framebuffer from the buffer object, and compute
-     * the pitch as width x 32 (without aligning to our minimum pitch).
-     *
-     * Intercept this case and force the pitch back to 256.
-     */
-    if ((params.width == 32) &&
-        (params.height == 32) &&
-        (params.planes[0].pitch == 128)) {
-        params.planes[0].pitch = 256;
-    }
-
    /* Create NvKmsKapiSurface */

    nv_fb->pSurface = nvKms->createSurface(nv_dev->pDevice, &params);
    if (nv_fb->pSurface == NULL) {
        NV_DRM_DEV_DEBUG_DRIVER(nv_dev, "Failed to create NvKmsKapiSurface");
-        goto fail;
+        drm_framebuffer_cleanup(&nv_fb->base);
+        return -EINVAL;
    }

    return 0;
-
-fail:
-    drm_framebuffer_cleanup(fb);
-    return -EINVAL;
 }

-struct drm_framebuffer *nv_drm_framebuffer_create(
+struct drm_framebuffer *nv_drm_internal_framebuffer_create(
    struct drm_device *dev,
    struct drm_file *file,
-#if defined(NV_DRM_FB_CREATE_TAKES_FORMAT_INFO)
-    const struct drm_format_info *info,
-#endif
-    const struct drm_mode_fb_cmd2 *cmd)
+    struct drm_mode_fb_cmd2 *cmd)
 {
    struct nv_drm_device *nv_dev = to_nv_device(dev);
    struct nv_drm_framebuffer *nv_fb;
    uint64_t modifier = 0;
    int ret;
    enum NvKmsSurfaceMemoryFormat format;
+#if defined(NV_DRM_FORMAT_MODIFIERS_PRESENT)
    int i;
+#endif
    bool have_modifier = false;

    /* Check whether NvKms supports the given pixel format */
@@ -263,6 +204,7 @@ struct drm_framebuffer *nv_drm_framebuffer_create(
        return ERR_PTR(-EINVAL);
    }

+#if defined(NV_DRM_FORMAT_MODIFIERS_PRESENT)
    if (cmd->flags & DRM_MODE_FB_MODIFIERS) {
        have_modifier = true;
        modifier = cmd->modifier[0];
@@ -276,13 +218,14 @@ struct drm_framebuffer *nv_drm_framebuffer_create(
        if (nv_dev->modifiers[i] == DRM_FORMAT_MOD_INVALID) {
            NV_DRM_DEV_DEBUG_DRIVER(
                nv_dev,
-                "Invalid format modifier for framebuffer object: 0x%016" NvU64_fmtx,
+                "Invalid format modifier for framebuffer object: 0x%016llx",
                modifier);
            return ERR_PTR(-EINVAL);
        }
    }
+#endif

-    nv_fb = nv_drm_framebuffer_alloc(nv_dev, file, cmd);
+    nv_fb = nv_drm_framebuffer_alloc(dev, file, cmd);
    if (IS_ERR(nv_fb)) {
        return (struct drm_framebuffer *)nv_fb;
    }
@@ -290,11 +233,10 @@ struct drm_framebuffer *nv_drm_framebuffer_create(
    /* Fill out framebuffer metadata from the userspace fb creation request */

    drm_helper_mode_fill_fb_struct(
+        #if defined(NV_DRM_HELPER_MODE_FILL_FB_STRUCT_HAS_DEV_ARG)
        dev,
+        #endif
        &nv_fb->base,
-#if defined(NV_DRM_FB_CREATE_TAKES_FORMAT_INFO)
-        info,
-#endif
        cmd);

    /*
--- a/kernel-open/nvidia-drm/nvidia-drm-fb.h
+++ b/kernel-open/nvidia-drm/nvidia-drm-fb.h
@@ -25,19 +25,25 @@

 #include "nvidia-drm-conftest.h"

-#if defined(NV_DRM_AVAILABLE)
+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)

 #if defined(NV_DRM_DRMP_H_PRESENT)
 #include <drm/drmP.h>
 #endif

+#if defined(NV_DRM_DRM_FRAMEBUFFER_H_PRESENT)
 #include <drm/drm_framebuffer.h>
+#endif

+#include "nvidia-drm-gem-nvkms-memory.h"
 #include "nvkms-kapi.h"

 struct nv_drm_framebuffer {
    struct NvKmsKapiSurface *pSurface;

+    struct nv_drm_gem_object*
+        nv_gem[NVKMS_MAX_PLANES_PER_SURFACE];
+
    struct drm_framebuffer base;
 };

@@ -50,14 +56,11 @@ static inline struct nv_drm_framebuffer *to_nv_framebuffer(
    return container_of(fb, struct nv_drm_framebuffer, base);
 }

-struct drm_framebuffer *nv_drm_framebuffer_create(
+struct drm_framebuffer *nv_drm_internal_framebuffer_create(
    struct drm_device *dev,
    struct drm_file *file,
-#if defined(NV_DRM_FB_CREATE_TAKES_FORMAT_INFO)
-    const struct drm_format_info *info,
-#endif
-    const struct drm_mode_fb_cmd2 *cmd);
+    struct drm_mode_fb_cmd2 *cmd);

-#endif /* NV_DRM_AVAILABLE */
+#endif /* NV_DRM_ATOMIC_MODESET_AVAILABLE */

 #endif /* __NVIDIA_DRM_FB_H__ */
--- a/kernel-open/nvidia-drm/nvidia-drm-fence.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-fence.c
--- a/kernel-open/nvidia-drm/nvidia-drm-format.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-format.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2019-2022, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2019, NVIDIA CORPORATION. All rights reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
@@ -20,9 +20,9 @@
 * DEALINGS IN THE SOFTWARE.
 */

-#include "nvidia-drm-conftest.h" /* NV_DRM_AVAILABLE */
+#include "nvidia-drm-conftest.h" /* NV_DRM_ATOMIC_MODESET_AVAILABLE */

-#if defined(NV_DRM_AVAILABLE)
+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)

 #if defined(NV_DRM_DRMP_H_PRESENT)
 #include <drm/drmP.h>
@@ -40,16 +40,9 @@ static const u32  nvkms_to_drm_format[] = {
    [NvKmsSurfaceMemoryFormatR5G6B5]      = DRM_FORMAT_RGB565,
    [NvKmsSurfaceMemoryFormatA8R8G8B8]    = DRM_FORMAT_ARGB8888,
    [NvKmsSurfaceMemoryFormatX8R8G8B8]    = DRM_FORMAT_XRGB8888,
-    [NvKmsSurfaceMemoryFormatX8B8G8R8]    = DRM_FORMAT_XBGR8888,
    [NvKmsSurfaceMemoryFormatA2B10G10R10] = DRM_FORMAT_ABGR2101010,
    [NvKmsSurfaceMemoryFormatX2B10G10R10] = DRM_FORMAT_XBGR2101010,
    [NvKmsSurfaceMemoryFormatA8B8G8R8]    = DRM_FORMAT_ABGR8888,
-#if defined(DRM_FORMAT_ABGR16161616F)
-    [NvKmsSurfaceMemoryFormatRF16GF16BF16AF16] = DRM_FORMAT_ABGR16161616F,
-#endif
-#if defined(DRM_FORMAT_XBGR16161616F)
-    [NvKmsSurfaceMemoryFormatRF16GF16BF16XF16] = DRM_FORMAT_XBGR16161616F,
-#endif

    [NvKmsSurfaceMemoryFormatY8_U8__Y8_V8_N422] = DRM_FORMAT_YUYV,
    [NvKmsSurfaceMemoryFormatU8_Y8__V8_Y8_N422] = DRM_FORMAT_UYVY,
@@ -166,37 +159,4 @@ uint32_t *nv_drm_format_array_alloc(
    return array;
 }

-bool nv_drm_format_is_yuv(u32 format)
-{
-#if defined(NV_DRM_FORMAT_INFO_HAS_IS_YUV)
-    const struct drm_format_info *format_info = drm_format_info(format);
-    return (format_info != NULL) && format_info->is_yuv;
-#else
-    switch (format) {
-        case DRM_FORMAT_YUYV:
-        case DRM_FORMAT_UYVY:
-
-        case DRM_FORMAT_NV24:
-        case DRM_FORMAT_NV42:
-        case DRM_FORMAT_NV16:
-        case DRM_FORMAT_NV61:
-        case DRM_FORMAT_NV12:
-        case DRM_FORMAT_NV21:
-
-#if defined(DRM_FORMAT_P210)
-        case DRM_FORMAT_P210:
-#endif
-#if defined(DRM_FORMAT_P010)
-        case DRM_FORMAT_P010:
-#endif
-#if defined(DRM_FORMAT_P012)
-        case DRM_FORMAT_P012:
-#endif
-            return true;
-        default:
-            return false;
-    }
-#endif
-}
-
 #endif
--- a/kernel-open/nvidia-drm/nvidia-drm-format.h
+++ b/kernel-open/nvidia-drm/nvidia-drm-format.h
@@ -25,7 +25,7 @@

 #include "nvidia-drm-conftest.h"

-#if defined(NV_DRM_AVAILABLE)
+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)

 #include <drm/drm_fourcc.h>

@@ -38,8 +38,6 @@ uint32_t *nv_drm_format_array_alloc(
    unsigned int *count,
    const long unsigned int nvkms_format_mask);

-bool nv_drm_format_is_yuv(u32 format);
-
-#endif /* NV_DRM_AVAILABLE */
+#endif /* NV_DRM_ATOMIC_MODESET_AVAILABLE */

 #endif /* __NVIDIA_DRM_FORMAT_H__ */
--- a/kernel-open/nvidia-drm/nvidia-drm-gem-dma-buf.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-gem-dma-buf.c
@@ -24,13 +24,17 @@

 #if defined(NV_DRM_AVAILABLE)

+#if defined(NV_DRM_DRM_PRIME_H_PRESENT)
 #include <drm/drm_prime.h>
+#endif

 #if defined(NV_DRM_DRMP_H_PRESENT)
 #include <drm/drmP.h>
 #endif

+#if defined(NV_DRM_DRM_DRV_H_PRESENT)
 #include <drm/drm_drv.h>
+#endif

 #include "nvidia-drm-gem-dma-buf.h"
 #include "nvidia-drm-ioctl.h"
@@ -43,10 +47,12 @@ void __nv_drm_gem_dma_buf_free(struct nv_drm_gem_object *nv_gem)
    struct nv_drm_device *nv_dev = nv_gem->nv_dev;
    struct nv_drm_gem_dma_buf *nv_dma_buf = to_nv_dma_buf(nv_gem);

+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)
    if (nv_dma_buf->base.pMemory) {
        /* Free NvKmsKapiMemory handle associated with this gem object */
        nvKms->freeMemory(nv_dev->pDevice, nv_dma_buf->base.pMemory);
    }
+#endif

    drm_prime_gem_destroy(&nv_gem->base, nv_dma_buf->sgt);

@@ -65,42 +71,12 @@ static int __nv_drm_gem_dma_buf_create_mmap_offset(
 static int __nv_drm_gem_dma_buf_mmap(struct nv_drm_gem_object *nv_gem,
                                     struct vm_area_struct *vma)
 {
-#if defined(NV_LINUX)
    struct dma_buf_attachment *attach = nv_gem->base.import_attach;
    struct dma_buf *dma_buf = attach->dmabuf;
-#endif
    struct file *old_file;
    int ret;

    /* check if buffer supports mmap */
-#if defined(NV_BSD)
-    /*
-     * Most of the FreeBSD DRM code refers to struct file*, which is actually
-     * a struct linux_file*. The dmabuf code in FreeBSD is not actually plumbed
-     * through the same linuxkpi bits it seems (probably so it can be used
-     * elsewhere), so dma_buf->file really is a native FreeBSD struct file...
-     */
-    if (!nv_gem->base.filp->f_op->mmap)
-        return -EINVAL;
-
-    /* readjust the vma */
-    get_file(nv_gem->base.filp);
-    old_file = vma->vm_file;
-    vma->vm_file = nv_gem->base.filp;
-    vma->vm_pgoff -= drm_vma_node_start(&nv_gem->base.vma_node);
-
-    ret = nv_gem->base.filp->f_op->mmap(nv_gem->base.filp, vma);
-
-    if (ret) {
-        /* restore old parameters on failure */
-        vma->vm_file = old_file;
-        vma->vm_pgoff += drm_vma_node_start(&nv_gem->base.vma_node);
-        fput(nv_gem->base.filp);
-    } else {
-        if (old_file)
-            fput(old_file);
-    }
-#else
    if (!dma_buf->file->f_op->mmap)
        return -EINVAL;

@@ -108,20 +84,18 @@ static int __nv_drm_gem_dma_buf_mmap(struct nv_drm_gem_object *nv_gem,
    get_file(dma_buf->file);
    old_file = vma->vm_file;
    vma->vm_file = dma_buf->file;
-    vma->vm_pgoff -= drm_vma_node_start(&nv_gem->base.vma_node);
+    vma->vm_pgoff -= drm_vma_node_start(&nv_gem->base.vma_node);;

    ret = dma_buf->file->f_op->mmap(dma_buf->file, vma);

    if (ret) {
        /* restore old parameters on failure */
        vma->vm_file = old_file;
-        vma->vm_pgoff += drm_vma_node_start(&nv_gem->base.vma_node);
        fput(dma_buf->file);
    } else {
        if (old_file)
            fput(old_file);
    }
-#endif

    return ret;
 }
@@ -151,11 +125,13 @@ nv_drm_gem_prime_import_sg_table(struct drm_device *dev,
    BUG_ON(dma_buf->size % PAGE_SIZE);

    pMemory = NULL;
+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)
    if (drm_core_check_feature(dev, DRIVER_MODESET)) {
        pMemory = nvKms->getSystemMemoryHandleFromDmaBuf(nv_dev->pDevice,
                                                  (NvP64)(NvUPtr)dma_buf,
                                                  dma_buf->size - 1);
    }
+#endif

    nv_drm_gem_object_init(nv_dev, &nv_dma_buf->base,
                           &__nv_gem_dma_buf_ops, dma_buf->size, pMemory);
@@ -186,7 +162,7 @@ int nv_drm_gem_export_dmabuf_memory_ioctl(struct drm_device *dev,
    }

    if ((nv_dma_buf = nv_drm_gem_object_dma_buf_lookup(
-             filep, p->handle)) == NULL) {
+             dev, filep, p->handle)) == NULL) {
        ret = -EINVAL;
        NV_DRM_DEV_LOG_ERR(
            nv_dev,
@@ -195,6 +171,7 @@ int nv_drm_gem_export_dmabuf_memory_ioctl(struct drm_device *dev,
        goto done;
    }

+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)
    if (drm_core_check_feature(dev, DRIVER_MODESET)) {
        if (!nv_dma_buf->base.pMemory) {
            /*
@@ -209,6 +186,7 @@ int nv_drm_gem_export_dmabuf_memory_ioctl(struct drm_device *dev,
                             nv_dma_buf->base.base.size - 1);
        }
    }
+#endif

    if (!nv_dma_buf->base.pMemory && !pTmpMemory) {
        ret = -ENOMEM;
--- a/kernel-open/nvidia-drm/nvidia-drm-gem-dma-buf.h
+++ b/kernel-open/nvidia-drm/nvidia-drm-gem-dma-buf.h
@@ -48,11 +48,12 @@ static inline struct nv_drm_gem_dma_buf *to_nv_dma_buf(

 static inline
 struct nv_drm_gem_dma_buf *nv_drm_gem_object_dma_buf_lookup(
+    struct drm_device *dev,
    struct drm_file *filp,
    u32 handle)
 {
    struct nv_drm_gem_object *nv_gem =
-            nv_drm_gem_object_lookup(filp, handle);
+            nv_drm_gem_object_lookup(dev, filp, handle);

    if (nv_gem != NULL && nv_gem->ops != &__nv_gem_dma_buf_ops) {
        nv_drm_gem_object_unreference_unlocked(nv_gem);
--- a/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.c
@@ -22,19 +22,23 @@

 #include "nvidia-drm-conftest.h"

-#if defined(NV_DRM_AVAILABLE)
+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)

 #include "nvidia-drm-gem-nvkms-memory.h"
 #include "nvidia-drm-helper.h"
 #include "nvidia-drm-ioctl.h"

+#if defined(NV_DRM_DRM_DRV_H_PRESENT)
 #include <drm/drm_drv.h>
+#endif
+
+#if defined(NV_DRM_DRM_PRIME_H_PRESENT)
 #include <drm/drm_prime.h>
+#endif

 #include <linux/io.h>
-#if defined(NV_BSD)
-#include <vm/vm_pageout.h>
-#endif
+
+#include "nv-mm.h"

 static void __nv_drm_gem_nvkms_memory_free(struct nv_drm_gem_object *nv_gem)
 {
@@ -64,20 +68,9 @@ static void __nv_drm_gem_nvkms_memory_free(struct nv_drm_gem_object *nv_gem)
    nv_drm_free(nv_nvkms_memory);
 }

-static int __nv_drm_gem_nvkms_map(
-    struct nv_drm_gem_nvkms_memory *nv_nvkms_memory);
-
 static int __nv_drm_gem_nvkms_mmap(struct nv_drm_gem_object *nv_gem,
                                   struct vm_area_struct *vma)
 {
-    struct nv_drm_gem_nvkms_memory *nv_nvkms_memory =
-        to_nv_nvkms_memory(nv_gem);
-
-    int ret = __nv_drm_gem_nvkms_map(nv_nvkms_memory);
-    if (ret) {
-       return ret;
-    }
-
    return drm_gem_mmap_obj(&nv_gem->base,
                drm_vma_node_size(&nv_gem->base.vma_node) << PAGE_SHIFT, vma);
 }
@@ -87,9 +80,10 @@ static vm_fault_t __nv_drm_gem_nvkms_handle_vma_fault(
    struct vm_area_struct *vma,
    struct vm_fault *vmf)
 {
+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)
    struct nv_drm_gem_nvkms_memory *nv_nvkms_memory =
        to_nv_nvkms_memory(nv_gem);
-    unsigned long address = vmf->address;
+    unsigned long address = nv_page_fault_va(vmf);
    struct drm_gem_object *gem = vma->vm_private_data;
    unsigned long page_offset, pfn;
    vm_fault_t ret;
@@ -99,19 +93,9 @@ static vm_fault_t __nv_drm_gem_nvkms_handle_vma_fault(
    if (nv_nvkms_memory->pages_count == 0) {
        pfn = (unsigned long)(uintptr_t)nv_nvkms_memory->pPhysicalAddress;
        pfn >>= PAGE_SHIFT;
-#if defined(NV_LINUX)
-        /*
-         * FreeBSD doesn't set pgoff. We instead have pfn be the base physical
-         * address, and we will calculate the index pidx from the virtual address.
-         *
-         * This only works because linux_cdev_pager_populate passes the pidx as
-         * vmf->virtual_address. Then we turn the virtual address
-         * into a physical page number.
-         */
        pfn += page_offset;
-#endif
    } else {
-        BUG_ON(page_offset >= nv_nvkms_memory->pages_count);
+        BUG_ON(page_offset > nv_nvkms_memory->pages_count);
        pfn = page_to_pfn(nv_nvkms_memory->pages[page_offset]);
    }

@@ -138,6 +122,8 @@ static vm_fault_t __nv_drm_gem_nvkms_handle_vma_fault(
    }
 #endif /* defined(NV_VMF_INSERT_PFN_PRESENT) */
    return ret;
+#endif /* defined(NV_DRM_ATOMIC_MODESET_AVAILABLE) */
+    return VM_FAULT_SIGBUS;
 }

 static struct drm_gem_object *__nv_drm_gem_nvkms_prime_dup(
@@ -145,20 +131,13 @@ static struct drm_gem_object *__nv_drm_gem_nvkms_prime_dup(
    const struct nv_drm_gem_object *nv_gem_src);

 static int __nv_drm_gem_nvkms_map(
-    struct nv_drm_gem_nvkms_memory *nv_nvkms_memory)
+    struct nv_drm_device *nv_dev,
+    struct NvKmsKapiMemory *pMemory,
+    struct nv_drm_gem_nvkms_memory *nv_nvkms_memory,
+    uint64_t size)
 {
-    int ret = 0;
-    struct nv_drm_device *nv_dev = nv_nvkms_memory->base.nv_dev;
-    struct NvKmsKapiMemory *pMemory = nv_nvkms_memory->base.pMemory;
-
-    mutex_lock(&nv_nvkms_memory->map_lock);
-
-    if (nv_nvkms_memory->physically_mapped) {
-        goto done;
-    }
-
-    if (!nvKms->isVidmem(pMemory)) {
-        goto done;
+    if (!nv_dev->hasVideoMemory) {
+        return 0;
    }

    if (!nvKms->mapMemory(nv_dev->pDevice,
@@ -169,13 +148,12 @@ static int __nv_drm_gem_nvkms_map(
            nv_dev,
            "Failed to map NvKmsKapiMemory 0x%p",
            pMemory);
-        ret = -ENOMEM;
-        goto done;
+        return -ENOMEM;
    }

    nv_nvkms_memory->pWriteCombinedIORemapAddress = ioremap_wc(
            (uintptr_t)nv_nvkms_memory->pPhysicalAddress,
-            nv_nvkms_memory->base.base.size);
+            size);

    if (!nv_nvkms_memory->pWriteCombinedIORemapAddress) {
        NV_DRM_DEV_LOG_INFO(
@@ -186,51 +164,7 @@ static int __nv_drm_gem_nvkms_map(

    nv_nvkms_memory->physically_mapped = true;

-done:
-    mutex_unlock(&nv_nvkms_memory->map_lock);
-    return ret;
-}
-
-static void *__nv_drm_gem_nvkms_prime_vmap(
-    struct nv_drm_gem_object *nv_gem)
-{
-    struct nv_drm_gem_nvkms_memory *nv_nvkms_memory =
-        to_nv_nvkms_memory(nv_gem);
-
-    int ret = __nv_drm_gem_nvkms_map(nv_nvkms_memory);
-    if (ret) {
-       return ERR_PTR(ret);
-    }
-
-    if (nv_nvkms_memory->physically_mapped) {
-        return nv_nvkms_memory->pWriteCombinedIORemapAddress;
-    }
-
-    /*
-     * If this buffer isn't physically mapped, it might be backed by struct
-     * pages. Use vmap in that case. Do a noncached mapping for system memory
-     * as display is non io-coherent device in case of Tegra.
-     */
-    if (nv_nvkms_memory->pages_count > 0) {
-         return nv_drm_vmap(nv_nvkms_memory->pages,
-                            nv_nvkms_memory->pages_count,
-                            false);
-    }
-
-    return ERR_PTR(-ENOMEM);
-}
-
-static void __nv_drm_gem_nvkms_prime_vunmap(
-    struct nv_drm_gem_object *nv_gem,
-    void *address)
-{
-    struct nv_drm_gem_nvkms_memory *nv_nvkms_memory =
-        to_nv_nvkms_memory(nv_gem);
-
-    if (!nv_nvkms_memory->physically_mapped &&
-        nv_nvkms_memory->pages_count > 0) {
-        nv_drm_vunmap(address);
-    }
+    return 0;
 }

 static int __nv_drm_gem_map_nvkms_memory_offset(
@@ -238,7 +172,20 @@ static int __nv_drm_gem_map_nvkms_memory_offset(
    struct nv_drm_gem_object *nv_gem,
    uint64_t *offset)
 {
-    return nv_drm_gem_create_mmap_offset(nv_gem, offset);
+    struct nv_drm_gem_nvkms_memory *nv_nvkms_memory =
+        to_nv_nvkms_memory(nv_gem);
+
+    if (!nv_nvkms_memory->physically_mapped) {
+        int ret = __nv_drm_gem_nvkms_map(nv_dev,
+                                         nv_nvkms_memory->base.pMemory,
+                                         nv_nvkms_memory,
+                                         nv_nvkms_memory->base.base.size);
+        if (ret) {
+           return ret;
+        }
+    }
+
+    return nv_drm_gem_create_mmap_offset(&nv_nvkms_memory->base, offset);
 }

 static struct sg_table *__nv_drm_gem_nvkms_memory_prime_get_sg_table(
@@ -250,11 +197,11 @@ static struct sg_table *__nv_drm_gem_nvkms_memory_prime_get_sg_table(
    struct sg_table *sg_table;

    if (nv_nvkms_memory->pages_count == 0) {
-        NV_DRM_DEV_DEBUG_DRIVER(
+        NV_DRM_DEV_LOG_ERR(
                nv_dev,
                "Cannot create sg_table for NvKmsKapiMemory 0x%p",
                nv_gem->pMemory);
-        return ERR_PTR(-ENOMEM);
+        return NULL;
    }

    sg_table = nv_drm_prime_pages_to_sg(nv_dev->dev,
@@ -267,8 +214,6 @@ static struct sg_table *__nv_drm_gem_nvkms_memory_prime_get_sg_table(
 const struct nv_drm_gem_object_funcs nv_gem_nvkms_memory_ops = {
    .free = __nv_drm_gem_nvkms_memory_free,
    .prime_dup = __nv_drm_gem_nvkms_prime_dup,
-    .prime_vmap = __nv_drm_gem_nvkms_prime_vmap,
-    .prime_vunmap = __nv_drm_gem_nvkms_prime_vunmap,
    .mmap = __nv_drm_gem_nvkms_mmap,
    .handle_vma_fault = __nv_drm_gem_nvkms_handle_vma_fault,
    .create_mmap_offset = __nv_drm_gem_map_nvkms_memory_offset,
@@ -284,26 +229,16 @@ static int __nv_drm_nvkms_gem_obj_init(
    NvU64 *pages = NULL;
    NvU32 numPages = 0;

-    if ((size % PAGE_SIZE) != 0) {
-        NV_DRM_DEV_LOG_ERR(
-            nv_dev,
-            "NvKmsKapiMemory 0x%p size should be in a multiple of page size to "
-            "create a gem object",
-            pMemory);
-        return -EINVAL;
-    }
-
-    mutex_init(&nv_nvkms_memory->map_lock);
    nv_nvkms_memory->pPhysicalAddress = NULL;
    nv_nvkms_memory->pWriteCombinedIORemapAddress = NULL;
    nv_nvkms_memory->physically_mapped = false;

-    if (!nvKms->isVidmem(pMemory) &&
-        !nvKms->getMemoryPages(nv_dev->pDevice,
+    if (!nvKms->getMemoryPages(nv_dev->pDevice,
                               pMemory,
                               &pages,
-                               &numPages)) {
-        /* GetMemoryPages will fail for vidmem allocations,
+                               &numPages) &&
+        !nv_dev->hasVideoMemory) {
+        /* GetMemoryPages may fail for vidmem allocations,
         * but it should not fail for sysmem allocations. */
        NV_DRM_DEV_LOG_ERR(nv_dev,
            "Failed to get memory pages for NvKmsKapiMemory 0x%p",
@@ -330,7 +265,6 @@ int nv_drm_dumb_create(
    struct nv_drm_gem_nvkms_memory *nv_nvkms_memory;
    uint8_t compressible = 0;
    struct NvKmsKapiMemory *pMemory;
-    struct NvKmsKapiAllocateMemoryParams allocParams = { };
    int ret = 0;

    args->pitch = roundup(args->width * ((args->bpp + 7) >> 3),
@@ -348,19 +282,23 @@ int nv_drm_dumb_create(
        goto fail;
    }

-    allocParams.layout = NvKmsSurfaceMemoryLayoutPitch;
-    allocParams.type = NVKMS_KAPI_ALLOCATION_TYPE_SCANOUT;
-    allocParams.size = args->size;
-    allocParams.noDisplayCaching = true;
-    allocParams.useVideoMemory = nv_dev->hasVideoMemory;
-    allocParams.compressible = &compressible;
+    if (nv_dev->hasVideoMemory) {
+        pMemory = nvKms->allocateVideoMemory(nv_dev->pDevice,
+                                             NvKmsSurfaceMemoryLayoutPitch,
+                                             args->size,
+                                             &compressible);
+    } else {
+        pMemory = nvKms->allocateSystemMemory(nv_dev->pDevice,
+                                              NvKmsSurfaceMemoryLayoutPitch,
+                                              args->size,
+                                              &compressible);
+    }

-    pMemory = nvKms->allocateMemory(nv_dev->pDevice, &allocParams);
    if (pMemory == NULL) {
        ret = -ENOMEM;
        NV_DRM_DEV_LOG_ERR(
            nv_dev,
-            "Failed to allocate NvKmsKapiMemory for dumb object of size %" NvU64_fmtu,
+            "Failed to allocate NvKmsKapiMemory for dumb object of size %llu",
            args->size);
        goto nvkms_alloc_memory_failed;
    }
@@ -374,7 +312,7 @@ int nv_drm_dumb_create(
     * to use dumb buffers for software rendering, so they're not much use
     * without a CPU mapping.
     */
-    ret = __nv_drm_gem_nvkms_map(nv_nvkms_memory);
+    ret = __nv_drm_gem_nvkms_map(nv_dev, pMemory, nv_nvkms_memory, args->size);
    if (ret) {
        nv_drm_gem_object_unreference_unlocked(&nv_nvkms_memory->base);
        goto fail;
@@ -404,7 +342,7 @@ int nv_drm_gem_import_nvkms_memory_ioctl(struct drm_device *dev,
    int ret;

    if (!drm_core_check_feature(dev, DRIVER_MODESET)) {
-        ret = -EOPNOTSUPP;
+        ret = -EINVAL;
        goto failed;
    }

@@ -454,7 +392,7 @@ int nv_drm_gem_export_nvkms_memory_ioctl(struct drm_device *dev,
    int ret = 0;

    if (!drm_core_check_feature(dev, DRIVER_MODESET)) {
-        ret = -EOPNOTSUPP;
+        ret = -EINVAL;
        goto done;
    }

@@ -465,6 +403,7 @@ int nv_drm_gem_export_nvkms_memory_ioctl(struct drm_device *dev,
    }

    if ((nv_nvkms_memory = nv_drm_gem_object_nvkms_memory_lookup(
+                    dev,
                    filep,
                    p->handle)) == NULL) {
        ret = -EINVAL;
@@ -501,16 +440,15 @@ int nv_drm_gem_alloc_nvkms_memory_ioctl(struct drm_device *dev,
    struct drm_nvidia_gem_alloc_nvkms_memory_params *p = data;
    struct nv_drm_gem_nvkms_memory *nv_nvkms_memory = NULL;
    struct NvKmsKapiMemory *pMemory;
-    struct NvKmsKapiAllocateMemoryParams allocParams = { };
+    enum NvKmsSurfaceMemoryLayout layout;
    int ret = 0;

    if (!drm_core_check_feature(dev, DRIVER_MODESET)) {
-        ret = -EOPNOTSUPP;
+        ret = -EINVAL;
        goto failed;
    }

-    if ((p->__pad0 != 0) || (p->__pad1 != 0)) {
-        ret = -EINVAL;
+    if (p->__pad != 0) {
        NV_DRM_DEV_LOG_ERR(nv_dev, "non-zero value in padding field");
        goto failed;
    }
@@ -521,15 +459,21 @@ int nv_drm_gem_alloc_nvkms_memory_ioctl(struct drm_device *dev,
        goto failed;
    }

-    allocParams.layout = p->block_linear ?
+    layout = p->block_linear ?
        NvKmsSurfaceMemoryLayoutBlockLinear : NvKmsSurfaceMemoryLayoutPitch;
-    allocParams.type = (p->flags & NV_GEM_ALLOC_NO_SCANOUT) ?
-        NVKMS_KAPI_ALLOCATION_TYPE_OFFSCREEN : NVKMS_KAPI_ALLOCATION_TYPE_SCANOUT;
-    allocParams.size = p->memory_size;
-    allocParams.useVideoMemory = nv_dev->hasVideoMemory;
-    allocParams.compressible = &p->compressible;

-    pMemory = nvKms->allocateMemory(nv_dev->pDevice, &allocParams);
+    if (nv_dev->hasVideoMemory) {
+        pMemory = nvKms->allocateVideoMemory(nv_dev->pDevice,
+                                             layout,
+                                             p->memory_size,
+                                             &p->compressible);
+    } else {
+        pMemory = nvKms->allocateSystemMemory(nv_dev->pDevice,
+                                              layout,
+                                              p->memory_size,
+                                              &p->compressible);
+    }
+
    if (pMemory == NULL) {
        ret = -EINVAL;
        NV_DRM_DEV_LOG_ERR(nv_dev,
@@ -563,12 +507,14 @@ static struct drm_gem_object *__nv_drm_gem_nvkms_prime_dup(
 {
    struct nv_drm_device *nv_dev = to_nv_device(dev);
    const struct nv_drm_device *nv_dev_src;
+    const struct nv_drm_gem_nvkms_memory *nv_nvkms_memory_src;
    struct nv_drm_gem_nvkms_memory *nv_nvkms_memory;
    struct NvKmsKapiMemory *pMemory;

    BUG_ON(nv_gem_src == NULL || nv_gem_src->ops != &nv_gem_nvkms_memory_ops);

    nv_dev_src = to_nv_device(nv_gem_src->base.dev);
+    nv_nvkms_memory_src = to_nv_nvkms_memory_const(nv_gem_src);

    if ((nv_nvkms_memory =
            nv_drm_calloc(1, sizeof(*nv_nvkms_memory))) == NULL) {
@@ -611,6 +557,7 @@ int nv_drm_dumb_map_offset(struct drm_file *file,
    int ret = -EINVAL;

    if ((nv_nvkms_memory = nv_drm_gem_object_nvkms_memory_lookup(
+                    dev,
                    file,
                    handle)) == NULL) {
        NV_DRM_DEV_LOG_ERR(
@@ -628,13 +575,11 @@ int nv_drm_dumb_map_offset(struct drm_file *file,
    return ret;
 }

-#if defined(NV_DRM_DRIVER_HAS_DUMB_DESTROY)
 int nv_drm_dumb_destroy(struct drm_file *file,
                        struct drm_device *dev,
                        uint32_t handle)
 {
    return drm_gem_handle_delete(file, handle);
 }
-#endif /* NV_DRM_DRIVER_HAS_DUMB_DESTROY */

 #endif
--- a/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.h
+++ b/kernel-open/nvidia-drm/nvidia-drm-gem-nvkms-memory.h
@@ -25,22 +25,15 @@

 #include "nvidia-drm-conftest.h"

-#if defined(NV_DRM_AVAILABLE)
+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)

 #include "nvidia-drm-gem.h"

 struct nv_drm_gem_nvkms_memory {
    struct nv_drm_gem_object base;

-    /*
-     * Lock to protect concurrent writes to physically_mapped, pPhysicalAddress,
-     * and pWriteCombinedIORemapAddress.
-     *
-     * __nv_drm_gem_nvkms_map(), the sole writer, is structured such that
-     * readers are not required to hold the lock.
-     */
-    struct mutex map_lock;
    bool physically_mapped;
+
    void *pPhysicalAddress;
    void *pWriteCombinedIORemapAddress;

@@ -72,11 +65,12 @@ static inline struct nv_drm_gem_nvkms_memory *to_nv_nvkms_memory_const(

 static inline
 struct nv_drm_gem_nvkms_memory *nv_drm_gem_object_nvkms_memory_lookup(
+    struct drm_device *dev,
    struct drm_file *filp,
    u32 handle)
 {
    struct nv_drm_gem_object *nv_gem =
-            nv_drm_gem_object_lookup(filp, handle);
+            nv_drm_gem_object_lookup(dev, filp, handle);

    if (nv_gem != NULL && nv_gem->ops != &nv_gem_nvkms_memory_ops) {
        nv_drm_gem_object_unreference_unlocked(nv_gem);
@@ -103,11 +97,9 @@ int nv_drm_dumb_map_offset(struct drm_file *file,
                           struct drm_device *dev, uint32_t handle,
                           uint64_t *offset);

-#if defined(NV_DRM_DRIVER_HAS_DUMB_DESTROY)
 int nv_drm_dumb_destroy(struct drm_file *file,
                        struct drm_device *dev,
                        uint32_t handle);
-#endif /* NV_DRM_DRIVER_HAS_DUMB_DESTROY */

 struct drm_gem_object *nv_drm_gem_nvkms_prime_import(
    struct drm_device *dev,
--- a/kernel-open/nvidia-drm/nvidia-drm-gem-user-memory.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-gem-user-memory.c
@@ -24,7 +24,9 @@

 #if defined(NV_DRM_AVAILABLE)

+#if defined(NV_DRM_DRM_PRIME_H_PRESENT)
 #include <drm/drm_prime.h>
+#endif

 #include "nvidia-drm-gem-user-memory.h"
 #include "nvidia-drm-helper.h"
@@ -34,14 +36,6 @@
 #include "linux/mm.h"
 #include "nv-mm.h"

-#if defined(NV_LINUX_PFN_T_H_PRESENT)
-#include "linux/pfn_t.h"
-#endif
-
-#if defined(NV_BSD)
-#include <vm/vm_pageout.h>
-#endif
-
 static inline
 void __nv_drm_gem_user_memory_free(struct nv_drm_gem_object *nv_gem)
 {
@@ -70,8 +64,7 @@ static void *__nv_drm_gem_user_memory_prime_vmap(
    struct nv_drm_gem_user_memory *nv_user_memory = to_nv_user_memory(nv_gem);

    return nv_drm_vmap(nv_user_memory->pages,
-                           nv_user_memory->pages_count,
-                           true);
+                           nv_user_memory->pages_count);
 }

 static void __nv_drm_gem_user_memory_prime_vunmap(
@@ -99,68 +92,48 @@ static int __nv_drm_gem_user_memory_mmap(struct nv_drm_gem_object *nv_gem,
        return -EINVAL;
    }

-    nv_vm_flags_clear(vma, VM_PFNMAP);
-    nv_vm_flags_clear(vma, VM_IO);
-    nv_vm_flags_set(vma, VM_MIXEDMAP);
+    vma->vm_flags &= ~VM_PFNMAP;
+    vma->vm_flags &= ~VM_IO;
+    vma->vm_flags |= VM_MIXEDMAP;

    return 0;
 }

-#if defined(NV_LINUX) && !defined(NV_VMF_INSERT_MIXED_PRESENT)
-static vm_fault_t __nv_vm_insert_mixed_helper(
-    struct vm_area_struct *vma,
-    unsigned long address,
-    unsigned long pfn)
-{
-    int ret;
-
-    ret = vm_insert_mixed(vma, address, pfn_to_pfn_t(pfn));
-
-    switch (ret) {
-        case 0:
-        case -EBUSY:
-            /*
-             * EBUSY indicates that another thread already handled
-             * the faulted range.
-             */
-            return VM_FAULT_NOPAGE;
-        case -ENOMEM:
-            return VM_FAULT_OOM;
-        default:
-            WARN_ONCE(1, "Unhandled error in %s: %d\n", __FUNCTION__, ret);
-            return VM_FAULT_SIGBUS;
-    }
-}
-#endif
-
 static vm_fault_t __nv_drm_gem_user_memory_handle_vma_fault(
    struct nv_drm_gem_object *nv_gem,
    struct vm_area_struct *vma,
    struct vm_fault *vmf)
 {
    struct nv_drm_gem_user_memory *nv_user_memory = to_nv_user_memory(nv_gem);
-    unsigned long address = vmf->address;
+    unsigned long address = nv_page_fault_va(vmf);
    struct drm_gem_object *gem = vma->vm_private_data;
    unsigned long page_offset;
-    unsigned long pfn;
+    vm_fault_t ret;

    page_offset = vmf->pgoff - drm_vma_node_start(&gem->vma_node);
-    BUG_ON(page_offset >= nv_user_memory->pages_count);
-    pfn = page_to_pfn(nv_user_memory->pages[page_offset]);

-#if !defined(NV_LINUX)
-    return vmf_insert_pfn(vma, address, pfn);
-#elif defined(NV_VMF_INSERT_MIXED_PRESENT)
+    BUG_ON(page_offset > nv_user_memory->pages_count);

-#if defined(NV_LINUX_PFN_T_H_PRESENT)
-    return vmf_insert_mixed(vma, address, pfn_to_pfn_t(pfn));
-#else
-    return vmf_insert_mixed(vma, address, pfn);
-#endif
+    ret = vm_insert_page(vma, address, nv_user_memory->pages[page_offset]);
+    switch (ret) {
+        case 0:
+        case -EBUSY:
+            /*
+             * EBUSY indicates that another thread already handled
+             * the faulted range.
+             */
+            ret = VM_FAULT_NOPAGE;
+            break;
+        case -ENOMEM:
+            ret = VM_FAULT_OOM;
+            break;
+        default:
+            WARN_ONCE(1, "Unhandled error in %s: %d\n", __FUNCTION__, ret);
+            ret = VM_FAULT_SIGBUS;
+            break;
+    }

-#else
-    return __nv_vm_insert_mixed_helper(vma, address, pfn);
-#endif
+    return ret;
 }

 static int __nv_drm_gem_user_create_mmap_offset(
@@ -198,7 +171,7 @@ int nv_drm_gem_import_userspace_memory_ioctl(struct drm_device *dev,
    if ((params->size % PAGE_SIZE) != 0) {
        NV_DRM_DEV_LOG_ERR(
            nv_dev,
-            "Userspace memory 0x%" NvU64_fmtx " size should be in a multiple of page "
+            "Userspace memory 0x%llx size should be in a multiple of page "
            "size to create a gem object",
            params->address);
        return -EINVAL;
@@ -211,7 +184,7 @@ int nv_drm_gem_import_userspace_memory_ioctl(struct drm_device *dev,
    if (ret != 0) {
        NV_DRM_DEV_LOG_ERR(
            nv_dev,
-            "Failed to lock user pages for address 0x%" NvU64_fmtx ": %d",
+            "Failed to lock user pages for address 0x%llx: %d",
            params->address, ret);
        return ret;
    }
--- a/kernel-open/nvidia-drm/nvidia-drm-gem-user-memory.h
+++ b/kernel-open/nvidia-drm/nvidia-drm-gem-user-memory.h
@@ -52,11 +52,12 @@ int nv_drm_gem_import_userspace_memory_ioctl(struct drm_device *dev,

 static inline
 struct nv_drm_gem_user_memory *nv_drm_gem_object_user_memory_lookup(
+    struct drm_device *dev,
    struct drm_file *filp,
    u32 handle)
 {
    struct nv_drm_gem_object *nv_gem =
-            nv_drm_gem_object_lookup(filp, handle);
+            nv_drm_gem_object_lookup(dev, filp, handle);

    if (nv_gem != NULL && nv_gem->ops != &__nv_gem_user_memory_ops) {
        nv_drm_gem_object_unreference_unlocked(nv_gem);
--- a/kernel-open/nvidia-drm/nvidia-drm-gem.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-gem.c
@@ -26,7 +26,7 @@

 #include "nvidia-drm-priv.h"
 #include "nvidia-drm-ioctl.h"
-#include "nvidia-drm-fence.h"
+#include "nvidia-drm-prime-fence.h"
 #include "nvidia-drm-gem.h"
 #include "nvidia-drm-gem-nvkms-memory.h"
 #include "nvidia-drm-gem-user-memory.h"
@@ -35,10 +35,17 @@
 #include "nvidia-drm-gem-dma-buf.h"
 #include "nvidia-drm-gem-nvkms-memory.h"

+#if defined(NV_DRM_DRM_DRV_H_PRESENT)
 #include <drm/drm_drv.h>
+#endif
+
+#if defined(NV_DRM_DRM_PRIME_H_PRESENT)
 #include <drm/drm_prime.h>
+#endif
+
+#if defined(NV_DRM_DRM_FILE_H_PRESENT)
 #include <drm/drm_file.h>
-#include <drm/drm_vma_manager.h>
+#endif

 #include "linux/dma-buf.h"

@@ -51,7 +58,7 @@ void nv_drm_gem_free(struct drm_gem_object *gem)
    /* Cleanup core gem object */
    drm_gem_object_release(&nv_gem->base);

-#if !defined(NV_DRM_GEM_OBJECT_HAS_RESV)
+#if defined(NV_DRM_FENCE_AVAILABLE) && !defined(NV_DRM_GEM_OBJECT_HAS_RESV)
    nv_dma_resv_fini(&nv_gem->resv);
 #endif

@@ -74,13 +81,10 @@ typedef struct dma_buf_map nv_sysio_map_t;
 static int nv_drm_gem_vmap(struct drm_gem_object *gem,
                           nv_sysio_map_t *map)
 {
-    void *vaddr = nv_drm_gem_prime_vmap(gem);
-    if (vaddr == NULL) {
+    map->vaddr = nv_drm_gem_prime_vmap(gem);
+    if (map->vaddr == NULL) {
        return -ENOMEM;
-    } else if (IS_ERR(vaddr)) {
-        return PTR_ERR(vaddr);
    }
-    map->vaddr = vaddr;
    map->is_iomem = true;
    return 0;
 }
@@ -128,8 +132,13 @@ void nv_drm_gem_object_init(struct nv_drm_device *nv_dev,

    /* Initialize the gem object */

-#if !defined(NV_DRM_GEM_OBJECT_HAS_RESV)
+#if defined(NV_DRM_FENCE_AVAILABLE)
    nv_dma_resv_init(&nv_gem->resv);
+
+#if defined(NV_DRM_GEM_OBJECT_HAS_RESV)
+    nv_gem->base.resv = &nv_gem->resv;
+#endif
+
 #endif

 #if !defined(NV_DRM_DRIVER_HAS_GEM_FREE_OBJECT)
@@ -137,17 +146,12 @@ void nv_drm_gem_object_init(struct nv_drm_device *nv_dev,
 #endif

    drm_gem_private_object_init(dev, &nv_gem->base, size);
-
-    /* Create mmap offset early for drm_gem_prime_mmap(), if possible. */
-    if (nv_gem->ops->create_mmap_offset) {
-        uint64_t offset;
-        nv_gem->ops->create_mmap_offset(nv_dev, nv_gem, &offset);
-    }
 }

 struct drm_gem_object *nv_drm_gem_prime_import(struct drm_device *dev,
                                               struct dma_buf *dma_buf)
 {
+#if defined(NV_DMA_BUF_OWNER_PRESENT)
    struct drm_gem_object *gem_dst;
    struct nv_drm_gem_object *nv_gem_src;

@@ -164,13 +168,11 @@ struct drm_gem_object *nv_drm_gem_prime_import(struct drm_device *dev,
             */
            gem_dst = nv_gem_src->ops->prime_dup(dev, nv_gem_src);

-            if (gem_dst == NULL) {
-                return ERR_PTR(-ENOTSUPP);
-            }
-
-            return gem_dst;
+            if (gem_dst)
+                return gem_dst;
        }
    }
+#endif /* NV_DMA_BUF_OWNER_PRESENT */

    return drm_gem_prime_import(dev, dma_buf);
 }
@@ -210,7 +212,8 @@ void nv_drm_gem_prime_vunmap(struct drm_gem_object *gem, void *address)
 nv_dma_resv_t* nv_drm_gem_prime_res_obj(struct drm_gem_object *obj)
 {
    struct nv_drm_gem_object *nv_gem = to_nv_gem_object(obj);
-    return nv_drm_gem_res_obj(nv_gem);
+
+    return &nv_gem->resv;
 }
 #endif

@@ -222,7 +225,8 @@ int nv_drm_gem_map_offset_ioctl(struct drm_device *dev,
    struct nv_drm_gem_object *nv_gem;
    int ret;

-    if ((nv_gem = nv_drm_gem_object_lookup(filep,
+    if ((nv_gem = nv_drm_gem_object_lookup(dev,
+                                           filep,
                                           params->handle)) == NULL) {
        NV_DRM_DEV_LOG_ERR(
            nv_dev,
@@ -231,7 +235,6 @@ int nv_drm_gem_map_offset_ioctl(struct drm_device *dev,
        return -EINVAL;
    }

-    /* mmap offset creation is idempotent, fetch it by creating it again. */
    if (nv_gem->ops->create_mmap_offset) {
        ret = nv_gem->ops->create_mmap_offset(nv_dev, nv_gem, &params->offset);
    } else {
@@ -247,6 +250,7 @@ int nv_drm_gem_map_offset_ioctl(struct drm_device *dev,
    return ret;
 }

+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)
 int nv_drm_mmap(struct file *file, struct vm_area_struct *vma)
 {
    struct drm_file *priv = file->private_data;
@@ -257,8 +261,8 @@ int nv_drm_mmap(struct file *file, struct vm_area_struct *vma)
    struct nv_drm_gem_object *nv_gem;

    drm_vma_offset_lock_lookup(dev->vma_offset_manager);
-    node = drm_vma_offset_exact_lookup_locked(dev->vma_offset_manager,
-                                              vma->vm_pgoff, vma_pages(vma));
+    node = nv_drm_vma_offset_exact_lookup_locked(dev->vma_offset_manager,
+                                                 vma->vm_pgoff, vma_pages(vma));
    if (likely(node)) {
        obj = container_of(node, struct drm_gem_object, vma_node);
        /*
@@ -284,7 +288,7 @@ int nv_drm_mmap(struct file *file, struct vm_area_struct *vma)
        goto done;
    }

-    if (!drm_vma_node_is_allowed(node, file->private_data)) {
+    if (!nv_drm_vma_node_is_allowed(node, file)) {
        ret = -EACCES;
        goto done;
    }
@@ -295,7 +299,7 @@ int nv_drm_mmap(struct file *file, struct vm_area_struct *vma)
            ret = -EINVAL;
            goto done;
        }
-        nv_vm_flags_clear(vma, VM_MAYWRITE);
+        vma->vm_flags &= ~VM_MAYWRITE;
    }
 #endif

@@ -306,6 +310,7 @@ done:

    return ret;
 }
+#endif

 int nv_drm_gem_identify_object_ioctl(struct drm_device *dev,
                                     void *data, struct drm_file *filep)
@@ -317,24 +322,26 @@ int nv_drm_gem_identify_object_ioctl(struct drm_device *dev,
    struct nv_drm_gem_object *nv_gem = NULL;

    if (!drm_core_check_feature(dev, DRIVER_MODESET)) {
-        return -EOPNOTSUPP;
+        return -EINVAL;
    }

-    nv_dma_buf = nv_drm_gem_object_dma_buf_lookup(filep, p->handle);
+    nv_dma_buf = nv_drm_gem_object_dma_buf_lookup(dev, filep, p->handle);
    if (nv_dma_buf) {
        p->object_type = NV_GEM_OBJECT_DMABUF;
        nv_gem = &nv_dma_buf->base;
        goto done;
    }

-    nv_nvkms_memory = nv_drm_gem_object_nvkms_memory_lookup(filep, p->handle);
+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)
+    nv_nvkms_memory = nv_drm_gem_object_nvkms_memory_lookup(dev, filep, p->handle);
    if (nv_nvkms_memory) {
        p->object_type = NV_GEM_OBJECT_NVKMS;
        nv_gem = &nv_nvkms_memory->base;
        goto done;
    }
+#endif

-    nv_user_memory = nv_drm_gem_object_user_memory_lookup(filep, p->handle);
+    nv_user_memory = nv_drm_gem_object_user_memory_lookup(dev, filep, p->handle);
    if (nv_user_memory) {
        p->object_type = NV_GEM_OBJECT_USERMEMORY;
        nv_gem = &nv_user_memory->base;
--- a/kernel-open/nvidia-drm/nvidia-drm-gem.h
+++ b/kernel-open/nvidia-drm/nvidia-drm-gem.h
@@ -33,14 +33,17 @@
 #include <drm/drmP.h>
 #endif

+#if defined(NV_DRM_DRM_GEM_H_PRESENT)
 #include <drm/drm_gem.h>
+#endif

 #include "nvkms-kapi.h"
 #include "nv-mm.h"

+#if defined(NV_DRM_FENCE_AVAILABLE)
+#include "nvidia-dma-fence-helper.h"
 #include "nvidia-dma-resv-helper.h"
-
-#include "linux/dma-buf.h"
+#endif

 struct nv_drm_gem_object;

@@ -68,7 +71,7 @@ struct nv_drm_gem_object {

    struct NvKmsKapiMemory *pMemory;

-#if !defined(NV_DRM_GEM_OBJECT_HAS_RESV)
+#if defined(NV_DRM_FENCE_AVAILABLE)
    nv_dma_resv_t  resv;
 #endif
 };
@@ -83,14 +86,37 @@ static inline struct nv_drm_gem_object *to_nv_gem_object(
    return NULL;
 }

+/*
+ * drm_gem_object_{get/put}() added by commit
+ * e6b62714e87c8811d5564b6a0738dcde63a51774 (2017-02-28) and
+ * drm_gem_object_{reference/unreference}() removed by commit
+ * 3e70fd160cf0b1945225eaa08dd2cb8544f21cb8 (2018-11-15).
+ */
+
 static inline void
 nv_drm_gem_object_unreference_unlocked(struct nv_drm_gem_object *nv_gem)
 {
+#if defined(NV_DRM_GEM_OBJECT_GET_PRESENT)
+
 #if defined(NV_DRM_GEM_OBJECT_PUT_UNLOCK_PRESENT)
    drm_gem_object_put_unlocked(&nv_gem->base);
 #else
    drm_gem_object_put(&nv_gem->base);
 #endif
+
+#else
+    drm_gem_object_unreference_unlocked(&nv_gem->base);
+#endif
+}
+
+static inline void
+nv_drm_gem_object_unreference(struct nv_drm_gem_object *nv_gem)
+{
+#if defined(NV_DRM_GEM_OBJECT_GET_PRESENT)
+    drm_gem_object_put(&nv_gem->base);
+#else
+    drm_gem_object_unreference(&nv_gem->base);
+#endif
 }

 static inline int nv_drm_gem_handle_create_drop_reference(
@@ -131,10 +157,17 @@ done:
 void nv_drm_gem_free(struct drm_gem_object *gem);

 static inline struct nv_drm_gem_object *nv_drm_gem_object_lookup(
+    struct drm_device *dev,
    struct drm_file *filp,
    u32 handle)
 {
+#if (NV_DRM_GEM_OBJECT_LOOKUP_ARGUMENT_COUNT == 3)
+    return to_nv_gem_object(drm_gem_object_lookup(dev, filp, handle));
+#elif (NV_DRM_GEM_OBJECT_LOOKUP_ARGUMENT_COUNT == 2)
    return to_nv_gem_object(drm_gem_object_lookup(filp, handle));
+#else
+    #error "Unknown argument count of drm_gem_object_lookup()"
+#endif
 }

 static inline int nv_drm_gem_handle_create(struct drm_file *filp,
@@ -144,15 +177,6 @@ static inline int nv_drm_gem_handle_create(struct drm_file *filp,
    return drm_gem_handle_create(filp, &nv_gem->base, handle);
 }

-static inline nv_dma_resv_t *nv_drm_gem_res_obj(struct nv_drm_gem_object *nv_gem)
-{
-#if defined(NV_DRM_GEM_OBJECT_HAS_RESV)
-    return nv_gem->base.resv;
-#else
-    return nv_gem->base.dma_buf ? nv_gem->base.dma_buf->resv : &nv_gem->resv;
-#endif
-}
-
 void nv_drm_gem_object_init(struct nv_drm_device *nv_dev,
                            struct nv_drm_gem_object *nv_gem,
                            const struct nv_drm_gem_object_funcs * const ops,
--- a/kernel-open/nvidia-drm/nvidia-drm-helper.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-helper.c
@@ -28,12 +28,10 @@
 */

 #include "nvidia-drm-helper.h"
-#include "nvidia-drm-priv.h"
-#include "nvidia-drm-crtc.h"

 #include "nvmisc.h"

-#if defined(NV_DRM_AVAILABLE)
+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)

 #if defined(NV_DRM_DRMP_H_PRESENT)
 #include <drm/drmP.h>
@@ -43,7 +41,15 @@
 #include <drm/drm_atomic_uapi.h>
 #endif

-#include <drm/drm_framebuffer.h>
+static void __nv_drm_framebuffer_put(struct drm_framebuffer *fb)
+{
+#if defined(NV_DRM_FRAMEBUFFER_GET_PRESENT)
+    drm_framebuffer_put(fb);
+#else
+    drm_framebuffer_unreference(fb);
+#endif
+
+}

 /*
 * drm_atomic_helper_disable_all() has been added by commit
@@ -54,7 +60,7 @@
 * drm_atomic_helper_disable_all() is copied from
 * linux/drivers/gpu/drm/drm_atomic_helper.c and modified to use
 * nv_drm_for_each_crtc instead of drm_for_each_crtc to loop over all crtcs,
- * use for_each_new_*_in_state instead of for_each_connector_in_state to loop
+ * use nv_drm_for_each_*_in_state instead of for_each_connector_in_state to loop
 * over all modeset object states, and use drm_atomic_state_free() if
 * drm_atomic_state_put() is not available.
 *
@@ -129,23 +135,13 @@ int nv_drm_atomic_helper_disable_all(struct drm_device *dev,
            goto free;
    }

-    nv_drm_for_each_plane(plane, dev) {
-        plane_state = drm_atomic_get_plane_state(state, plane);
-        if (IS_ERR(plane_state)) {
-            ret = PTR_ERR(plane_state);
-            goto free;
-        }
-
-        plane_state->rotation = DRM_MODE_ROTATE_0;
-    }
-
-    for_each_new_connector_in_state(state, conn, conn_state, i) {
+    nv_drm_for_each_connector_in_state(state, conn, conn_state, i) {
        ret = drm_atomic_set_crtc_for_connector(conn_state, NULL);
        if (ret < 0)
            goto free;
    }

-    for_each_new_plane_in_state(state, plane, plane_state, i) {
+    nv_drm_for_each_plane_in_state(state, plane, plane_state, i) {
        ret = drm_atomic_set_crtc_for_plane(plane_state, NULL);
        if (ret < 0)
            goto free;
@@ -167,15 +163,29 @@ free:
                WARN_ON(plane->state->crtc);

                if (plane->old_fb)
-                    drm_framebuffer_put(plane->old_fb);
+                    __nv_drm_framebuffer_put(plane->old_fb);
           }
           plane->old_fb = NULL;
       }
    }

+#if defined(NV_DRM_ATOMIC_STATE_REF_COUNTING_PRESENT)
    drm_atomic_state_put(state);
-
+#else
+    if (ret != 0) {
+        drm_atomic_state_free(state);
+    } else {
+        /*
+         * In case of success, drm_atomic_commit() takes care to cleanup and
+         * free @state.
+         *
+         * Comment placed above drm_atomic_commit() says: The caller must not
+         * free or in any other way access @state. If the function fails then
+         * the caller must clean up @state itself.
+         */
+    }
+#endif
    return ret;
 }

-#endif /* NV_DRM_AVAILABLE */
+#endif /* NV_DRM_ATOMIC_MODESET_AVAILABLE */
--- a/kernel-open/nvidia-drm/nvidia-drm-helper.h
+++ b/kernel-open/nvidia-drm/nvidia-drm-helper.h
@@ -31,26 +31,33 @@
 #include <drm/drmP.h>
 #endif

+#if defined(NV_DRM_DRM_DRV_H_PRESENT)
 #include <drm/drm_drv.h>
-
-#if defined(NV_DRM_ALPHA_BLENDING_AVAILABLE)
-#include <drm/drm_blend.h>
 #endif

 /*
- * For DRM_MODE_ROTATE_*, DRM_MODE_REFLECT_*, struct drm_color_ctm_3x4, and
- * struct drm_color_lut.
+ * drm_dev_put() is added by commit 9a96f55034e41b4e002b767e9218d55f03bdff7d
+ * (2017-09-26) and drm_dev_unref() is removed by
+ * ba1d345401476a5f7fbad622607c5a1f95e59b31 (2018-11-15).
+ *
+ * drm_dev_unref() has been added and drm_dev_free() removed by commit -
+ *
+ *      2014-01-29: 099d1c290e2ebc3b798961a6c177c3aef5f0b789
 */
-#include <uapi/drm/drm_mode.h>
-
-/*
- * Commit 1e13c5644c44 ("drm/drm_mode_object: increase max objects to
- * accommodate new color props") in Linux v6.8 increased the pre-object
- * property limit to from 24 to 64.
- */
-#define NV_DRM_USE_EXTENDED_PROPERTIES (DRM_OBJECT_MAX_PROPERTY >= 64)
+static inline void nv_drm_dev_free(struct drm_device *dev)
+{
+#if defined(NV_DRM_DEV_PUT_PRESENT)
+    drm_dev_put(dev);
+#elif defined(NV_DRM_DEV_UNREF_PRESENT)
+    drm_dev_unref(dev);
+#else
+    drm_dev_free(dev);
+#endif
+}

+#if defined(NV_DRM_DRM_PRIME_H_PRESENT)
 #include <drm/drm_prime.h>
+#endif

 static inline struct sg_table*
 nv_drm_prime_pages_to_sg(struct drm_device *dev,
@@ -63,6 +70,8 @@ nv_drm_prime_pages_to_sg(struct drm_device *dev,
 #endif
 }

+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)
+
 /*
 * drm_for_each_connector(), drm_for_each_crtc(), drm_for_each_fb(),
 * drm_for_each_encoder and drm_for_each_plane() were added by kernel
@@ -116,6 +125,18 @@ nv_drm_prime_pages_to_sg(struct drm_device *dev,
    list_for_each_entry(crtc, &(dev)->mode_config.crtc_list, head)
 #endif

+#if defined(NV_DRM_CONNECTOR_LIST_ITER_PRESENT)
+#define nv_drm_for_each_connector(connector, conn_iter, dev) \
+        drm_for_each_connector_iter(connector, conn_iter)
+#elif defined(drm_for_each_connector)
+#define nv_drm_for_each_connector(connector, conn_iter, dev) \
+    drm_for_each_connector(connector, dev)
+#else
+#define nv_drm_for_each_connector(connector, conn_iter, dev) \
+    WARN_ON(!mutex_is_locked(&dev->mode_config.mutex));      \
+    list_for_each_entry(connector, &(dev)->mode_config.connector_list, head)
+#endif
+
 #if defined(drm_for_each_encoder)
 #define nv_drm_for_each_encoder(encoder, dev) \
    drm_for_each_encoder(encoder, dev)
@@ -138,23 +159,141 @@ nv_drm_prime_pages_to_sg(struct drm_device *dev,
 int nv_drm_atomic_helper_disable_all(struct drm_device *dev,
                                     struct drm_modeset_acquire_ctx *ctx);

-#include <drm/drm_auth.h>
-#include <drm/drm_file.h>
-
 /*
- * drm_file_get_master() added by commit 56f0729a510f ("drm: protect drm_master
- * pointers in drm_lease.c") in v5.15 (2021-07-20)
+ * for_each_connector_in_state(), for_each_crtc_in_state() and
+ * for_each_plane_in_state() were added by kernel commit
+ * df63b9994eaf942afcdb946d27a28661d7dfbf2a which was Signed-off-by:
+ *      Ander Conselvan de Oliveira <ander.conselvan.de.oliveira@intel.com>
+ *      Daniel Vetter <daniel.vetter@ffwll.ch>
+ *
+ * for_each_connector_in_state(), for_each_crtc_in_state() and
+ * for_each_plane_in_state() were copied from
+ *      include/drm/drm_atomic.h @
+ *      21a01abbe32a3cbeb903378a24e504bfd9fe0648
+ * which has the following copyright and license information:
+ *
+ * Copyright (C) 2014 Red Hat
+ * Copyright (C) 2014 Intel Corp.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ * Rob Clark <robdclark@gmail.com>
+ * Daniel Vetter <daniel.vetter@ffwll.ch>
 */
-static inline struct drm_master *nv_drm_file_get_master(struct drm_file *filep)
-{
-#if defined(NV_DRM_FILE_GET_MASTER_PRESENT)
-    return drm_file_get_master(filep);
+
+/**
+ * nv_drm_for_each_connector_in_state - iterate over all connectors in an
+ * atomic update
+ * @__state: &struct drm_atomic_state pointer
+ * @connector: &struct drm_connector iteration cursor
+ * @connector_state: &struct drm_connector_state iteration cursor
+ * @__i: int iteration cursor, for macro-internal use
+ *
+ * This iterates over all connectors in an atomic update. Note that before the
+ * software state is committed (by calling drm_atomic_helper_swap_state(), this
+ * points to the new state, while afterwards it points to the old state. Due to
+ * this tricky confusion this macro is deprecated.
+ */
+#if !defined(for_each_connector_in_state)
+#define nv_drm_for_each_connector_in_state(__state,                         \
+                                           connector, connector_state, __i) \
+       for ((__i) = 0;                                                      \
+            (__i) < (__state)->num_connector &&                             \
+            ((connector) = (__state)->connectors[__i].ptr,                  \
+            (connector_state) = (__state)->connectors[__i].state, 1);       \
+            (__i)++)                                                        \
+               for_each_if (connector)
 #else
-    if (filep->master) {
-        return drm_master_get(filep->master);
-    } else {
-        return NULL;
-    }
+#define nv_drm_for_each_connector_in_state(__state,                         \
+                                           connector, connector_state, __i) \
+    for_each_connector_in_state(__state, connector, connector_state, __i)
+#endif
+
+
+/**
+ * nv_drm_for_each_crtc_in_state - iterate over all CRTCs in an atomic update
+ * @__state: &struct drm_atomic_state pointer
+ * @crtc: &struct drm_crtc iteration cursor
+ * @crtc_state: &struct drm_crtc_state iteration cursor
+ * @__i: int iteration cursor, for macro-internal use
+ *
+ * This iterates over all CRTCs in an atomic update. Note that before the
+ * software state is committed (by calling drm_atomic_helper_swap_state(), this
+ * points to the new state, while afterwards it points to the old state. Due to
+ * this tricky confusion this macro is deprecated.
+ */
+#if !defined(for_each_crtc_in_state)
+#define nv_drm_for_each_crtc_in_state(__state, crtc, crtc_state, __i) \
+       for ((__i) = 0;                                                \
+            (__i) < (__state)->dev->mode_config.num_crtc &&           \
+            ((crtc) = (__state)->crtcs[__i].ptr,                      \
+            (crtc_state) = (__state)->crtcs[__i].state, 1);           \
+            (__i)++)                                                  \
+               for_each_if (crtc_state)
+#else
+#define nv_drm_for_each_crtc_in_state(__state, crtc, crtc_state, __i) \
+    for_each_crtc_in_state(__state, crtc, crtc_state, __i)
+#endif
+
+/**
+ * nv_drm_for_each_plane_in_state - iterate over all planes in an atomic update
+ * @__state: &struct drm_atomic_state pointer
+ * @plane: &struct drm_plane iteration cursor
+ * @plane_state: &struct drm_plane_state iteration cursor
+ * @__i: int iteration cursor, for macro-internal use
+ *
+ * This iterates over all planes in an atomic update. Note that before the
+ * software state is committed (by calling drm_atomic_helper_swap_state(), this
+ * points to the new state, while afterwards it points to the old state. Due to
+ * this tricky confusion this macro is deprecated.
+ */
+#if !defined(for_each_plane_in_state)
+#define nv_drm_for_each_plane_in_state(__state, plane, plane_state, __i) \
+       for ((__i) = 0;                                                   \
+            (__i) < (__state)->dev->mode_config.num_total_plane &&       \
+            ((plane) = (__state)->planes[__i].ptr,                       \
+            (plane_state) = (__state)->planes[__i].state, 1);            \
+            (__i)++)                                                     \
+               for_each_if (plane_state)
+#else
+#define nv_drm_for_each_plane_in_state(__state, plane, plane_state, __i) \
+    for_each_plane_in_state(__state, plane, plane_state, __i)
+#endif
+
+static inline struct drm_crtc *nv_drm_crtc_find(struct drm_device *dev,
+    uint32_t id)
+{
+#if defined(NV_DRM_MODE_OBJECT_FIND_HAS_FILE_PRIV_ARG)
+    return drm_crtc_find(dev, NULL /* file_priv */, id);
+#else
+    return drm_crtc_find(dev, id);
+#endif
+}
+
+static inline struct drm_encoder *nv_drm_encoder_find(struct drm_device *dev,
+    uint32_t id)
+{
+#if defined(NV_DRM_MODE_OBJECT_FIND_HAS_FILE_PRIV_ARG)
+    return drm_encoder_find(dev, NULL /* file_priv */, id);
+#else
+    return drm_encoder_find(dev, id);
 #endif
 }

@@ -164,6 +303,10 @@ static inline struct drm_master *nv_drm_file_get_master(struct drm_file *filep)
 *     Ville Syrjälä <ville.syrjala@linux.intel.com>
 *
 * drm_connector_for_each_possible_encoder() is copied from
+ * include/drm/drm_connector.h and modified to use nv_drm_encoder_find()
+ * instead of drm_encoder_find().
+ *
+ * drm_connector_for_each_possible_encoder() is copied from
 *      include/drm/drm_connector.h @
 *      83aefbb887b59df0b3520965c3701e01deacfc52
 * which has the following copyright and license information:
@@ -189,7 +332,9 @@ static inline struct drm_master *nv_drm_file_get_master(struct drm_file *filep)
 * OF THIS SOFTWARE.
 */

+#if defined(NV_DRM_DRM_CONNECTOR_H_PRESENT)
 #include <drm/drm_connector.h>
+#endif

 /**
 * nv_drm_connector_for_each_possible_encoder - iterate connector's possible
@@ -208,9 +353,8 @@ static inline struct drm_master *nv_drm_file_get_master(struct drm_file *filep)
       for ((__i) = 0; (__i) < ARRAY_SIZE((connector)->encoder_ids) &&        \
                    (connector)->encoder_ids[(__i)] != 0; (__i)++)            \
               for_each_if((encoder) =                                        \
-                           drm_encoder_find((connector)->dev, NULL,           \
-                                            (connector)->encoder_ids[(__i)]))
-
+                           nv_drm_encoder_find((connector)->dev,              \
+                                               (connector)->encoder_ids[(__i)]))

 #define nv_drm_connector_for_each_possible_encoder(connector, encoder) \
    {                                                                  \
@@ -265,14 +409,80 @@ nv_drm_connector_update_edid_property(struct drm_connector *connector,
 #endif
 }

+#if defined(NV_DRM_CONNECTOR_LIST_ITER_PRESENT)
+#include <drm/drm_connector.h>
+
+static inline
+void nv_drm_connector_list_iter_begin(struct drm_device *dev,
+                                      struct drm_connector_list_iter *iter)
+{
+#if defined(NV_DRM_CONNECTOR_LIST_ITER_BEGIN_PRESENT)
+    drm_connector_list_iter_begin(dev, iter);
+#else
+    drm_connector_list_iter_get(dev, iter);
+#endif
+}
+
+static inline
+void nv_drm_connector_list_iter_end(struct drm_connector_list_iter *iter)
+{
+#if defined(NV_DRM_CONNECTOR_LIST_ITER_BEGIN_PRESENT)
+    drm_connector_list_iter_end(iter);
+#else
+    drm_connector_list_iter_put(iter);
+#endif
+}
+#endif
+
+/*
+ * The drm_format_num_planes() function was added by commit d0d110e09629 drm:
+ * Add drm_format_num_planes() utility function in v3.3 (2011-12-20). Prototype
+ * was moved from drm_crtc.h to drm_fourcc.h by commit ae4df11a0f53 (drm: Move
+ * format-related helpers to drm_fourcc.c) in v4.8 (2016-06-09).
+ * drm_format_num_planes() has been removed by commit 05c452c115bf (drm: Remove
+ * users of drm_format_num_planes) in v5.3 (2019-05-16).
+ *
+ * drm_format_info() is available only from v4.10 (2016-10-18), added by commit
+ * 84770cc24f3a (drm: Centralize format information).
+ */
+#include <drm/drm_crtc.h>
 #include <drm/drm_fourcc.h>

 static inline int nv_drm_format_num_planes(uint32_t format)
 {
+#if defined(NV_DRM_FORMAT_NUM_PLANES_PRESENT)
+    return drm_format_num_planes(format);
+#else
    const struct drm_format_info *info = drm_format_info(format);
    return info != NULL ? info->num_planes : 1;
+#endif
 }

+#if defined(NV_DRM_FORMAT_MODIFIERS_PRESENT)
+/*
+ * DRM_FORMAT_MOD_LINEAR was also defined after the original modifier support
+ * was added to the kernel, as a more explicit alias of DRM_FORMAT_MOD_NONE
+ */
+#if !defined(DRM_FORMAT_MOD_VENDOR_NONE)
+#define DRM_FORMAT_MOD_VENDOR_NONE 0
+#endif
+
+#if !defined(DRM_FORMAT_MOD_LINEAR)
+#define DRM_FORMAT_MOD_LINEAR fourcc_mod_code(NONE, 0)
+#endif
+
+/*
+ * DRM_FORMAT_MOD_INVALID was defined after the original modifier support was
+ * added to the kernel, for use as a sentinel value.
+ */
+#if !defined(DRM_FORMAT_RESERVED)
+#define DRM_FORMAT_RESERVED ((1ULL << 56) - 1)
+#endif
+
+#if !defined(DRM_FORMAT_MOD_INVALID)
+#define DRM_FORMAT_MOD_INVALID fourcc_mod_code(NONE, DRM_FORMAT_RESERVED)
+#endif
+
 /*
 * DRM_FORMAT_MOD_VENDOR_NVIDIA was previously called
 * DRM_FORMAT_MOD_VNEDOR_NV.
@@ -295,29 +505,79 @@ static inline int nv_drm_format_num_planes(uint32_t format)
                             (((c) & 0x7) << 23)))
 #endif

-/*
- * DRM_UNLOCKED was removed with commit 2798ffcc1d6a ("drm: Remove locking for
- * legacy ioctls and DRM_UNLOCKED") in v6.8, but it was previously made
- * implicit for all non-legacy DRM driver IOCTLs since Linux v4.10 commit
- * fa5386459f06 "drm: Used DRM_LEGACY for all legacy functions" (Linux v4.4
- * commit ea487835e887 "drm: Enforce unlocked ioctl operation for kms driver
- * ioctls" previously did it only for drivers that set the DRM_MODESET flag), so
- * it was effectively a no-op anyway.
- */
-#if !defined(NV_DRM_UNLOCKED_IOCTL_FLAG_PRESENT)
-#define DRM_UNLOCKED 0
-#endif
+#endif /* defined(NV_DRM_FORMAT_MODIFIERS_PRESENT) */

 /*
- * struct drm_color_ctm_3x4 was added by commit 6872a189be50 ("drm/amd/display:
- * Add 3x4 CTM support for plane CTM") in v6.8. For backwards compatibility,
- * define it when not present.
+ * drm_vma_offset_exact_lookup_locked() were added
+ * by kernel commit 2225cfe46bcc which was Signed-off-by:
+ *      Daniel Vetter <daniel.vetter@intel.com>
+ *
+ * drm_vma_offset_exact_lookup_locked() were copied from
+ *      include/drm/drm_vma_manager.h @ 2225cfe46bcc
+ * which has the following copyright and license information:
+ *
+ * Copyright (c) 2013 David Herrmann <dh.herrmann@gmail.com>
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
 */
-#if !defined(NV_DRM_COLOR_CTM_3X4_PRESENT)
-struct drm_color_ctm_3x4 {
-    __u64 matrix[12];
-};
+
+#include <drm/drm_vma_manager.h>
+
+/**
+ * nv_drm_vma_offset_exact_lookup_locked() - Look up node by exact address
+ * @mgr: Manager object
+ * @start: Start address (page-based, not byte-based)
+ * @pages: Size of object (page-based)
+ *
+ * Same as drm_vma_offset_lookup_locked() but does not allow any offset into the node.
+ * It only returns the exact object with the given start address.
+ *
+ * RETURNS:
+ * Node at exact start address @start.
+ */
+static inline struct drm_vma_offset_node *
+nv_drm_vma_offset_exact_lookup_locked(struct drm_vma_offset_manager *mgr,
+                                      unsigned long start,
+                                      unsigned long pages)
+{
+#if defined(NV_DRM_VMA_OFFSET_EXACT_LOOKUP_LOCKED_PRESENT)
+    return drm_vma_offset_exact_lookup_locked(mgr, start, pages);
+#else
+    struct drm_vma_offset_node *node;
+
+    node = drm_vma_offset_lookup_locked(mgr, start, pages);
+    return (node && node->vm_node.start == start) ? node : NULL;
 #endif
+}
+
+static inline bool
+nv_drm_vma_node_is_allowed(struct drm_vma_offset_node *node,
+                           struct file *filp)
+{
+#if defined(NV_DRM_VMA_NODE_IS_ALLOWED_HAS_TAG_ARG)
+    return drm_vma_node_is_allowed(node, filp->private_data);
+#else
+    return drm_vma_node_is_allowed(node, filp);
+#endif
+}
+
+#endif /* defined(NV_DRM_ATOMIC_MODESET_AVAILABLE) */

 #endif /* defined(NV_DRM_AVAILABLE) */

--- a/kernel-open/nvidia-drm/nvidia-drm-ioctl.h
+++ b/kernel-open/nvidia-drm/nvidia-drm-ioctl.h
@@ -34,8 +34,8 @@
 #define DRM_NVIDIA_GEM_IMPORT_USERSPACE_MEMORY      0x02
 #define DRM_NVIDIA_GET_DEV_INFO                     0x03
 #define DRM_NVIDIA_FENCE_SUPPORTED                  0x04
-#define DRM_NVIDIA_PRIME_FENCE_CONTEXT_CREATE       0x05
-#define DRM_NVIDIA_GEM_PRIME_FENCE_ATTACH           0x06
+#define DRM_NVIDIA_FENCE_CONTEXT_CREATE             0x05
+#define DRM_NVIDIA_GEM_FENCE_ATTACH                 0x06
 #define DRM_NVIDIA_GET_CLIENT_CAPABILITY            0x08
 #define DRM_NVIDIA_GEM_EXPORT_NVKMS_MEMORY          0x09
 #define DRM_NVIDIA_GEM_MAP_OFFSET                   0x0a
@@ -43,16 +43,6 @@
 #define DRM_NVIDIA_GET_CRTC_CRC32_V2                0x0c
 #define DRM_NVIDIA_GEM_EXPORT_DMABUF_MEMORY         0x0d
 #define DRM_NVIDIA_GEM_IDENTIFY_OBJECT              0x0e
-#define DRM_NVIDIA_DMABUF_SUPPORTED                 0x0f
-#define DRM_NVIDIA_GET_DPY_ID_FOR_CONNECTOR_ID      0x10
-#define DRM_NVIDIA_GET_CONNECTOR_ID_FOR_DPY_ID      0x11
-#define DRM_NVIDIA_GRANT_PERMISSIONS                0x12
-#define DRM_NVIDIA_REVOKE_PERMISSIONS               0x13
-#define DRM_NVIDIA_SEMSURF_FENCE_CTX_CREATE         0x14
-#define DRM_NVIDIA_SEMSURF_FENCE_CREATE             0x15
-#define DRM_NVIDIA_SEMSURF_FENCE_WAIT               0x16
-#define DRM_NVIDIA_SEMSURF_FENCE_ATTACH             0x17
-#define DRM_NVIDIA_GET_DRM_FILE_UNIQUE_ID           0x18

 #define DRM_IOCTL_NVIDIA_GEM_IMPORT_NVKMS_MEMORY                           \
    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GEM_IMPORT_NVKMS_MEMORY),      \
@@ -72,97 +62,53 @@
 *
 * 'warning: suggest parentheses around arithmetic in operand of |'
 */
-#if defined(NV_LINUX) || defined(NV_BSD)
+#if defined(NV_LINUX)
 #define DRM_IOCTL_NVIDIA_FENCE_SUPPORTED                         \
    DRM_IO(DRM_COMMAND_BASE + DRM_NVIDIA_FENCE_SUPPORTED)
-#define DRM_IOCTL_NVIDIA_DMABUF_SUPPORTED                        \
-    DRM_IO(DRM_COMMAND_BASE + DRM_NVIDIA_DMABUF_SUPPORTED)
 #else
 #define DRM_IOCTL_NVIDIA_FENCE_SUPPORTED 0
-#define DRM_IOCTL_NVIDIA_DMABUF_SUPPORTED 0
 #endif

-#define DRM_IOCTL_NVIDIA_PRIME_FENCE_CONTEXT_CREATE                     \
-    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_PRIME_FENCE_CONTEXT_CREATE),\
-             struct drm_nvidia_prime_fence_context_create_params)
+#define DRM_IOCTL_NVIDIA_FENCE_CONTEXT_CREATE                        \
+    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_FENCE_CONTEXT_CREATE),   \
+             struct drm_nvidia_fence_context_create_params)

-#define DRM_IOCTL_NVIDIA_GEM_PRIME_FENCE_ATTACH                         \
-    DRM_IOW((DRM_COMMAND_BASE + DRM_NVIDIA_GEM_PRIME_FENCE_ATTACH),     \
-            struct drm_nvidia_gem_prime_fence_attach_params)
+#define DRM_IOCTL_NVIDIA_GEM_FENCE_ATTACH                            \
+    DRM_IOW((DRM_COMMAND_BASE + DRM_NVIDIA_GEM_FENCE_ATTACH),        \
+            struct drm_nvidia_gem_fence_attach_params)

-#define DRM_IOCTL_NVIDIA_GET_CLIENT_CAPABILITY                          \
-    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GET_CLIENT_CAPABILITY),     \
+#define DRM_IOCTL_NVIDIA_GET_CLIENT_CAPABILITY                       \
+    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GET_CLIENT_CAPABILITY),  \
             struct drm_nvidia_get_client_capability_params)

-#define DRM_IOCTL_NVIDIA_GET_CRTC_CRC32                                 \
-    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GET_CRTC_CRC32),            \
+#define DRM_IOCTL_NVIDIA_GET_CRTC_CRC32                              \
+    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GET_CRTC_CRC32),         \
             struct drm_nvidia_get_crtc_crc32_params)

-#define DRM_IOCTL_NVIDIA_GET_CRTC_CRC32_V2                              \
-    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GET_CRTC_CRC32_V2),         \
+#define DRM_IOCTL_NVIDIA_GET_CRTC_CRC32_V2                           \
+    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GET_CRTC_CRC32_V2),      \
              struct drm_nvidia_get_crtc_crc32_v2_params)

-#define DRM_IOCTL_NVIDIA_GEM_EXPORT_NVKMS_MEMORY                        \
-    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GEM_EXPORT_NVKMS_MEMORY),   \
+#define DRM_IOCTL_NVIDIA_GEM_EXPORT_NVKMS_MEMORY                           \
+    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GEM_EXPORT_NVKMS_MEMORY),      \
              struct drm_nvidia_gem_export_nvkms_memory_params)

-#define DRM_IOCTL_NVIDIA_GEM_MAP_OFFSET                                 \
-    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GEM_MAP_OFFSET),            \
+#define DRM_IOCTL_NVIDIA_GEM_MAP_OFFSET                              \
+    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GEM_MAP_OFFSET),         \
             struct drm_nvidia_gem_map_offset_params)

-#define DRM_IOCTL_NVIDIA_GEM_ALLOC_NVKMS_MEMORY                         \
-    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GEM_ALLOC_NVKMS_MEMORY),    \
+#define DRM_IOCTL_NVIDIA_GEM_ALLOC_NVKMS_MEMORY                      \
+    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GEM_ALLOC_NVKMS_MEMORY), \
              struct drm_nvidia_gem_alloc_nvkms_memory_params)

-#define DRM_IOCTL_NVIDIA_GEM_EXPORT_DMABUF_MEMORY                       \
-    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GEM_EXPORT_DMABUF_MEMORY),  \
+#define DRM_IOCTL_NVIDIA_GEM_EXPORT_DMABUF_MEMORY                      \
+    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GEM_EXPORT_DMABUF_MEMORY), \
              struct drm_nvidia_gem_export_dmabuf_memory_params)

-#define DRM_IOCTL_NVIDIA_GEM_IDENTIFY_OBJECT                            \
-    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GEM_IDENTIFY_OBJECT),       \
+#define DRM_IOCTL_NVIDIA_GEM_IDENTIFY_OBJECT                      \
+    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GEM_IDENTIFY_OBJECT), \
              struct drm_nvidia_gem_identify_object_params)

-#define DRM_IOCTL_NVIDIA_GET_DPY_ID_FOR_CONNECTOR_ID                     \
-    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GET_DPY_ID_FOR_CONNECTOR_ID),\
-             struct drm_nvidia_get_dpy_id_for_connector_id_params)
-
-#define DRM_IOCTL_NVIDIA_GET_CONNECTOR_ID_FOR_DPY_ID                     \
-    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GET_CONNECTOR_ID_FOR_DPY_ID),\
-             struct drm_nvidia_get_connector_id_for_dpy_id_params)
-
-#define DRM_IOCTL_NVIDIA_GRANT_PERMISSIONS                              \
-    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_GRANT_PERMISSIONS),         \
-             struct drm_nvidia_grant_permissions_params)
-
-#define DRM_IOCTL_NVIDIA_REVOKE_PERMISSIONS                             \
-    DRM_IOWR((DRM_COMMAND_BASE + DRM_NVIDIA_REVOKE_PERMISSIONS),        \
-             struct drm_nvidia_revoke_permissions_params)
-
-#define DRM_IOCTL_NVIDIA_SEMSURF_FENCE_CTX_CREATE                       \
-    DRM_IOWR((DRM_COMMAND_BASE +                                        \
-              DRM_NVIDIA_SEMSURF_FENCE_CTX_CREATE),                     \
-              struct drm_nvidia_semsurf_fence_ctx_create_params)
-
-#define DRM_IOCTL_NVIDIA_SEMSURF_FENCE_CREATE                           \
-    DRM_IOWR((DRM_COMMAND_BASE +                                        \
-              DRM_NVIDIA_SEMSURF_FENCE_CREATE),                         \
-              struct drm_nvidia_semsurf_fence_create_params)
-
-#define DRM_IOCTL_NVIDIA_SEMSURF_FENCE_WAIT                             \
-    DRM_IOW((DRM_COMMAND_BASE +                                         \
-              DRM_NVIDIA_SEMSURF_FENCE_WAIT),                           \
-              struct drm_nvidia_semsurf_fence_wait_params)
-
-#define DRM_IOCTL_NVIDIA_SEMSURF_FENCE_ATTACH                           \
-    DRM_IOW((DRM_COMMAND_BASE +                                         \
-              DRM_NVIDIA_SEMSURF_FENCE_ATTACH),                         \
-              struct drm_nvidia_semsurf_fence_attach_params)
-
-#define DRM_IOCTL_NVIDIA_GET_DRM_FILE_UNIQUE_ID                         \
-    DRM_IOWR((DRM_COMMAND_BASE +                                        \
-              DRM_NVIDIA_GET_DRM_FILE_UNIQUE_ID),                       \
-              struct drm_nvidia_get_drm_file_unique_id_params)
-
 struct drm_nvidia_gem_import_nvkms_memory_params {
    uint64_t mem_size;           /* IN */

@@ -182,21 +128,15 @@ struct drm_nvidia_gem_import_userspace_memory_params {

 struct drm_nvidia_get_dev_info_params {
    uint32_t gpu_id;             /* OUT */
-    uint32_t mig_device;         /* OUT */
    uint32_t primary_index;      /* OUT; the "card%d" value */

-    uint32_t supports_alloc;     /* OUT */
-    /* The generic_page_kind, page_kind_generation, and sector_layout
-     * fields are only valid if supports_alloc is true.
-     * See DRM_FORMAT_MOD_NVIDIA_BLOCK_LINEAR_2D definitions of these. */
+    /* See DRM_FORMAT_MOD_NVIDIA_BLOCK_LINEAR_2D definitions of these */
    uint32_t generic_page_kind;    /* OUT */
    uint32_t page_kind_generation; /* OUT */
    uint32_t sector_layout;        /* OUT */
-    uint32_t supports_sync_fd;     /* OUT */
-    uint32_t supports_semsurf;     /* OUT */
 };

-struct drm_nvidia_prime_fence_context_create_params {
+struct drm_nvidia_fence_context_create_params {
    uint32_t handle;            /* OUT GEM handle to fence context */

    uint32_t index;             /* IN Index of semaphore to use for fencing */
@@ -211,11 +151,10 @@ struct drm_nvidia_prime_fence_context_create_params {
    uint64_t event_nvkms_params_size; /* IN */
 };

-struct drm_nvidia_gem_prime_fence_attach_params {
+struct drm_nvidia_gem_fence_attach_params {
    uint32_t handle;                /* IN GEM handle to attach fence to */
    uint32_t fence_context_handle;  /* IN GEM handle to fence context on which fence is run on */
    uint32_t sem_thresh;            /* IN Semaphore value to reach before signal */
-    uint32_t __pad;
 };

 struct drm_nvidia_get_client_capability_params {
@@ -227,8 +166,6 @@ struct drm_nvidia_get_client_capability_params {
 struct drm_nvidia_crtc_crc32 {
    uint32_t value; /* Read value, undefined if supported is false */
    uint8_t supported; /* Supported boolean, true if readable by hardware */
-    uint8_t __pad0;
-    uint16_t __pad1;
 };

 struct drm_nvidia_crtc_crc32_v2_out {
@@ -262,17 +199,13 @@ struct drm_nvidia_gem_map_offset_params {
    uint64_t offset;             /* OUT Fake offset */
 };

-#define NV_GEM_ALLOC_NO_SCANOUT                     (1 << 0)
-
 struct drm_nvidia_gem_alloc_nvkms_memory_params {
    uint32_t handle;              /* OUT */
    uint8_t  block_linear;        /* IN */
    uint8_t  compressible;        /* IN/OUT */
-    uint16_t __pad0;
+    uint16_t __pad;

    uint64_t memory_size;         /* IN */
-    uint32_t flags;               /* IN */
-    uint32_t __pad1;
 };

 struct drm_nvidia_gem_export_dmabuf_memory_params {
@@ -296,104 +229,4 @@ struct drm_nvidia_gem_identify_object_params {
    drm_nvidia_gem_object_type  object_type;    /* OUT GEM object type */
 };

-struct drm_nvidia_get_dpy_id_for_connector_id_params {
-    uint32_t connectorId; /* IN */
-    uint32_t dpyId;       /* OUT */
-};
-
-struct drm_nvidia_get_connector_id_for_dpy_id_params {
-    uint32_t dpyId;       /* IN */
-    uint32_t connectorId; /* OUT */
-};
-
-enum drm_nvidia_permissions_type {
-    NV_DRM_PERMISSIONS_TYPE_MODESET = 2,
-    NV_DRM_PERMISSIONS_TYPE_SUB_OWNER = 3
-};
-
-struct drm_nvidia_grant_permissions_params {
-    int32_t fd;           /* IN */
-    uint32_t dpyId;       /* IN */
-    uint32_t type;        /* IN */
-};
-
-struct drm_nvidia_revoke_permissions_params {
-    uint32_t dpyId;       /* IN */
-    uint32_t type;        /* IN */
-};
-
-struct drm_nvidia_semsurf_fence_ctx_create_params {
-    uint64_t index;             /* IN Index of the desired semaphore in the
-                                 * fence context's semaphore surface */
-
-    /* Params for importing userspace semaphore surface */
-    uint64_t nvkms_params_ptr;  /* IN */
-    uint64_t nvkms_params_size; /* IN */
-
-    uint32_t handle;            /* OUT GEM handle to fence context */
-    uint32_t __pad;
-};
-
-struct drm_nvidia_semsurf_fence_create_params {
-    uint32_t fence_context_handle;  /* IN GEM handle to fence context on which
-                                     * fence is run on */
-
-    uint32_t timeout_value_ms;      /* IN Timeout value in ms for the fence
-                                     * after which the fence will be signaled
-                                     * with its error status set to -ETIMEDOUT.
-                                     * Default timeout value is 5000ms */
-
-    uint64_t wait_value;            /* IN Semaphore value to reach before signal */
-
-    int32_t  fd;                    /* OUT sync FD object representing the
-                                     * semaphore at the specified index reaching
-                                     * a value >= wait_value */
-    uint32_t __pad;
-};
-
-/*
- * Note there is no provision for timeouts in this ioctl. The kernel
- * documentation asserts timeouts should be handled by fence producers, and
- * that waiters should not second-guess their logic, as it is producers rather
- * than consumers that have better information when it comes to determining a
- * reasonable timeout for a given workload.
- */
-struct drm_nvidia_semsurf_fence_wait_params {
-    uint32_t fence_context_handle;  /* IN GEM handle to fence context which will
-                                     * be used to wait on the sync FD.  Need not
-                                     * be the fence context used to create the
-                                     * sync FD. */
-
-    int32_t  fd;                    /* IN sync FD object to wait on */
-
-    uint64_t pre_wait_value;        /* IN Wait for the semaphore represented by
-                                     * fence_context to reach this value before
-                                     * waiting for the sync file. */
-
-    uint64_t post_wait_value;       /* IN Signal the semaphore represented by
-                                     * fence_context to this value after waiting
-                                     * for the sync file */
-};
-
-struct drm_nvidia_semsurf_fence_attach_params {
-    uint32_t handle;                /* IN GEM handle of buffer */
-
-    uint32_t fence_context_handle;  /* IN GEM handle of fence context */
-
-    uint32_t timeout_value_ms;      /* IN Timeout value in ms for the fence
-                                     * after which the fence will be signaled
-                                     * with its error status set to -ETIMEDOUT.
-                                     * Default timeout value is 5000ms */
-
-    uint32_t shared;                /* IN If true, fence will reserve shared
-                                     * access to the buffer, otherwise it will
-                                     * reserve exclusive access */
-
-    uint64_t wait_value;            /* IN Semaphore value to reach before signal */
-};
-
-struct drm_nvidia_get_drm_file_unique_id_params {
-    uint64_t id;                    /* OUT Unique ID of the DRM file */
-};
-
 #endif /* _UAPI_NVIDIA_DRM_IOCTL_H_ */
--- a/kernel-open/nvidia-drm/nvidia-drm-linux.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-linux.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015-2023, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
@@ -21,6 +21,8 @@
 */

 #include <linux/module.h>
+#include <linux/slab.h>
+#include <linux/err.h>

 #include "nvidia-drm-os-interface.h"
 #include "nvidia-drm.h"
@@ -29,18 +31,130 @@

 #if defined(NV_DRM_AVAILABLE)

+#if defined(NV_DRM_DRMP_H_PRESENT)
+#include <drm/drmP.h>
+#endif
+
+#include <linux/vmalloc.h>
+
+#include "nv-mm.h"
+
 MODULE_PARM_DESC(
    modeset,
    "Enable atomic kernel modesetting (1 = enable, 0 = disable (default))");
+bool nv_drm_modeset_module_param = false;
 module_param_named(modeset, nv_drm_modeset_module_param, bool, 0400);

-#if defined(NV_DRM_FBDEV_AVAILABLE)
-MODULE_PARM_DESC(
-    fbdev,
-    "Create a framebuffer device (1 = enable (default), 0 = disable)");
-module_param_named(fbdev, nv_drm_fbdev_module_param, bool, 0400);
+void *nv_drm_calloc(size_t nmemb, size_t size)
+{
+    return kzalloc(nmemb * size, GFP_KERNEL);
+}
+
+void nv_drm_free(void *ptr)
+{
+    if (IS_ERR(ptr)) {
+        return;
+    }
+
+    kfree(ptr);
+}
+
+char *nv_drm_asprintf(const char *fmt, ...)
+{
+    va_list ap;
+    char *p;
+
+    va_start(ap, fmt);
+    p = kvasprintf(GFP_KERNEL, fmt, ap);
+    va_end(ap);
+
+    return p;
+}
+
+#if defined(NVCPU_X86) || defined(NVCPU_X86_64)
+  #define WRITE_COMBINE_FLUSH()    asm volatile("sfence":::"memory")
+#elif defined(NVCPU_FAMILY_ARM)
+  #if defined(NVCPU_ARM)
+    #define WRITE_COMBINE_FLUSH()  { dsb(); outer_sync(); }
+  #elif defined(NVCPU_AARCH64)
+    #define WRITE_COMBINE_FLUSH()  mb()
+  #endif
+#elif defined(NVCPU_PPC64LE)
+  #define WRITE_COMBINE_FLUSH()    asm volatile("sync":::"memory")
 #endif

+void nv_drm_write_combine_flush(void)
+{
+    WRITE_COMBINE_FLUSH();
+}
+
+int nv_drm_lock_user_pages(unsigned long address,
+                           unsigned long pages_count, struct page ***pages)
+{
+    struct mm_struct *mm = current->mm;
+    struct page **user_pages;
+    const int write = 1;
+    const int force = 0;
+    int pages_pinned;
+
+    user_pages = nv_drm_calloc(pages_count, sizeof(*user_pages));
+
+    if (user_pages == NULL) {
+        return -ENOMEM;
+    }
+
+    nv_mmap_read_lock(mm);
+
+    pages_pinned = NV_GET_USER_PAGES(address, pages_count, write, force,
+                                     user_pages, NULL);
+    nv_mmap_read_unlock(mm);
+
+    if (pages_pinned < 0 || (unsigned)pages_pinned < pages_count) {
+        goto failed;
+    }
+
+    *pages = user_pages;
+
+    return 0;
+
+failed:
+
+    if (pages_pinned > 0) {
+        int i;
+
+        for (i = 0; i < pages_pinned; i++) {
+            put_page(user_pages[i]);
+        }
+    }
+
+    nv_drm_free(user_pages);
+
+    return (pages_pinned < 0) ? pages_pinned : -EINVAL;
+}
+
+void nv_drm_unlock_user_pages(unsigned long  pages_count, struct page **pages)
+{
+    unsigned long i;
+
+    for (i = 0; i < pages_count; i++) {
+        set_page_dirty_lock(pages[i]);
+
+        put_page(pages[i]);
+    }
+
+    nv_drm_free(pages);
+}
+
+void *nv_drm_vmap(struct page **pages, unsigned long pages_count)
+{
+    return vmap(pages, pages_count, VM_USERMAP, PAGE_KERNEL);
+}
+
+void nv_drm_vunmap(void *address)
+{
+    vunmap(address);
+}
+
 #endif /* NV_DRM_AVAILABLE */

 /*************************************************************************
@@ -60,7 +174,16 @@ static void __exit nv_linux_drm_exit(void)
 module_init(nv_linux_drm_init);
 module_exit(nv_linux_drm_exit);

+#if defined(MODULE_LICENSE)
+
  MODULE_LICENSE("Dual MIT/GPL");

-MODULE_INFO(supported, "external");
-MODULE_VERSION(NV_VERSION_STRING);
+
+
+#endif
+#if defined(MODULE_INFO)
+  MODULE_INFO(supported, "external");
+#endif
+#if defined(MODULE_VERSION)
+  MODULE_VERSION(NV_VERSION_STRING);
+#endif
--- a/kernel-open/nvidia-drm/nvidia-drm-modeset.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-modeset.c
@@ -20,9 +20,9 @@
 * DEALINGS IN THE SOFTWARE.
 */

-#include "nvidia-drm-conftest.h" /* NV_DRM_AVAILABLE */
+#include "nvidia-drm-conftest.h" /* NV_DRM_ATOMIC_MODESET_AVAILABLE */

-#if defined(NV_DRM_AVAILABLE)
+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)

 #include "nvidia-drm-priv.h"
 #include "nvidia-drm-modeset.h"
@@ -34,19 +34,14 @@
 #include <drm/drmP.h>
 #endif

+#if defined(NV_DRM_DRM_VBLANK_H_PRESENT)
 #include <drm/drm_vblank.h>
+#endif
+
 #include <drm/drm_atomic.h>
 #include <drm/drm_atomic_helper.h>
 #include <drm/drm_crtc.h>

-#if defined(NV_LINUX_NVHOST_H_PRESENT) && defined(CONFIG_TEGRA_GRHOST)
-#include <linux/nvhost.h>
-#elif defined(NV_LINUX_HOST1X_NEXT_H_PRESENT)            
-#include <linux/host1x-next.h>
-#endif
-
-#include <linux/dma-fence.h>
-
 struct nv_drm_atomic_state {
    struct NvKmsKapiRequestedModeSetConfig config;
    struct drm_atomic_state base;
@@ -98,6 +93,9 @@ static bool __will_generate_flip_event(struct drm_crtc *crtc,
        to_nv_crtc_state(new_crtc_state);
    struct drm_plane_state *old_plane_state = NULL;
    struct drm_plane *plane = NULL;
+    struct drm_plane *primary_plane = crtc->primary;
+    bool primary_event = false;
+    bool overlay_event = false;
    int i;

    if (!old_crtc_state->active  && !new_crtc_state->active) {
@@ -108,11 +106,8 @@ static bool __will_generate_flip_event(struct drm_crtc *crtc,
        return false;
    }

-    /*
-     * Find out whether primary & overlay flip done events will be generated.
-     * Only called after drm_atomic_helper_swap_state, so we use old state.
-     */
-    for_each_old_plane_in_state(old_crtc_state->state,
+    /* Find out whether primary & overlay flip done events will be generated. */
+    nv_drm_for_each_plane_in_state(old_crtc_state->state,
        plane, old_plane_state, i) {
        if (old_plane_state->crtc != crtc) {
           continue;
@@ -139,175 +134,15 @@ static int __nv_drm_put_back_post_fence_fd(
    const struct NvKmsKapiLayerReplyConfig *layer_reply_config)
 {
    int fd = layer_reply_config->postSyncptFd;
-    int ret = 0;

    if ((fd >= 0) && (plane_state->fd_user_ptr != NULL)) {
-        ret = copy_to_user(plane_state->fd_user_ptr, &fd, sizeof(fd));
-        if (ret != 0) {
-            return ret;
+        if (put_user(fd, plane_state->fd_user_ptr)) {
+            return -EFAULT;
        }

        /*! set back to Null and let set_property specify it again */
        plane_state->fd_user_ptr = NULL;
    }
-
-    return ret;
-}
-
-struct nv_drm_plane_fence_cb_data {
-    struct dma_fence_cb dma_fence_cb;
-    struct nv_drm_device *nv_dev;
-    NvU32 semaphore_index;
-};
-
-static void
-__nv_drm_plane_fence_cb(
-    struct dma_fence *fence,
-    struct dma_fence_cb *cb_data
-)
-{
-    struct nv_drm_plane_fence_cb_data *fence_data =
-        container_of(cb_data, typeof(*fence_data), dma_fence_cb);
-    struct nv_drm_device *nv_dev = fence_data->nv_dev;
-
-    dma_fence_put(fence);
-    nvKms->signalDisplaySemaphore(nv_dev->pDevice, fence_data->semaphore_index);
-    nv_drm_free(fence_data);
-}
-
-static int __nv_drm_convert_in_fences(
-    struct nv_drm_device *nv_dev,
-    struct drm_atomic_state *state,
-    struct drm_crtc *crtc,
-    struct drm_crtc_state *crtc_state)
-{
-    struct drm_plane *plane = NULL;
-    struct drm_plane_state *plane_state = NULL;
-    struct nv_drm_plane *nv_plane = NULL;
-    struct NvKmsKapiLayerRequestedConfig *plane_req_config = NULL;
-    struct NvKmsKapiHeadRequestedConfig *head_req_config =
-        &to_nv_crtc_state(crtc_state)->req_config;
-    struct nv_drm_plane_fence_cb_data *fence_data;
-    uint32_t semaphore_index;
-    uint32_t idx_count;
-    int ret, i;
-
-    if (!crtc_state->active) {
-        return 0;
-    }
-
-    for_each_new_plane_in_state(state, plane, plane_state, i) {
-        if ((plane->type == DRM_PLANE_TYPE_CURSOR) ||
-            (plane_state->crtc != crtc) ||
-            (plane_state->fence == NULL)) {
-            continue;
-        }
-
-        nv_plane = to_nv_plane(plane);
-        plane_req_config =
-            &head_req_config->layerRequestedConfig[nv_plane->layer_idx];
-
-        if (nv_dev->supportsSyncpts) {
-#if defined(NV_LINUX_NVHOST_H_PRESENT) && defined(CONFIG_TEGRA_GRHOST)
-#if defined(NV_NVHOST_DMA_FENCE_UNPACK_PRESENT)
-            int ret =
-                nvhost_dma_fence_unpack(
-                    plane_state->fence,
-                    &plane_req_config->config.syncParams.u.syncpt.preSyncptId,
-                    &plane_req_config->config.syncParams.u.syncpt.preSyncptValue);
-            if (ret == 0) {
-                plane_req_config->config.syncParams.preSyncptSpecified = true;
-                continue;
-            }
-#endif
-#elif defined(NV_LINUX_HOST1X_NEXT_H_PRESENT)
-            int ret =
-                host1x_fence_extract(
-                    plane_state->fence,
-                    &plane_req_config->config.syncParams.u.syncpt.preSyncptId,
-                    &plane_req_config->config.syncParams.u.syncpt.preSyncptValue);
-            if (ret == 0) {
-                plane_req_config->config.syncParams.preSyncptSpecified = true;
-                continue;
-            }
-#endif
-        }
-
-        /*
-         * Syncpt extraction failed, or syncpts are not supported.
-         * Use general DRM fence support with semaphores instead.
-         */
-        if (plane_req_config->config.syncParams.postSyncptRequested) {
-            // Can't mix Syncpts and semaphores in a given request.
-            return -EINVAL;
-        }
-
-        for (idx_count = 0; idx_count < nv_dev->display_semaphores.count; idx_count++) {
-            semaphore_index = nv_drm_next_display_semaphore(nv_dev);
-            if (nvKms->tryInitDisplaySemaphore(nv_dev->pDevice, semaphore_index)) {
-                break;
-            }
-        }
-
-        if (idx_count == nv_dev->display_semaphores.count) {
-            NV_DRM_DEV_LOG_ERR(
-                nv_dev,
-                "Failed to initialize semaphore for plane fence");
-            /*
-             * This should only happen if the semaphore pool was somehow
-             * exhausted. Waiting a bit and retrying may help in that case.
-             */
-            return -EAGAIN;
-        }
-
-        plane_req_config->config.syncParams.semaphoreSpecified = true;
-        plane_req_config->config.syncParams.u.semaphore.index = semaphore_index;
-
-        fence_data = nv_drm_calloc(1, sizeof(*fence_data));
-
-        if (!fence_data) {
-            NV_DRM_DEV_LOG_ERR(
-                nv_dev,
-                "Failed to allocate callback data for plane fence");
-            nvKms->cancelDisplaySemaphore(nv_dev->pDevice, semaphore_index);
-            return -ENOMEM;
-        }
-
-        fence_data->nv_dev = nv_dev;
-        fence_data->semaphore_index = semaphore_index;
-
-        ret = dma_fence_add_callback(plane_state->fence,
-                                     &fence_data->dma_fence_cb,
-                                     __nv_drm_plane_fence_cb);
-
-        switch (ret) {
-        case -ENOENT:
-            /* The fence is already signaled */
-            __nv_drm_plane_fence_cb(plane_state->fence,
-                                    &fence_data->dma_fence_cb);
-#if defined(fallthrough)
-            fallthrough;
-#else
-            /* Fallthrough */
-#endif
-        case 0:
-            /*
-             * The plane state's fence reference has either been consumed or
-             * belongs to the outstanding callback now.
-             */
-            plane_state->fence = NULL;
-            break;
-        default:
-            NV_DRM_DEV_LOG_ERR(
-                nv_dev,
-                "Failed plane fence callback registration");
-            /* Fence callback registration failed */
-            nvKms->cancelDisplaySemaphore(nv_dev->pDevice, semaphore_index);
-            nv_drm_free(fence_data);
-            return ret;
-        }
-    }
-
    return 0;
 }

@@ -337,8 +172,7 @@ static int __nv_drm_get_syncpt_data(

    head_reply_config = &reply_config->headReplyConfig[nv_crtc->head];

-    /* Use old state because this is only called after drm_atomic_helper_swap_state */
-    for_each_old_plane_in_state(old_crtc_state->state, plane, old_plane_state, i) {
+    nv_drm_for_each_plane_in_state(old_crtc_state->state, plane, old_plane_state, i) {
        struct nv_drm_plane *nv_plane = to_nv_plane(plane);

        if (plane->type == DRM_PLANE_TYPE_CURSOR || old_plane_state->crtc != crtc) {
@@ -399,44 +233,30 @@ nv_drm_atomic_apply_modeset_config(struct drm_device *dev,
        &(to_nv_atomic_state(state)->config);
    struct NvKmsKapiModeSetReplyConfig reply_config = { };
    struct drm_crtc *crtc;
-    struct drm_crtc_state *old_crtc_state, *new_crtc_state;
+    struct drm_crtc_state *crtc_state;
    int i;
    int ret;

-    /*
-     * If sub-owner permission was granted to another NVKMS client, disallow
-     * modesets through the DRM interface.
-     */
-    if (nv_dev->subOwnershipGranted) {
-        return -EINVAL;
-    }
-
-    if (commit) {
-        /*
-         * This function does what is necessary to prepare the framebuffers
-         * attached to each new plane in the state for scan out, mostly by
-         * calling back into driver callbacks the NVIDIA driver does not
-         * provide. The end result is that all it does on the NVIDIA driver
-         * is populate the plane state's dma fence pointers with any implicit
-         * sync fences attached to the GEM objects associated with those planes
-         * in the new state, prefering explicit sync fences when appropriate.
-         * This must be done prior to converting the per-plane fences to
-         * semaphore waits below.
-         */
-        ret = drm_atomic_helper_prepare_planes(dev, state);
-
-        if (ret) {
-            return ret;
-        }
-    }
-
    memset(requested_config, 0, sizeof(*requested_config));

    /* Loop over affected crtcs and construct NvKmsKapiRequestedModeSetConfig */
-    for_each_oldnew_crtc_in_state(state, crtc, old_crtc_state, new_crtc_state, i) {
+    nv_drm_for_each_crtc_in_state(state, crtc, crtc_state, i) {
+        /*
+         * When committing a state, the new state is already stored in
+         * crtc->state. When checking a proposed state, the proposed state is
+         * stored in crtc_state.
+         */
+        struct drm_crtc_state *new_crtc_state =
+                               commit ? crtc->state : crtc_state;
        struct nv_drm_crtc *nv_crtc = to_nv_crtc(crtc);

+        requested_config->headRequestedConfig[nv_crtc->head] =
+            to_nv_crtc_state(new_crtc_state)->req_config;
+
+        requested_config->headsMask |= 1 << nv_crtc->head;
+
        if (commit) {
+            struct drm_crtc_state *old_crtc_state = crtc_state;
            struct nv_drm_crtc_state *nv_new_crtc_state =
                to_nv_crtc_state(new_crtc_state);

@@ -454,25 +274,7 @@ nv_drm_atomic_apply_modeset_config(struct drm_device *dev,

                nv_new_crtc_state->nv_flip = NULL;
            }
-
-            ret = __nv_drm_convert_in_fences(nv_dev,
-                                             state,
-                                             crtc,
-                                             new_crtc_state);
-
-            if (ret != 0) {
-                return ret;
-            }
        }
-
-        /*
-         * Do this deep copy after calling __nv_drm_convert_in_fences,
-         * which modifies the new CRTC state's req_config member
-         */
-        requested_config->headRequestedConfig[nv_crtc->head] =
-            to_nv_crtc_state(new_crtc_state)->req_config;
-
-        requested_config->headsMask |= 1 << nv_crtc->head;
    }

    if (commit && nvKms->systemInfo.bAllowWriteCombining) {
@@ -487,27 +289,20 @@ nv_drm_atomic_apply_modeset_config(struct drm_device *dev,
                                   requested_config,
                                   &reply_config,
                                   commit)) {
-        if (commit || reply_config.flipResult != NV_KMS_FLIP_RESULT_IN_PROGRESS) {
-            return -EINVAL;
-        }
+        return -EINVAL;
    }

    if (commit && nv_dev->supportsSyncpts) {
-        /* commit is true so we check old state */
-        for_each_old_crtc_in_state(state, crtc, old_crtc_state, i) {
+        nv_drm_for_each_crtc_in_state(state, crtc, crtc_state, i) {
            /*! loop over affected crtcs and get NvKmsKapiModeSetReplyConfig */
            ret = __nv_drm_get_syncpt_data(
-                      nv_dev, crtc, old_crtc_state, requested_config, &reply_config);
+                      nv_dev, crtc, crtc_state, requested_config, &reply_config);
            if (ret != 0) {
                return ret;
            }
        }
    }

-    if (commit && nv_dev->requiresVrrSemaphores && reply_config.vrrFlip) {
-        nvKms->signalVrrSemaphore(nv_dev->pDevice, reply_config.vrrSemaphoreIndex);
-    }
-
    return 0;
 }

@@ -516,22 +311,6 @@ int nv_drm_atomic_check(struct drm_device *dev,
 {
    int ret = 0;

-    struct drm_crtc *crtc;
-    struct drm_crtc_state *crtc_state;
-    int i;
-
-    for_each_new_crtc_in_state(state, crtc, crtc_state, i) {
-        /*
-         * if the color management changed on the crtc, we need to update the
-         * crtc's plane's CSC matrices, so add the crtc's planes to the commit
-         */
-        if (crtc_state->color_mgmt_changed) {
-            if ((ret = drm_atomic_add_affected_planes(state, crtc)) != 0) {
-                goto done;
-            }
-        }
-    }
-
    if ((ret = drm_atomic_helper_check(dev, state)) != 0) {
        goto done;
    }
@@ -606,84 +385,47 @@ int nv_drm_atomic_commit(struct drm_device *dev,
    struct nv_drm_device *nv_dev = to_nv_device(dev);

    /*
-     * XXX: drm_mode_config_funcs::atomic_commit() mandates to return -EBUSY
-     * for nonblocking commit if the commit would need to wait for previous
-     * updates (commit tasks/flip event) to complete. In case of blocking
-     * commits it mandates to wait for previous updates to complete. However,
-     * the kernel DRM-KMS documentation does explicitly allow maintaining a
-     * queue of outstanding commits.
-     *
-     * Our system already implements such a queue, but due to
-     * bug 4054608, it is currently not used.
+     * drm_mode_config_funcs::atomic_commit() mandates to return -EBUSY
+     * for nonblocking commit if previous updates (commit tasks/flip event) are
+     * pending. In case of blocking commits it mandates to wait for previous
+     * updates to complete.
     */
-    for_each_new_crtc_in_state(state, crtc, crtc_state, i) {
-        struct nv_drm_crtc *nv_crtc = to_nv_crtc(crtc);
+    if (nonblock) {
+        nv_drm_for_each_crtc_in_state(state, crtc, crtc_state, i) {
+            struct nv_drm_crtc *nv_crtc = to_nv_crtc(crtc);

-        /*
-         * Here you aren't required to hold nv_drm_crtc::flip_list_lock
-         * because:
-         *
-         * The core DRM driver acquires lock for all affected crtcs before
-         * calling into ->commit() hook, therefore it is not possible for
-         * other threads to call into ->commit() hook affecting same crtcs
-         * and enqueue flip objects into flip_list -
-         *
-         *   nv_drm_atomic_commit_internal()
-         *     |-> nv_drm_atomic_apply_modeset_config(commit=true)
-         *           |-> nv_drm_crtc_enqueue_flip()
-         *
-         * Only possibility is list_empty check races with code path
-         * dequeuing flip object -
-         *
-         *   __nv_drm_handle_flip_event()
-         *     |-> nv_drm_crtc_dequeue_flip()
-         *
-         * But this race condition can't lead list_empty() to return
-         * incorrect result. nv_drm_crtc_dequeue_flip() in the middle of
-         * updating the list could not trick us into thinking the list is
-         * empty when it isn't.
-         */
-        if (nonblock) {
+            /*
+             * Here you aren't required to hold nv_drm_crtc::flip_list_lock
+             * because:
+             *
+             * The core DRM driver acquires lock for all affected crtcs before
+             * calling into ->commit() hook, therefore it is not possible for
+             * other threads to call into ->commit() hook affecting same crtcs
+             * and enqueue flip objects into flip_list -
+             *
+             *   nv_drm_atomic_commit_internal()
+             *     |-> nv_drm_atomic_apply_modeset_config(commit=true)
+             *           |-> nv_drm_crtc_enqueue_flip()
+             *
+             * Only possibility is list_empty check races with code path
+             * dequeuing flip object -
+             *
+             *   __nv_drm_handle_flip_event()
+             *     |-> nv_drm_crtc_dequeue_flip()
+             *
+             * But this race condition can't lead list_empty() to return
+             * incorrect result. nv_drm_crtc_dequeue_flip() in the middle of
+             * updating the list could not trick us into thinking the list is
+             * empty when it isn't.
+             */
            if (!list_empty(&nv_crtc->flip_list)) {
                return -EBUSY;
            }
-        } else {
-            if (wait_event_timeout(
-                    nv_dev->flip_event_wq,
-                    list_empty(&nv_crtc->flip_list),
-                    3 * HZ /* 3 second */) == 0) {
-                NV_DRM_DEV_LOG_ERR(
-                    nv_dev,
-                    "Flip event timeout on head %u", nv_crtc->head);
-            }
-        }
-
-        /*
-         * If the legacy LUT needs to be updated, ensure that the previous LUT
-         * update is complete first.
-         */
-        if (crtc_state->color_mgmt_changed) {
-            NvBool complete = nvKms->checkLutNotifier(nv_dev->pDevice,
-                                                      nv_crtc->head,
-                                                      !nonblock /* waitForCompletion */);
-
-            /* If checking the LUT notifier failed, assume no LUT notifier is set. */
-            if (!complete) {
-                if (nonblock) {
-                    return -EBUSY;
-                } else {
-                    /*
-                     * checkLutNotifier should wait on the notifier in this
-                     * case, so we should only get here if the wait timed out.
-                     */
-                    NV_DRM_DEV_LOG_ERR(
-                        nv_dev,
-                        "LUT notifier timeout on head %u", nv_crtc->head);
-                }
-            }
        }
    }

+#if defined(NV_DRM_ATOMIC_HELPER_SWAP_STATE_HAS_STALL_ARG)
+
    /*
     * nv_drm_atomic_commit_internal()
     * implements blocking/non-blocking atomic commit using
@@ -694,18 +436,18 @@ int nv_drm_atomic_commit(struct drm_device *dev,
     * expected.
     */

+#if defined(NV_DRM_ATOMIC_HELPER_SWAP_STATE_RETURN_INT)
    ret = drm_atomic_helper_swap_state(state, false /* stall */);
    if (WARN_ON(ret != 0)) {
        return ret;
    }
+#else
+    drm_atomic_helper_swap_state(state, false /* stall */);
+#endif

-    /*
-     * Used to update legacy modeset state pointers to support UAPIs not updated
-     * by the core atomic modeset infrastructure.
-     *
-     * Example: /sys/class/drm/<card connector>/enabled
-     */
-    drm_atomic_helper_update_legacy_modeset_state(dev, state);
+#else
+    drm_atomic_helper_swap_state(dev, state);
+#endif

    /*
     * nv_drm_atomic_commit_internal() must not return failure after
@@ -723,7 +465,7 @@ int nv_drm_atomic_commit(struct drm_device *dev,
        goto done;
    }

-    for_each_old_crtc_in_state(state, crtc, crtc_state, i) {
+    nv_drm_for_each_crtc_in_state(state, crtc, crtc_state, i) {
        struct nv_drm_crtc *nv_crtc = to_nv_crtc(crtc);
        struct nv_drm_crtc_state *nv_new_crtc_state =
            to_nv_crtc_state(crtc->state);
@@ -802,29 +544,20 @@ int nv_drm_atomic_commit(struct drm_device *dev,
                NV_DRM_DEV_LOG_ERR(
                    nv_dev,
                    "Flip event timeout on head %u", nv_crtc->head);
-                while (!list_empty(&nv_crtc->flip_list)) {
-                    __nv_drm_handle_flip_event(nv_crtc);
-                }
-            }
-
-            if (crtc_state->color_mgmt_changed) {
-                NvBool complete = nvKms->checkLutNotifier(nv_dev->pDevice,
-                                                          nv_crtc->head,
-                                                          true /* waitForCompletion */);
-                if (!complete) {
-                    NV_DRM_DEV_LOG_ERR(
-                        nv_dev,
-                        "LUT notifier timeout on head %u", nv_crtc->head);
-                }
            }
        }
    }

 done:

+#if defined(NV_DRM_ATOMIC_STATE_REF_COUNTING_PRESENT)
    /*
-     * State will be freed when the caller drops its reference after we return.
+     * If ref counting is present, state will be freed when the caller
+     * drops its reference after we return.
     */
+#else
+    drm_atomic_state_free(state);
+#endif

    return 0;
 }
--- a/kernel-open/nvidia-drm/nvidia-drm-modeset.h
+++ b/kernel-open/nvidia-drm/nvidia-drm-modeset.h
@@ -25,7 +25,7 @@

 #include "nvidia-drm-conftest.h"

-#if defined(NV_DRM_AVAILABLE)
+#if defined(NV_DRM_ATOMIC_MODESET_AVAILABLE)

 #include "nvkms-kapi.h"

@@ -48,6 +48,6 @@ void nv_drm_handle_flip_occurred(struct nv_drm_device *nv_dev,

 int nv_drm_shut_down_all_crtcs(struct drm_device *dev);

-#endif /* NV_DRM_AVAILABLE */
+#endif /* NV_DRM_ATOMIC_MODESET_AVAILABLE */

 #endif /* __NVIDIA_DRM_MODESET_H__ */
--- a/kernel-open/nvidia-drm/nvidia-drm-os-interface.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-os-interface.c
@@ -1,257 +0,0 @@
-/*
- * Copyright (c) 2015-2025, NVIDIA CORPORATION. All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice shall be included in
- * all copies or substantial portions of the Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
- * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
- * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- */
-
-#include <linux/slab.h>
-
-#include "nvidia-drm-os-interface.h"
-
-#if defined(NV_DRM_AVAILABLE)
-
-#include <linux/file.h>
-#include <linux/sync_file.h>
-#include <linux/vmalloc.h>
-#include <linux/sched.h>
-#include <linux/device.h>
-
-#include "nv-mm.h"
-
-#if defined(NV_DRM_DRMP_H_PRESENT)
-#include <drm/drmP.h>
-#endif
-
-bool nv_drm_modeset_module_param = false;
-bool nv_drm_fbdev_module_param = true;
-
-void *nv_drm_calloc(size_t nmemb, size_t size)
-{
-    size_t total_size = nmemb * size;
-    //
-    // Check for overflow.
-    //
-    if ((nmemb != 0) && ((total_size / nmemb) != size))
-    {
-        return NULL;
-    }
-    return kzalloc(nmemb * size, GFP_KERNEL);
-}
-
-void nv_drm_free(void *ptr)
-{
-    if (IS_ERR(ptr)) {
-        return;
-    }
-
-    kfree(ptr);
-}
-
-#if defined(NVCPU_X86) || defined(NVCPU_X86_64)
-  #define WRITE_COMBINE_FLUSH()    asm volatile("sfence":::"memory")
-#elif defined(NVCPU_PPC64LE)
-  #define WRITE_COMBINE_FLUSH()    asm volatile("sync":::"memory")
-#else
-  #define WRITE_COMBINE_FLUSH()    mb()
-#endif
-
-void nv_drm_write_combine_flush(void)
-{
-    WRITE_COMBINE_FLUSH();
-}
-
-int nv_drm_lock_user_pages(unsigned long address,
-                           unsigned long pages_count, struct page ***pages)
-{
-    struct mm_struct *mm = current->mm;
-    struct page **user_pages;
-    int pages_pinned;
-
-    user_pages = nv_drm_calloc(pages_count, sizeof(*user_pages));
-
-    if (user_pages == NULL) {
-        return -ENOMEM;
-    }
-
-    nv_mmap_read_lock(mm);
-
-    pages_pinned = NV_PIN_USER_PAGES(address, pages_count, FOLL_WRITE,
-                                     user_pages);
-    nv_mmap_read_unlock(mm);
-
-    if (pages_pinned < 0 || (unsigned)pages_pinned < pages_count) {
-        goto failed;
-    }
-
-    *pages = user_pages;
-
-    return 0;
-
-failed:
-
-    if (pages_pinned > 0) {
-        int i;
-
-        for (i = 0; i < pages_pinned; i++) {
-           NV_UNPIN_USER_PAGE(user_pages[i]);
-        }
-    }
-
-    nv_drm_free(user_pages);
-
-    return (pages_pinned < 0) ? pages_pinned : -EINVAL;
-}
-
-void nv_drm_unlock_user_pages(unsigned long  pages_count, struct page **pages)
-{
-    unsigned long i;
-
-    for (i = 0; i < pages_count; i++) {
-        set_page_dirty_lock(pages[i]);
-        NV_UNPIN_USER_PAGE(pages[i]);
-    }
-
-    nv_drm_free(pages);
-}
-
-/*
- * linuxkpi vmap doesn't use the flags argument as it
- * doesn't seem to be needed. Define VM_USERMAP to 0
- * to make errors go away
- *
- * vmap: sys/compat/linuxkpi/common/src/linux_compat.c
- */
-#if defined(NV_BSD)
-#define VM_USERMAP 0
-#endif
-
-void *nv_drm_vmap(struct page **pages, unsigned long pages_count, bool cached)
-{
-    pgprot_t prot = PAGE_KERNEL;
-
-    if (!cached) {
-        prot = pgprot_noncached(PAGE_KERNEL);
-    }
-
-    return vmap(pages, pages_count, VM_USERMAP, prot);
-}
-
-void nv_drm_vunmap(void *address)
-{
-    vunmap(address);
-}
-
-bool nv_drm_workthread_init(nv_drm_workthread *worker, const char *name)
-{
-    worker->shutting_down = false;
-    if (nv_kthread_q_init(&worker->q, name)) {
-        return false;
-    }
-
-    spin_lock_init(&worker->lock);
-
-    return true;
-}
-
-void nv_drm_workthread_shutdown(nv_drm_workthread *worker)
-{
-    unsigned long flags;
-
-    spin_lock_irqsave(&worker->lock, flags);
-    worker->shutting_down = true;
-    spin_unlock_irqrestore(&worker->lock, flags);
-
-    nv_kthread_q_stop(&worker->q);
-}
-
-void nv_drm_workthread_work_init(nv_drm_work *work,
-                                 void (*callback)(void *),
-                                 void *arg)
-{
-    nv_kthread_q_item_init(work, callback, arg);
-}
-
-int nv_drm_workthread_add_work(nv_drm_workthread *worker, nv_drm_work *work)
-{
-    unsigned long flags;
-    int ret = 0;
-
-    spin_lock_irqsave(&worker->lock, flags);
-    if (!worker->shutting_down) {
-        ret = nv_kthread_q_schedule_q_item(&worker->q, work);
-    }
-    spin_unlock_irqrestore(&worker->lock, flags);
-
-    return ret;
-}
-
-void nv_drm_timer_setup(nv_drm_timer *timer, void (*callback)(nv_drm_timer *nv_drm_timer))
-{
-    nv_timer_setup(timer, callback);
-}
-
-void nv_drm_mod_timer(nv_drm_timer *timer, unsigned long timeout_native)
-{
-    mod_timer(&timer->kernel_timer, timeout_native);
-}
-
-unsigned long nv_drm_timer_now(void)
-{
-    return jiffies;
-}
-
-unsigned long nv_drm_timeout_from_ms(NvU64 relative_timeout_ms)
-{
-    return jiffies + msecs_to_jiffies(relative_timeout_ms);
-}
-
-int nv_drm_create_sync_file(struct dma_fence *fence)
-{
-    struct sync_file *sync;
-    int fd = get_unused_fd_flags(O_CLOEXEC);
-
-    if (fd < 0) {
-        return fd;
-    }
-
-    /* sync_file_create() generates its own reference to the fence */
-    sync = sync_file_create(fence);
-
-    if (IS_ERR(sync)) {
-        put_unused_fd(fd);
-        return PTR_ERR(sync);
-    }
-
-    fd_install(fd, sync->file);
-
-    return fd;
-}
-
-struct dma_fence *nv_drm_sync_file_get_fence(int fd)
-{
-    return sync_file_get_fence(fd);
-}
-
-void nv_drm_yield(void)
-{
-    set_current_state(TASK_INTERRUPTIBLE);
-    schedule_timeout(1);
-}
-
-#endif /* NV_DRM_AVAILABLE */
--- a/kernel-open/nvidia-drm/nvidia-drm-os-interface.h
+++ b/kernel-open/nvidia-drm/nvidia-drm-os-interface.h
@@ -1,5 +1,5 @@
 /*
- * Copyright (c) 2015-2025, NVIDIA CORPORATION. All rights reserved.
+ * Copyright (c) 2015, NVIDIA CORPORATION. All rights reserved.
 *
 * Permission is hereby granted, free of charge, to any person obtaining a
 * copy of this software and associated documentation files (the "Software"),
@@ -29,46 +29,17 @@

 #if defined(NV_DRM_AVAILABLE)

-#include "linux/dma-fence.h"
-
-#if defined(NV_LINUX) || defined(NV_BSD)
-#include "nv-kthread-q.h"
-#include "linux/spinlock.h"
-
-typedef struct nv_drm_workthread {
-    spinlock_t lock;
-    struct nv_kthread_q q;
-    bool shutting_down;
-} nv_drm_workthread;
-
-typedef nv_kthread_q_item_t nv_drm_work;
-
-#else
-#error "Need to define deferred work primitives for this OS"
-#endif
-
-#if defined(NV_LINUX) || defined(NV_BSD)
-#include "nv-timer.h"
-
-typedef struct nv_timer nv_drm_timer;
-
-#else
-#error "Need to define kernel timer callback primitives for this OS"
-#endif
-
 struct page;

 /* Set to true when the atomic modeset feature is enabled. */
 extern bool nv_drm_modeset_module_param;
-#if defined(NV_DRM_FBDEV_AVAILABLE)
-/* Set to true when the nvidia-drm driver should install a framebuffer device */
-extern bool nv_drm_fbdev_module_param;
-#endif

 void *nv_drm_calloc(size_t nmemb, size_t size);

 void nv_drm_free(void *ptr);

+char *nv_drm_asprintf(const char *fmt, ...);
+
 void nv_drm_write_combine_flush(void);

 int nv_drm_lock_user_pages(unsigned long address,
@@ -76,37 +47,10 @@ int nv_drm_lock_user_pages(unsigned long address,

 void nv_drm_unlock_user_pages(unsigned long  pages_count, struct page **pages);

-void *nv_drm_vmap(struct page **pages, unsigned long pages_count, bool cached);
+void *nv_drm_vmap(struct page **pages, unsigned long pages_count);

 void nv_drm_vunmap(void *address);

-bool nv_drm_workthread_init(nv_drm_workthread *worker, const char *name);
-
-/* Can be called concurrently with nv_drm_workthread_add_work() */
-void nv_drm_workthread_shutdown(nv_drm_workthread *worker);
-
-void nv_drm_workthread_work_init(nv_drm_work *work,
-                                 void (*callback)(void *),
-                                 void *arg);
-
-/* Can be called concurrently with nv_drm_workthread_shutdown() */
-int nv_drm_workthread_add_work(nv_drm_workthread *worker, nv_drm_work *work);
-
-void nv_drm_timer_setup(nv_drm_timer *timer,
-                        void (*callback)(nv_drm_timer *nv_drm_timer));
-
-void nv_drm_mod_timer(nv_drm_timer *timer, unsigned long relative_timeout_ms);
-
-unsigned long nv_drm_timer_now(void);
-
-unsigned long nv_drm_timeout_from_ms(NvU64 relative_timeout_ms);
-
-int nv_drm_create_sync_file(struct dma_fence *fence);
-
-struct dma_fence *nv_drm_sync_file_get_fence(int fd);
-
-void nv_drm_yield(void);
-
-#endif /* defined(NV_DRM_AVAILABLE) */
+#endif

 #endif /* __NVIDIA_DRM_OS_INTERFACE_H__ */
--- a/kernel-open/nvidia-drm/nvidia-drm-prime-fence.c
+++ b/kernel-open/nvidia-drm/nvidia-drm-prime-fence.c
@@ -0,0 +1,527 @@
+/*
+ * Copyright (c) 2016, NVIDIA CORPORATION. All rights reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice shall be included in
+ * all copies or substantial portions of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
+ * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
+ * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ */
+
+#include "nvidia-drm-conftest.h"
+
+#if defined(NV_DRM_AVAILABLE)
+
+#if defined(NV_DRM_DRMP_H_PRESENT)
+#include <drm/drmP.h>
+#endif
+
+#include "nvidia-drm-priv.h"
+#include "nvidia-drm-ioctl.h"
+#include "nvidia-drm-gem.h"
+#include "nvidia-drm-prime-fence.h"
+#include "nvidia-dma-resv-helper.h"
+
+#if defined(NV_DRM_FENCE_AVAILABLE)
+
+#include "nvidia-dma-fence-helper.h"
+
+struct nv_drm_fence_context {
+    struct nv_drm_device *nv_dev;
+
+    uint32_t context;
+
+    NvU64 fenceSemIndex; /* Index into semaphore surface */
+
+    /* Mapped semaphore surface */
+    struct NvKmsKapiMemory *pSemSurface;
+    NvU32 *pLinearAddress;
+
+    /* Protects nv_drm_fence_context::{pending, last_seqno} */
+    spinlock_t lock;
+
+    /*
+     * Software signaling structures. __nv_drm_fence_context_new()
+     * allocates channel event and __nv_drm_fence_context_destroy() frees it.
+     * There are no simultaneous read/write access to 'cb', therefore it does
+     * not require spin-lock protection.
+     */
+    struct NvKmsKapiChannelEvent *cb;
+
+    /* List of pending fences which are not yet signaled */
+    struct list_head pending;
+
+    unsigned last_seqno;
+};
+
+struct nv_drm_prime_fence {
+    struct list_head list_entry;
+    nv_dma_fence_t base;
+    spinlock_t lock;
+};
+
+static inline
+struct nv_drm_prime_fence *to_nv_drm_prime_fence(nv_dma_fence_t *fence)
+{
+    return container_of(fence, struct nv_drm_prime_fence, base);
+}
+
+static const char*
+nv_drm_gem_prime_fence_op_get_driver_name(nv_dma_fence_t *fence)
+{
+    return "NVIDIA";
+}
+
+static const char*
+nv_drm_gem_prime_fence_op_get_timeline_name(nv_dma_fence_t *fence)
+{
+    return "nvidia.prime";
+}
+
+static bool nv_drm_gem_prime_fence_op_enable_signaling(nv_dma_fence_t *fence)
+{
+    // DO NOTHING
+    return true;
+}
+
+static void nv_drm_gem_prime_fence_op_release(nv_dma_fence_t *fence)
+{
+    struct nv_drm_prime_fence *nv_fence = to_nv_drm_prime_fence(fence);
+    nv_drm_free(nv_fence);
+}
+
+static signed long
+nv_drm_gem_prime_fence_op_wait(nv_dma_fence_t *fence,
+                               bool intr, signed long timeout)
+{
+    /*
+     * If the waiter requests to wait with no timeout, force a timeout to ensure
+     * that it won't get stuck forever in the kernel if something were to go
+     * wrong with signaling, such as a malicious userspace not releasing the
+     * semaphore.
+     *
+     * 96 ms (roughly 6 frames @ 60 Hz) is arbitrarily chosen to be long enough
+     * that it should never get hit during normal operation, but not so long
+     * that the system becomes unresponsive.
+     */
+    return nv_dma_fence_default_wait(fence, intr,
+                              (timeout == MAX_SCHEDULE_TIMEOUT) ?
+                                  msecs_to_jiffies(96) : timeout);
+}
+
+static const nv_dma_fence_ops_t nv_drm_gem_prime_fence_ops = {
+    .get_driver_name = nv_drm_gem_prime_fence_op_get_driver_name,
+    .get_timeline_name = nv_drm_gem_prime_fence_op_get_timeline_name,
+    .enable_signaling = nv_drm_gem_prime_fence_op_enable_signaling,
+    .release = nv_drm_gem_prime_fence_op_release,
+    .wait = nv_drm_gem_prime_fence_op_wait,
+};
+
+static inline void
+__nv_drm_prime_fence_signal(struct nv_drm_prime_fence *nv_fence)
+{
+    list_del(&nv_fence->list_entry);
+    nv_dma_fence_signal(&nv_fence->base);
+    nv_dma_fence_put(&nv_fence->base);
+}
+
+static void nv_drm_gem_prime_force_fence_signal(
+    struct nv_drm_fence_context *nv_fence_context)
+{
+    WARN_ON(!spin_is_locked(&nv_fence_context->lock));
+
+    while (!list_empty(&nv_fence_context->pending)) {
+        struct nv_drm_prime_fence *nv_fence = list_first_entry(
+            &nv_fence_context->pending,
+            typeof(*nv_fence),
+            list_entry);
+
+        __nv_drm_prime_fence_signal(nv_fence);
+    }
+}
+
+static void nv_drm_gem_prime_fence_event
+(
+    void *dataPtr,
+    NvU32 dataU32
+)
+{
+    struct nv_drm_fence_context *nv_fence_context = dataPtr;
+
+    spin_lock(&nv_fence_context->lock);
+
+    while (!list_empty(&nv_fence_context->pending)) {
+        struct nv_drm_prime_fence *nv_fence = list_first_entry(
+            &nv_fence_context->pending,
+            typeof(*nv_fence),
+            list_entry);
+
+        /* Index into surface with 16 byte stride */
+        unsigned int seqno = *((nv_fence_context->pLinearAddress) +
+                               (nv_fence_context->fenceSemIndex * 4));
+
+        if (nv_fence->base.seqno > seqno) {
+            /*
+             * Fences in list are placed in increasing order of sequence
+             * number, breaks a loop once found first fence not
+             * ready to signal.
+             */
+            break;
+        }
+
+        __nv_drm_prime_fence_signal(nv_fence);
+    }
+
+    spin_unlock(&nv_fence_context->lock);
+}
+
+static inline struct nv_drm_fence_context *__nv_drm_fence_context_new(
+    struct nv_drm_device *nv_dev,
+    struct drm_nvidia_fence_context_create_params *p)
+{
+    struct nv_drm_fence_context *nv_fence_context;
+    struct NvKmsKapiMemory *pSemSurface;
+    NvU32 *pLinearAddress;
+
+    /* Allocate backup nvkms resources */
+
+    pSemSurface = nvKms->importMemory(nv_dev->pDevice,
+                                      p->size,
+                                      p->import_mem_nvkms_params_ptr,
+                                      p->import_mem_nvkms_params_size);
+    if (!pSemSurface) {
+        NV_DRM_DEV_LOG_ERR(
+            nv_dev,
+            "Failed to import fence semaphore surface");
+
+        goto failed;
+    }
+
+    if (!nvKms->mapMemory(nv_dev->pDevice,
+                          pSemSurface,
+                          NVKMS_KAPI_MAPPING_TYPE_KERNEL,
+                          (void **) &pLinearAddress)) {
+        NV_DRM_DEV_LOG_ERR(
+            nv_dev,
+            "Failed to map fence semaphore surface");
+
+        goto failed_to_map_memory;
+    }
+
+    /*
+     * Allocate a fence context object, initialize it and allocate channel
+     * event for it.
+     */
+
+    if ((nv_fence_context = nv_drm_calloc(
+                    1,
+                    sizeof(*nv_fence_context))) == NULL) {
+        goto failed_alloc_fence_context;
+    }
+
+    /*
+     * nv_dma_fence_context_alloc() cannot fail, so we do not need
+     * to check a return value.
+     */
+
+    *nv_fence_context = (struct nv_drm_fence_context) {
+        .nv_dev = nv_dev,
+        .context = nv_dma_fence_context_alloc(1),
+        .pSemSurface = pSemSurface,
+        .pLinearAddress = pLinearAddress,
+        .fenceSemIndex = p->index,
+    };
+
+    INIT_LIST_HEAD(&nv_fence_context->pending);
+
+    spin_lock_init(&nv_fence_context->lock);
+
+    /*
+     * Except 'cb', the fence context should be completely initialized
+     * before channel event allocation because the fence context may start
+     * receiving events immediately after allocation.
+     *
+     * There are no simultaneous read/write access to 'cb', therefore it does
+     * not require spin-lock protection.
+     */
+    nv_fence_context->cb =
+        nvKms->allocateChannelEvent(nv_dev->pDevice,
+                                    nv_drm_gem_prime_fence_event,
+                                    nv_fence_context,
+                                    p->event_nvkms_params_ptr,
+                                    p->event_nvkms_params_size);
+    if (!nv_fence_context->cb) {
+        NV_DRM_DEV_LOG_ERR(nv_dev,
+                           "Failed to allocate fence signaling event");
+        goto failed_to_allocate_channel_event;
+    }
+
+    return nv_fence_context;
+
+failed_to_allocate_channel_event:
+    nv_drm_free(nv_fence_context);
+
+failed_alloc_fence_context:
+
+    nvKms->unmapMemory(nv_dev->pDevice,
+                       pSemSurface,
+                       NVKMS_KAPI_MAPPING_TYPE_KERNEL,
+                       (void *) pLinearAddress);
+
+failed_to_map_memory:
+    nvKms->freeMemory(nv_dev->pDevice, pSemSurface);
+
+failed:
+    return NULL;
+}
+
+static void __nv_drm_fence_context_destroy(
+    struct nv_drm_fence_context *nv_fence_context)
+{
+    struct nv_drm_device *nv_dev = nv_fence_context->nv_dev;
+
+    /*
+     * Free channel event before destroying the fence context, otherwise event
+     * callback continue to get called.
+     */
+    nvKms->freeChannelEvent(nv_dev->pDevice, nv_fence_context->cb);
+
+    /* Force signal all pending fences and empty pending list */
+    spin_lock(&nv_fence_context->lock);
+
+    nv_drm_gem_prime_force_fence_signal(nv_fence_context);
+
+    spin_unlock(&nv_fence_context->lock);
+
+    /* Free nvkms resources */
+
+    nvKms->unmapMemory(nv_dev->pDevice,
+                       nv_fence_context->pSemSurface,
+                       NVKMS_KAPI_MAPPING_TYPE_KERNEL,
+                       (void *) nv_fence_context->pLinearAddress);
+
+    nvKms->freeMemory(nv_dev->pDevice, nv_fence_context->pSemSurface);
+
+    nv_drm_free(nv_fence_context);
+}
+
+static nv_dma_fence_t *__nv_drm_fence_context_create_fence(
+    struct nv_drm_fence_context *nv_fence_context,
+    unsigned int seqno)
+{
+    struct nv_drm_prime_fence *nv_fence;
+    int ret = 0;
+
+    if ((nv_fence = nv_drm_calloc(1, sizeof(*nv_fence))) == NULL) {
+        ret = -ENOMEM;
+        goto out;
+    }
+
+    spin_lock(&nv_fence_context->lock);
+
+    /*
+     * If seqno wrapped, force signal fences to make sure none of them
+     * get stuck.
+     */
+    if (seqno < nv_fence_context->last_seqno) {
+        nv_drm_gem_prime_force_fence_signal(nv_fence_context);
+    }
+
+    INIT_LIST_HEAD(&nv_fence->list_entry);
+
+    spin_lock_init(&nv_fence->lock);
+
+    nv_dma_fence_init(&nv_fence->base, &nv_drm_gem_prime_fence_ops,
+                      &nv_fence->lock, nv_fence_context->context,
+                      seqno);
+
+    list_add_tail(&nv_fence->list_entry, &nv_fence_context->pending);
+
+    nv_fence_context->last_seqno = seqno;
+
+    spin_unlock(&nv_fence_context->lock);
+
+out:
+    return ret != 0 ? ERR_PTR(ret) : &nv_fence->base;
+}
+
+int nv_drm_fence_supported_ioctl(struct drm_device *dev,
+                                 void *data, struct drm_file *filep)
+{
+    struct nv_drm_device *nv_dev = to_nv_device(dev);
+    return nv_dev->pDevice ? 0 : -EINVAL;
+}
+
+struct nv_drm_gem_fence_context {
+    struct nv_drm_gem_object base;
+    struct nv_drm_fence_context *nv_fence_context;
+};
+
+static inline struct nv_drm_gem_fence_context *to_gem_fence_context(
+    struct nv_drm_gem_object *nv_gem)
+{
+    if (nv_gem != NULL) {
+        return container_of(nv_gem, struct nv_drm_gem_fence_context, base);
+    }
+
+    return NULL;
+}
+
+/*
+ * Tear down of the 'struct nv_drm_gem_fence_context' object is not expected
+ * to be happen from any worker thread, if that happen it causes dead-lock
+ * because tear down sequence calls to flush all existing
+ * worker thread.
+ */
+static void __nv_drm_gem_fence_context_free(struct nv_drm_gem_object *nv_gem)
+{
+    struct nv_drm_gem_fence_context *nv_gem_fence_context =
+        to_gem_fence_context(nv_gem);
+
+    __nv_drm_fence_context_destroy(nv_gem_fence_context->nv_fence_context);
+
+    nv_drm_free(nv_gem_fence_context);
+}
+
+const struct nv_drm_gem_object_funcs nv_gem_fence_context_ops = {
+    .free = __nv_drm_gem_fence_context_free,
+};
+
+static inline
+struct nv_drm_gem_fence_context *__nv_drm_gem_object_fence_context_lookup(
+    struct drm_device *dev,
+    struct drm_file *filp,
+    u32 handle)
+{
+    struct nv_drm_gem_object *nv_gem =
+            nv_drm_gem_object_lookup(dev, filp, handle);
+
+    if (nv_gem != NULL && nv_gem->ops != &nv_gem_fence_context_ops) {
+        nv_drm_gem_object_unreference_unlocked(nv_gem);
+        return NULL;
+    }
+
+    return to_gem_fence_context(nv_gem);
+}
+
+int nv_drm_fence_context_create_ioctl(struct drm_device *dev,
+                                      void *data, struct drm_file *filep)
+{
+    struct nv_drm_device *nv_dev = to_nv_device(dev);
+    struct drm_nvidia_fence_context_create_params *p = data;
+    struct nv_drm_gem_fence_context *nv_gem_fence_context = NULL;
+
+    if ((nv_gem_fence_context = nv_drm_calloc(
+                1,
+                sizeof(struct nv_drm_gem_fence_context))) == NULL) {
+        goto done;
+    }
+
+    if ((nv_gem_fence_context->nv_fence_context =
+                __nv_drm_fence_context_new(nv_dev, p)) == NULL) {
+        goto fence_context_new_failed;
+    }
+
+    nv_drm_gem_object_init(nv_dev,
+                           &nv_gem_fence_context->base,
+                           &nv_gem_fence_context_ops,
+                           0 /* size */,
+                           NULL /* pMemory */);
+
+    return nv_drm_gem_handle_create_drop_reference(filep,
+                                                   &nv_gem_fence_context->base,
+                                                   &p->handle);
+
+fence_context_new_failed:
+    nv_drm_free(nv_gem_fence_context);
+
+done:
+    return -ENOMEM;
+}
+
+int nv_drm_gem_fence_attach_ioctl(struct drm_device *dev,
+                                  void *data, struct drm_file *filep)
+{
+    int ret = -EINVAL;
+    struct nv_drm_device *nv_dev = to_nv_device(dev);
+    struct drm_nvidia_gem_fence_attach_params *p = data;
+
+    struct nv_drm_gem_object *nv_gem;
+    struct nv_drm_gem_fence_context *nv_gem_fence_context;
+
+    nv_dma_fence_t *fence;
+
+    nv_gem = nv_drm_gem_object_lookup(nv_dev->dev, filep, p->handle);
+
+    if (!nv_gem) {
+        NV_DRM_DEV_LOG_ERR(
+            nv_dev,
+            "Failed to lookup gem object for fence attach: 0x%08x",
+            p->handle);
+
+        goto done;
+    }
+
+    if((nv_gem_fence_context = __nv_drm_gem_object_fence_context_lookup(
+                nv_dev->dev,
+                filep,
+                p->fence_context_handle)) == NULL) {
+
+        NV_DRM_DEV_LOG_ERR(
+            nv_dev,
+            "Failed to lookup gem object for fence context: 0x%08x",
+            p->fence_context_handle);
+
+        goto fence_context_lookup_failed;
+    }
+
+    if (IS_ERR(fence = __nv_drm_fence_context_create_fence(
+                            nv_gem_fence_context->nv_fence_context,
+                            p->sem_thresh))) {
+        ret = PTR_ERR(fence);
+
+        NV_DRM_DEV_LOG_ERR(
+            nv_dev,
+            "Failed to allocate fence: 0x%08x", p->handle);
+
+        goto fence_context_create_fence_failed;
+    }
+
+    nv_dma_resv_lock(&nv_gem->resv, NULL);
+
+    ret = nv_dma_resv_reserve_fences(&nv_gem->resv, 1, false);
+    if (ret == 0) {
+        nv_dma_resv_add_excl_fence(&nv_gem->resv, fence);
+    } else {
+        NV_DRM_DEV_LOG_ERR(
+            nv_dev,
+            "Failed to reserve fence. Error code: %d", ret);
+    }
+
+    nv_dma_resv_unlock(&nv_gem->resv);
+
+fence_context_create_fence_failed:
+    nv_drm_gem_object_unreference_unlocked(&nv_gem_fence_context->base);
+
+fence_context_lookup_failed:
+    nv_drm_gem_object_unreference_unlocked(nv_gem);
+
+done:
+    return ret;
+}
+
+#endif /* NV_DRM_FENCE_AVAILABLE */
+
+#endif /* NV_DRM_AVAILABLE */
--- a/Show More
+++ b/Show More
Author	SHA1	Message	Date
Liam Middlebrook	91e02299dc	515.49.15	2022-08-31 16:33:34 -07:00
Liam Middlebrook	f848abf44e	515.49.14	2022-08-20 10:17:35 -07:00
Andy Ritger	54b4babe66	515.65.01	2022-08-19 12:19:07 -07:00
Joshua Ashton	fd95f2c984	dp_connectorimpl: Use switch-case for dscBitsPerPixelIncrement This is an enum, so we can just use a switch case instead of chaning IFs constantly.	2022-08-19 12:14:52 -07:00
Joshua Ashton	3dfc7ad812	dp_connectorimpl: Remove duplicate dscBitsPerPixelIncrement All other values of the BITS_PER_PIXEL_INCREMENT are handled here. This one was previously using a bitwise OR in, then also assigning directly after. Closes: #54	2022-08-19 12:14:44 -07:00
Joshua Ashton	c7d822bc16	osapi: Fix dereferencing NULL pNumaMemSize in rm_get_gpu_numa_info Copy paste error. Closes: #55	2022-08-19 12:14:36 -07:00
Joshua Ashton	23f33d8e6d	dp_configcaps: Avoid querying bus if both bLinkActive and bLinkReady is NULL Doesn't fix a crash -- but avoids redundant work due to a copy paste error. Closes #56	2022-08-19 12:14:26 -07:00
Joshua Ashton	888f90fa00	nv-pci: Fix nullptr dereference if device was not found Closes #57	2022-08-19 12:14:19 -07:00
Liam Middlebrook	b6f1938c51	515.49.10	2022-07-20 12:18:00 -07:00
Liam Middlebrook	2b47261a36	515.49.06	2022-07-01 17:52:19 -07:00
Andy Ritger	5375d5644f	515.57	2022-07-01 17:52:05 -07:00
Liam Middlebrook	a301003fda	515.49.05	2022-06-17 10:10:02 -07:00