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https://github.com/ROCm/composable_kernel.git
synced 2026-05-11 08:50:17 +00:00
inline gemm 8x8
This commit is contained in:
Jing Zhang
@@ -464,20 +464,19 @@ struct BlockwiseGemmBlockABlockBThreadCTransANormalBNormalC_v2
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const float4* b_loc = (const float4 *)(p_b_block + b_src_index);
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float4* reg = (float4 *)(p_a_thread + dst_index);
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//reg[0] = a_loc[0];
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//reg[1] = a_loc[16];
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//reg[2] = b_loc[0];
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//reg[3] = b_loc[8];
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//s_waitcnt lgkmcnt(0) // 000000001398: BF8CC07F
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asm volatile("\n \
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ds_read2_b64 %0, %4 offset1:1 \n \
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ds_read2_b64 %1, %4 offset0:32 offset1:33 \n \
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ds_read2_b64 %2, %5 offset1:1 \n \
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ds_read2_b64 %3, %5 offset0:16 offset1:17 \n \
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s_waitcnt lgkmcnt(0)"
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: "=v"(reg[0]), "=v"(reg[1]), "=v"(reg[2]), "=v"(reg[3])
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: "v"(__to_local((void *)(a_loc))), "v"(__to_local((void *)(b_loc)))
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);
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reg[0] = a_loc[0];
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reg[1] = a_loc[16];
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reg[2] = b_loc[0];
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reg[3] = b_loc[8];
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//asm volatile("\n \
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//ds_read2_b64 %0, %4 offset1:1 \n \
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//ds_read2_b64 %1, %4 offset0:32 offset1:33 \n \
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//ds_read2_b64 %2, %5 offset1:1 \n \
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//ds_read2_b64 %3, %5 offset0:16 offset1:17 \n \
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//s_waitcnt lgkmcnt(0)"
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//: "=v"(reg[0]), "=v"(reg[1]), "=v"(reg[2]), "=v"(reg[3])
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//: "v"(__to_local((void *)(a_loc))), "v"(__to_local((void *)(b_loc)))
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//);
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#endif
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@@ -495,58 +494,219 @@ struct BlockwiseGemmBlockABlockBThreadCTransANormalBNormalC_v2
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p_c_thread,
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f_accum);
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#else
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for(index_t k = 0; k < 1; ++k)
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{
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// M = 8
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const index_t bindex = b_thread_sub_mtx.Get1dIndex(k, 0);
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for(index_t i = 0; i < 8; ++i)
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{
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// N = 8
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const index_t aindex = a_thread_sub_mtx.Get1dIndex(k, i); // A is transposed
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const index_t cindex = c_thread_mtx.Get1dIndex(i, 0);
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//for(index_t j = 0; j < 8; ++j)
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{
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//p_c_thread[cindex] += p_a_thread[aindex] * p_b_thread[bindex];
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asm volatile("\n \
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v_mac_f32 %0, %8, %9 \n \
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v_mac_f32 %1, %8, %10 \n \
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v_mac_f32 %2, %8, %11 \n \
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v_mac_f32 %3, %8, %12 \n \
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v_mac_f32 %4, %8, %13 \n \
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v_mac_f32 %5, %8, %14 \n \
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v_mac_f32 %6, %8, %15 \n \
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v_mac_f32 %7, %8, %16 \n \
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v_mac_f32 %0, %64, %72 \n \
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v_mac_f32 %1, %64, %73 \n \
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v_mac_f32 %2, %64, %74 \n \
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v_mac_f32 %3, %64, %75 \n \
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v_mac_f32 %4, %64, %76 \n \
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v_mac_f32 %5, %64, %77 \n \
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v_mac_f32 %6, %64, %78 \n \
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v_mac_f32 %7, %64, %79 \n \
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v_mac_f32 %8, %65, %72 \n \
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v_mac_f32 %9, %65, %73 \n \
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v_mac_f32 %10, %65, %74 \n \
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v_mac_f32 %11, %65, %75 \n \
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v_mac_f32 %12, %65, %76 \n \
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v_mac_f32 %13, %65, %77 \n \
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v_mac_f32 %14, %65, %78 \n \
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v_mac_f32 %15, %65, %79 \n \
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v_mac_f32 %16, %66, %72 \n \
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v_mac_f32 %17, %66, %73 \n \
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v_mac_f32 %18, %66, %74 \n \
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v_mac_f32 %19, %66, %75 \n \
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v_mac_f32 %20, %66, %76 \n \
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v_mac_f32 %21, %66, %77 \n \
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v_mac_f32 %22, %66, %78 \n \
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v_mac_f32 %23, %66, %79 \n \
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v_mac_f32 %24, %67, %72 \n \
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v_mac_f32 %25, %67, %73 \n \
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v_mac_f32 %26, %67, %74 \n \
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v_mac_f32 %27, %67, %75 \n \
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v_mac_f32 %28, %67, %76 \n \
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v_mac_f32 %29, %67, %77 \n \
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v_mac_f32 %30, %67, %78 \n \
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v_mac_f32 %31, %67, %79 \n \
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v_mac_f32 %32, %68, %72 \n \
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v_mac_f32 %33, %68, %73 \n \
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v_mac_f32 %34, %68, %74 \n \
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v_mac_f32 %35, %68, %75 \n \
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v_mac_f32 %36, %68, %76 \n \
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v_mac_f32 %37, %68, %77 \n \
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v_mac_f32 %38, %68, %78 \n \
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v_mac_f32 %39, %68, %79 \n \
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v_mac_f32 %40, %69, %72 \n \
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v_mac_f32 %41, %69, %73 \n \
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v_mac_f32 %42, %69, %74 \n \
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v_mac_f32 %43, %69, %75 \n \
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v_mac_f32 %44, %69, %76 \n \
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v_mac_f32 %45, %69, %77 \n \
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v_mac_f32 %46, %69, %78 \n \
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v_mac_f32 %47, %69, %79 \n \
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v_mac_f32 %48, %70, %72 \n \
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v_mac_f32 %49, %70, %73 \n \
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v_mac_f32 %50, %70, %74 \n \
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v_mac_f32 %51, %70, %75 \n \
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v_mac_f32 %52, %70, %76 \n \
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v_mac_f32 %53, %70, %77 \n \
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v_mac_f32 %54, %70, %78 \n \
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v_mac_f32 %55, %70, %79 \n \
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v_mac_f32 %56, %71, %72 \n \
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v_mac_f32 %57, %71, %73 \n \
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v_mac_f32 %58, %71, %74 \n \
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v_mac_f32 %59, %71, %75 \n \
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v_mac_f32 %60, %71, %76 \n \
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v_mac_f32 %61, %71, %77 \n \
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v_mac_f32 %62, %71, %78 \n \
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v_mac_f32 %63, %71, %79 \n \
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"
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: "=v"(p_c_thread[cindex + 0]),
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"=v"(p_c_thread[cindex + 1]),
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"=v"(p_c_thread[cindex + 2]),
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"=v"(p_c_thread[cindex + 3]),
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"=v"(p_c_thread[cindex + 4]),
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"=v"(p_c_thread[cindex + 5]),
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"=v"(p_c_thread[cindex + 6]),
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"=v"(p_c_thread[cindex + 7])
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: "v"(p_a_thread[aindex]),
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"v"(p_b_thread[bindex + 0]),
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"v"(p_b_thread[bindex + 1]),
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"v"(p_b_thread[bindex + 2]),
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"v"(p_b_thread[bindex + 3]),
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"v"(p_b_thread[bindex + 4]),
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"v"(p_b_thread[bindex + 5]),
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"v"(p_b_thread[bindex + 6]),
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"v"(p_b_thread[bindex + 7]),
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"0"(p_c_thread[cindex + 0]),
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"1"(p_c_thread[cindex + 1]),
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"2"(p_c_thread[cindex + 2]),
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"3"(p_c_thread[cindex + 3]),
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"4"(p_c_thread[cindex + 4]),
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"5"(p_c_thread[cindex + 5]),
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"6"(p_c_thread[cindex + 6]),
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"7"(p_c_thread[cindex + 7])
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:
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"=v"(p_c_thread[0]),
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"=v"(p_c_thread[1]),
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"=v"(p_c_thread[2]),
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"=v"(p_c_thread[3]),
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"=v"(p_c_thread[4]),
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"=v"(p_c_thread[5]),
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"=v"(p_c_thread[6]),
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"=v"(p_c_thread[7]),
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"=v"(p_c_thread[8]),
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"=v"(p_c_thread[9]),
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"=v"(p_c_thread[10]),
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"=v"(p_c_thread[11]),
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"=v"(p_c_thread[12]),
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"=v"(p_c_thread[13]),
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"=v"(p_c_thread[14]),
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"=v"(p_c_thread[15]),
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"=v"(p_c_thread[16]),
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"=v"(p_c_thread[17]),
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"=v"(p_c_thread[18]),
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"=v"(p_c_thread[19]),
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"=v"(p_c_thread[20]),
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"=v"(p_c_thread[21]),
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"=v"(p_c_thread[22]),
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"=v"(p_c_thread[23]),
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"=v"(p_c_thread[24]),
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"=v"(p_c_thread[25]),
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"=v"(p_c_thread[26]),
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"=v"(p_c_thread[27]),
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"=v"(p_c_thread[28]),
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"=v"(p_c_thread[29]),
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"=v"(p_c_thread[30]),
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"=v"(p_c_thread[31]),
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"=v"(p_c_thread[32]),
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"=v"(p_c_thread[33]),
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"=v"(p_c_thread[34]),
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"=v"(p_c_thread[35]),
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"=v"(p_c_thread[36]),
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"=v"(p_c_thread[37]),
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"=v"(p_c_thread[38]),
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"=v"(p_c_thread[39]),
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"=v"(p_c_thread[40]),
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"=v"(p_c_thread[41]),
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"=v"(p_c_thread[42]),
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"=v"(p_c_thread[43]),
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"=v"(p_c_thread[44]),
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"=v"(p_c_thread[45]),
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"=v"(p_c_thread[46]),
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"=v"(p_c_thread[47]),
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"=v"(p_c_thread[48]),
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"=v"(p_c_thread[49]),
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"=v"(p_c_thread[50]),
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"=v"(p_c_thread[51]),
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"=v"(p_c_thread[52]),
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"=v"(p_c_thread[53]),
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"=v"(p_c_thread[54]),
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"=v"(p_c_thread[55]),
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"=v"(p_c_thread[56]),
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"=v"(p_c_thread[57]),
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"=v"(p_c_thread[58]),
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"=v"(p_c_thread[59]),
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"=v"(p_c_thread[60]),
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"=v"(p_c_thread[61]),
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"=v"(p_c_thread[62]),
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"=v"(p_c_thread[63])
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:
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"v"(p_a_thread[0]),
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"v"(p_a_thread[1]),
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"v"(p_a_thread[2]),
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"v"(p_a_thread[3]),
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"v"(p_a_thread[4]),
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"v"(p_a_thread[5]),
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"v"(p_a_thread[6]),
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"v"(p_a_thread[7]),
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"v"(p_b_thread[0]),
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"v"(p_b_thread[1]),
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"v"(p_b_thread[2]),
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"v"(p_b_thread[3]),
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"v"(p_b_thread[4]),
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"v"(p_b_thread[5]),
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"v"(p_b_thread[6]),
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"v"(p_b_thread[7]),
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"0"(p_c_thread[0]),
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"1"(p_c_thread[1]),
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"2"(p_c_thread[2]),
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"3"(p_c_thread[3]),
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"4"(p_c_thread[4]),
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"5"(p_c_thread[5]),
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"6"(p_c_thread[6]),
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"7"(p_c_thread[7]),
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"8"(p_c_thread[8]),
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"9"(p_c_thread[9]),
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"10"(p_c_thread[10]),
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"11"(p_c_thread[11]),
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"12"(p_c_thread[12]),
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"13"(p_c_thread[13]),
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"14"(p_c_thread[14]),
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"15"(p_c_thread[15]),
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"16"(p_c_thread[16]),
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"17"(p_c_thread[17]),
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"18"(p_c_thread[18]),
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"19"(p_c_thread[19]),
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"20"(p_c_thread[20]),
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"21"(p_c_thread[21]),
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"22"(p_c_thread[22]),
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"23"(p_c_thread[23]),
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"24"(p_c_thread[24]),
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"25"(p_c_thread[25]),
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"26"(p_c_thread[26]),
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"27"(p_c_thread[27]),
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"28"(p_c_thread[28]),
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"29"(p_c_thread[29]),
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"30"(p_c_thread[30]),
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"31"(p_c_thread[31]),
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"32"(p_c_thread[32]),
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"33"(p_c_thread[33]),
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"34"(p_c_thread[34]),
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"35"(p_c_thread[35]),
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"36"(p_c_thread[36]),
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"37"(p_c_thread[37]),
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"38"(p_c_thread[38]),
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"39"(p_c_thread[39]),
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"40"(p_c_thread[40]),
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"41"(p_c_thread[41]),
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"42"(p_c_thread[42]),
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"43"(p_c_thread[43]),
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"44"(p_c_thread[44]),
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"45"(p_c_thread[45]),
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"46"(p_c_thread[46]),
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"47"(p_c_thread[47]),
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"48"(p_c_thread[48]),
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"49"(p_c_thread[49]),
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"50"(p_c_thread[50]),
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"51"(p_c_thread[51]),
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"52"(p_c_thread[52]),
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"53"(p_c_thread[53]),
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"54"(p_c_thread[54]),
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"55"(p_c_thread[55]),
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"56"(p_c_thread[56]),
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"57"(p_c_thread[57]),
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"58"(p_c_thread[58]),
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"59"(p_c_thread[59]),
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"60"(p_c_thread[60]),
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"61"(p_c_thread[61]),
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"62"(p_c_thread[62]),
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"63"(p_c_thread[63])
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);
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}
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}
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}
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#endif
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}
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}
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