mirror of
https://github.com/ROCm/composable_kernel.git
synced 2026-07-03 21:58:13 +00:00
Add the vectorized option for packed cast.
This commit is contained in:
@@ -898,7 +898,8 @@ struct GridwiseGemm_xdl_cshuffle_conv_v3
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using ThreadwiseTransfer = std::conditional_t<
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is_gfx650_and_bf16_output(),
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ThreadwiseTensorSliceTransfer_v1r3_pass_through<AccDataType,
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ThreadwiseTensorSliceTransfer_v1r3_packed_cast<
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AccDataType,
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CShuffleDataType,
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decltype(c_thread_desc_m0_n0_m1_n1_m2_m3_m4_n2),
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decltype(c_block_desc_m0_n0_m1_n1_m2_m3_m4_n2),
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@@ -935,8 +936,7 @@ struct GridwiseGemm_xdl_cshuffle_conv_v3
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1,
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InMemoryDataOperationEnum::Set,
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1,
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true>
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>;
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true>>;
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// shuffle: threadwise copy C from VGPR to LDS
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auto c_thread_copy_vgpr_to_lds = ThreadwiseTransfer{
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@@ -1007,20 +1007,20 @@ struct GridwiseGemm_xdl_cshuffle_conv_v3
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// make sure it's safe to write to LDS
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block_sync_lds();
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if constexpr (is_gfx650_and_bf16_output())
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{
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auto c_thread_packed_cast = PackedCastV2<
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M2,
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M4,
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CShuffleMXdlPerWavePerShuffle,
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CShuffleNXdlPerWavePerShuffle
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>{};
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c_thread_packed_cast.Run(
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c_thread_desc_m0_n0_m1_n1_m2_m3_m4_n2, // source desc (TensorDescriptor struct)
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sfc_c_vgpr.GetIndexTupleOfNumber(access_id), // source slice origin
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c_thread_buf // source buffer
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);
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}
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// if constexpr (is_gfx650_and_bf16_output())
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// {
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// auto c_thread_packed_cast = PackedCastV2<
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// M2,
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// M4,
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// CShuffleMXdlPerWavePerShuffle,
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// CShuffleNXdlPerWavePerShuffle
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// >{};
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// c_thread_packed_cast.Run(
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// c_thread_desc_m0_n0_m1_n1_m2_m3_m4_n2, // source desc (TensorDescriptor struct)
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// sfc_c_vgpr.GetIndexTupleOfNumber(access_id), // source slice origin
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// c_thread_buf // source buffer
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// );
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// }
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// each thread write its data from VGPR to LDS
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c_thread_copy_vgpr_to_lds.Run(c_thread_desc_m0_n0_m1_n1_m2_m3_m4_n2,
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@@ -1308,7 +1308,8 @@ struct GridwiseGemm_xdl_cshuffle_conv_v3
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using ThreadwiseTransfer = std::conditional_t<
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is_gfx650_and_bf16_output(),
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ThreadwiseTensorSliceTransfer_v1r3_pass_through<AccDataType,
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ThreadwiseTensorSliceTransfer_v1r3_packed_cast<
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AccDataType,
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CShuffleDataType,
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decltype(c_thread_desc_m0_n0_m1_n1_m2_m3_m4_n2),
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decltype(c_block_desc_m0_n0_m1_n1_m2_m3_m4_n2),
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@@ -1345,8 +1346,7 @@ struct GridwiseGemm_xdl_cshuffle_conv_v3
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1,
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InMemoryDataOperationEnum::Set,
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1,
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true>
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>;
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true>>;
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// shuffle: threadwise copy C from VGPR to LDS
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auto c_thread_copy_vgpr_to_lds = ThreadwiseTransfer{
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@@ -1417,20 +1417,20 @@ struct GridwiseGemm_xdl_cshuffle_conv_v3
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// make sure it's safe to write to LDS
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block_sync_lds();
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if constexpr (is_gfx650_and_bf16_output())
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{
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auto c_thread_packed_cast = PackedCastV2<
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M2,
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M4,
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CShuffleMXdlPerWavePerShuffle,
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CShuffleNXdlPerWavePerShuffle
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>{};
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c_thread_packed_cast.Run(
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c_thread_desc_m0_n0_m1_n1_m2_m3_m4_n2, // source desc
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sfc_c_vgpr.GetIndexTupleOfNumber(access_id), // source slice origin
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c_thread_buf // source buffer
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);
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}
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// if constexpr (is_gfx650_and_bf16_output())
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// {
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// auto c_thread_packed_cast = PackedCastV2<
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// M2,
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// M4,
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// CShuffleMXdlPerWavePerShuffle,
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// CShuffleNXdlPerWavePerShuffle
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// >{};
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// c_thread_packed_cast.Run(
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// c_thread_desc_m0_n0_m1_n1_m2_m3_m4_n2, // source desc
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// sfc_c_vgpr.GetIndexTupleOfNumber(access_id), // source slice origin
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// c_thread_buf // source buffer
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// );
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// }
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// each thread write its data from VGPR to LDS
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c_thread_copy_vgpr_to_lds.Run(c_thread_desc_m0_n0_m1_n1_m2_m3_m4_n2,
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@@ -1646,7 +1646,7 @@ struct GridwiseGemm_xdl_cshuffle_v3
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using ThreadwiseTransfer = std::conditional_t<
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is_gfx650_and_bf16_output(),
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ThreadwiseTensorSliceTransfer_v1r3_packed_cast<
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ThreadwiseTensorSliceTransfer_v1r3_vectorized<
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AccDataType,
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CShuffleDataType,
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decltype(c_thread_desc_m0_n0_m1_n1_m2_m3_m4_n2),
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@@ -2093,7 +2093,7 @@ struct GridwiseGemm_xdl_cshuffle_v3
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using ThreadwiseTransfer = std::conditional_t<
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is_gfx650_and_bf16_output(),
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ThreadwiseTensorSliceTransfer_v1r3_packed_cast<
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ThreadwiseTensorSliceTransfer_v1r3_vectorized<
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AccDataType,
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CShuffleDataType,
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decltype(c_thread_desc_m0_n0_m1_n1_m2_m3_m4_n2),
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@@ -897,7 +897,7 @@ struct GridwiseGemm_bk0mk1_bk0nk1_mn_xdlops_bwd_weight
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using ThreadwiseTransfer = std::conditional_t<
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is_gfx650_and_bf16_output(),
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ThreadwiseTensorSliceTransfer_v1r3_pass_through<
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ThreadwiseTensorSliceTransfer_v1r3_packed_cast<
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FloatAcc,
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FloatC,
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decltype(c_m0_n0_m1_n1_m2_m3_m4_n2_thread_desc),
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@@ -1002,20 +1002,20 @@ struct GridwiseGemm_bk0mk1_bk0nk1_mn_xdlops_bwd_weight
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// make sure it's safe to do ds_write
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block_sync_lds();
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if constexpr (is_gfx650_and_bf16_output())
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{
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auto c_thread_packed_cast = PackedCastV2<
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M2,
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M4,
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CShuffleMRepeatPerShuffle,
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CShuffleNRepeatPerShuffle
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>{};
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c_thread_packed_cast.Run(
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c_m0_n0_m1_n1_m2_m3_m4_n2_thread_desc, // source desc (TensorDescriptor struct)
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make_tuple(mxdlperwave, nxdlperwave, I0, I0, I0, I0, I0, I0), // source slice origin
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c_thread_buf // source buffer
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);
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}
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// if constexpr (is_gfx650_and_bf16_output())
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// {
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// auto c_thread_packed_cast = PackedCastV2<
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// M2,
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// M4,
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// CShuffleMRepeatPerShuffle,
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// CShuffleNRepeatPerShuffle
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// >{};
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// c_thread_packed_cast.Run(
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// c_m0_n0_m1_n1_m2_m3_m4_n2_thread_desc, // source desc (TensorDescriptor struct)
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// make_tuple(mxdlperwave, nxdlperwave, I0, I0, I0, I0, I0, I0), // source slice origin
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// c_thread_buf // source buffer
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// );
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// }
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// VGPR to LDS
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c_thread_copy_vgpr_to_lds.Run(
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@@ -438,6 +438,185 @@ private:
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true> thread_scratch_;
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};
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// Assume:
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// 1. src:
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// 1. SrcDesc is known at compile-time
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// 2. SrcBuffer is StaticBuffer
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// 3. SrcSliceOrginIdx is known at compile-time
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// 2. dst:
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// 1. DstDesc is not known at compile-time
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// 2. DstBuffer is DynamicBuffer
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// 3. DstSliceOrginIdx is not known at compile time
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template <typename SrcData,
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typename DstData,
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typename SrcDesc,
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typename DstDesc,
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typename ElementwiseOperation,
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typename SliceLengths,
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typename DimAccessOrder,
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index_t DstVectorDim,
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index_t DstScalarPerVector,
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InMemoryDataOperationEnum DstInMemOp,
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index_t DstScalarStrideInVector,
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bool DstResetCoordinateAfterRun,
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typename enable_if<SrcDesc::IsKnownAtCompileTime(), bool>::type = false>
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struct ThreadwiseTensorSliceTransfer_v1r3_vectorized
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{
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static constexpr auto I0 = Number<0>{};
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static constexpr auto I1 = Number<1>{};
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static constexpr auto I2 = Number<2>{};
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static constexpr bool SnakedAccess = false;
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static constexpr index_t nDim = SliceLengths::Size();
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using Index = MultiIndex<nDim>;
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using DstCoord = decltype(make_tensor_coordinate(DstDesc{}, Index{}));
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using DstCoordStep = decltype(make_tensor_coordinate_step(DstDesc{}, Index{}));
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__device__ constexpr ThreadwiseTensorSliceTransfer_v1r3_vectorized(const DstDesc& dst_desc,
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const Index& dst_slice_origin_idx,
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const ElementwiseOperation&)
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: dst_coord_(make_tensor_coordinate(dst_desc, dst_slice_origin_idx))
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{
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static_assert(SrcDesc::IsKnownAtCompileTime(),
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"wrong! SrcDesc need to known at compile-time");
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static_assert(SliceLengths::At(Number<DstVectorDim>{}) % DstScalarPerVector == 0,
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"wrong! Not divisible");
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// Assert that elementwise op is pass through.
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static_assert(
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std::is_same_v<remove_cvref_t<ElementwiseOperation>, ck::tensor_operation::element_wise::PassThrough>,
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"wrong! ElementwiseOperation must be PassThrough");
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// For now, SrcData must be float and DstData must be ck::bhalf_t
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static_assert(std::is_same_v<SrcData, float>,
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"wrong! SrcData must be float");
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static_assert(std::is_same_v<DstData, ck::bhalf_t>,
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"wrong! DstData must be bhalf_t");
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}
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__device__ void SetDstSliceOrigin(const DstDesc& dst_desc, const Index& dst_slice_origin_idx)
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{
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dst_coord_ = make_tensor_coordinate(dst_desc, dst_slice_origin_idx);
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}
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template <typename SrcSliceOriginIdx, typename SrcBuffer, typename DstBuffer>
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__device__ void Run(const SrcDesc&,
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const SrcSliceOriginIdx&,
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const SrcBuffer& src_buf,
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const DstDesc& dst_desc,
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DstBuffer& dst_buf)
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{
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static_assert(SrcDesc::IsKnownAtCompileTime(),
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"wrong! SrcDesc need to known at compile-time");
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static_assert(is_known_at_compile_time<remove_cvref_t<SrcSliceOriginIdx>>::value,
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"wrong! SrcSliceOrigin need to known at compile-time");
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static_assert(SrcBuffer::IsStaticBuffer(), "wrong! SrcBuffer need to be StaticBuffer");
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// SrcDesc and src_slice_origin_idx are known at compile-time
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constexpr auto src_desc = remove_cvref_t<SrcDesc>{};
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constexpr auto src_slice_origin_idx = to_multi_index(SrcSliceOriginIdx{});
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constexpr auto dst_scalar_per_access = generate_sequence(
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detail::lambda_scalar_per_access<DstVectorDim, DstScalarPerVector>{}, Number<nDim>{});
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constexpr auto src_scalar_step_in_vector =
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generate_sequence(detail::lambda_scalar_step_in_vector<DstVectorDim>{}, Number<nDim>{});
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using SpaceFillingCurve = SpaceFillingCurve<SliceLengths,
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DimAccessOrder,
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remove_cv_t<decltype(dst_scalar_per_access)>,
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SnakedAccess>;
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static_assert(2 == SpaceFillingCurve::ScalarPerVector, "wrong!2 != SpaceFillingCurve::ScalarPerVector");
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ck::bhalf2_t dst_vector;
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using dst_vector_t = ck::bhalf2_t;
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constexpr index_t num_access = SpaceFillingCurve::GetNumOfAccess();
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static_for<0, num_access, 1>{}([&](auto idx_1d)
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{
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constexpr auto idx_md = SpaceFillingCurve::GetIndex(idx_1d);
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constexpr auto idx_src_0 = src_desc.CalculateOffset(src_slice_origin_idx + idx_md);
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constexpr auto idx_src_1 = src_desc.CalculateOffset(src_slice_origin_idx + idx_md + src_scalar_step_in_vector);
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const float val_0 = src_buf[Number<idx_src_0>{}];
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const float val_1 = src_buf[Number<idx_src_1>{}];
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dst_vector = bf16x2_convert_rne<ck::bhalf2_t, float>(val_0, val_1);
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const bool is_dst_valid =
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coordinate_has_valid_offset_assuming_visible_index_is_valid(dst_desc, dst_coord_);
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// copy data from dst_vector into dst_buf
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dst_buf.template Update<DstInMemOp, dst_vector_t>(
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dst_coord_.GetOffset(),
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is_dst_valid,
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dst_vector);
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if constexpr(idx_1d.value != num_access - 1)
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{
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constexpr auto forward_step = SpaceFillingCurve::GetForwardStep(idx_1d);
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move_tensor_coordinate(
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dst_desc, dst_coord_, make_tensor_coordinate_step(dst_desc, forward_step));
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}
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});
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// move dst coordinate back to slice origin (or not)
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if constexpr(DstResetCoordinateAfterRun)
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{
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const auto dst_reset_step =
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make_tensor_coordinate_step(dst_desc, GetDstCoordinateResetStep());
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move_tensor_coordinate(dst_desc, dst_coord_, dst_reset_step);
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}
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}
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__device__ static constexpr auto GetDstCoordinateResetStep()
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{
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constexpr auto dst_scalar_per_access = generate_sequence(
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detail::lambda_scalar_per_access<DstVectorDim, DstScalarPerVector>{}, Number<nDim>{});
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using SpaceFillingCurve = SpaceFillingCurve<SliceLengths,
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DimAccessOrder,
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remove_cv_t<decltype(dst_scalar_per_access)>,
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SnakedAccess>;
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constexpr auto num_access = SpaceFillingCurve::GetNumOfAccess();
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if constexpr(num_access == 0)
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{
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return typename SpaceFillingCurve::Index{};
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}
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else
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{
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constexpr auto reset_step =
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SpaceFillingCurve::GetStepBetween(Number<num_access - 1>{}, Number<0>{});
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return reset_step;
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}
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}
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// dst_slice_origin_step_idx need to be known at compile-time, for performance reason
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__device__ void MoveDstSliceWindow(const DstDesc& dst_desc,
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const Index& dst_slice_origin_step_idx)
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{
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// if dst coord was not reset by Run(), then need to adjust the step here
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const auto adjusted_step_idx =
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DstResetCoordinateAfterRun ? dst_slice_origin_step_idx
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: dst_slice_origin_step_idx + GetDstCoordinateResetStep();
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// is it OK to construct a new step every time?
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const auto adjusted_step = make_tensor_coordinate_step(dst_desc, adjusted_step_idx);
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move_tensor_coordinate(dst_desc, dst_coord_, adjusted_step);
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}
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private:
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DstCoord dst_coord_;
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};
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// Assume:
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// 1. src:
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// 1. SrcDesc is known at compile-time
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@@ -106,10 +106,10 @@ inline __host__ __device__ void static_cast_float_to_bhalf_packed_v2(float& x, f
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bhalf2_t bf16x2;
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} converter;
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// typedef __attribute__((__vector_size__(4))) __bf16 llvm_bf16x2_t;
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// typedef __attribute__((__vector_size__(8))) float llvm_fp32x2_t;
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// converter.bf16x2 = __builtin_convertvector(llvm_fp32x2_t{x, y}, llvm_bf16x2_t);
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converter.bf16x2 = {bf16_convert_rtn<bhalf_t>(x), bf16_convert_rtn<bhalf_t>(y)};
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typedef __attribute__((__vector_size__(4))) __bf16 llvm_bf16x2_t;
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typedef __attribute__((__vector_size__(8))) float llvm_fp32x2_t;
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converter.bf16x2 = __builtin_convertvector(llvm_fp32x2_t{x, y}, llvm_bf16x2_t);
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//converter.bf16x2 = {bf16_convert_rtn<bhalf_t>(x), bf16_convert_rtn<bhalf_t>(y)};
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x = converter.fp32;
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}
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