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This reverts commit f3aafb9555.
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@@ -315,7 +315,7 @@ class FmhaFwdApiTrait:
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assert False
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def seqtune(self, max_bm0: int) -> str:
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if self.bm0 == max_bm0 or self.bm0 == 64:
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if self.bm0 == max_bm0:
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return "true/*fall back to largest tile*/"
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else:
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return f"a.seqlen_q <= {self.bm0}"
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@@ -847,11 +847,6 @@ class CompatibilityRuleFactoryGfx9(CompatibilityRuleFactory):
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(problem_ctx.hdim, problem_ctx.hdim_v) != (128, 128)
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and kernel_ctx.tile.F_bm0 != 128
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)
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or (
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(problem_ctx.hdim, problem_ctx.hdim_v) == (128, 128)
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and kernel_ctx.pipeline.tag != "qr_async"
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and kernel_ctx.tile.F_bk0 == 64
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)
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):
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# non qr_async_trload only support km0=128 tile size when hdim is not 128
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# non qr_async only support kn0=128 tile size when hdim is 128
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@@ -947,7 +942,6 @@ class KernelComponentFactoryGfx9(CompatibilityRuleFactoryGfx9):
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( 96, 128) : [FmhaFwdTileSize(128, 128, 32, 128, 32, 96, 4, 1, 1, 4, 1, 1, 32, 32, 16, 32, 32, 16, -1)],
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(128, 128) : [FmhaFwdTileSize( 16, 32, 64, 128, 32, 128, 1, 1, 1, 1, 1, 1, 16, 16, 32, 16, 16, 32, -1),
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FmhaFwdTileSize( 32, 32, 128, 128, 32, 128, 1, 1, 1, 1, 1, 1, 32, 32, 16, 32, 32, 16, -1),
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FmhaFwdTileSize( 64, 128, 32, 128, 32, 128, 4, 1, 1, 4, 1, 1, 16, 16, 32, 16, 16, 16, -1, CppConstraint('get_num_blocks(64) <= num_cus')),
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FmhaFwdTileSize(128, 64, 32, 128, 16, 128, 4, 1, 1, 4, 1, 1, 32, 32, 16, 32, 32, 16, -1),
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FmhaFwdTileSize(128, 128, 32, 128, 32, 128, 4, 1, 1, 4, 1, 1, 32, 32, 16, 32, 32, 16, -1)],
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# (160, 160) : [FmhaFwdTileSize(128, 128 , 32, 160, 32, 160, 4, 1, 1, 4, 1, 1, 32, 32, 16, 32, 32, 16, 1)],
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@@ -321,8 +321,6 @@ struct BlockFmhaPipelineQRKSVSAsync
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{
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if(num_total_loop <= 0)
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{
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buffer_load_fence(0); // rocm-7.1.1, if whole tile is masked out, need to fence(0)
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// otherwise will have compute error(maybe compiler bug?)
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if constexpr(kStoreLSE)
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{
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auto lse =
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