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[FMHA FWD] gfx950 Accuracy enhancement & bug fix (#2900)
* disable cast_tile_pk_fp16_fp32 on gfx950
* fix wrong encoding when hdim is not exponentiation of 2
---------
Co-authored-by: asleepzzz <hanwen.chang@amd.com>
[ROCm/composable_kernel commit: 959df2a155]
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@@ -231,7 +231,7 @@ CK_TILE_DEVICE auto cast_tile_pk_fp8_fp32(const InTensor& in_dstr_tensors)
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template <typename OutDataType, typename InTensor>
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CK_TILE_DEVICE auto cast_tile_pk_fp16_fp32(const InTensor& in_dstr_tensors)
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{
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#if defined(__gfx908__) || defined(__gfx90a__) || defined(__gfx94__)
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#if defined(__gfx908__) || defined(__gfx90a__) || defined(__gfx942__)
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// This API is designed to use the _pk_ serious of function
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constexpr auto in_tile_dstr = InTensor::get_tile_distribution();
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@@ -813,7 +813,8 @@ struct BlockFmhaPipelineQXKSVSCustomPolicy : BlockFmhaPipelineQXCustomPolicy<QLo
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constexpr index_t N1_m = kNPack / N2;
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constexpr index_t N0_m = kNPerBlock / kNPack;
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constexpr index_t K1 = get_warp_size() / N1_m;
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constexpr index_t K2_m = kKPerBlock / K1;
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constexpr index_t K2_m = kKPerBlock / K1 / K0;
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return make_static_tile_distribution(
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tile_distribution_encoding<
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sequence<1>,
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@@ -903,7 +904,7 @@ struct BlockFmhaPipelineQXKSVSCustomPolicy : BlockFmhaPipelineQXCustomPolicy<QLo
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constexpr index_t N1_m = kNPack / N2;
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constexpr index_t N0_m = kNPerBlock / kNPack;
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constexpr index_t K1 = get_warp_size() / N1_m;
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constexpr index_t K2_m = kKPerBlock / K1;
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constexpr index_t K2_m = kKPerBlock / K1 / K0;
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return make_static_tile_distribution(
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tile_distribution_encoding<sequence<1>,
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tuple<sequence<N0_m, N1_m, N2>, sequence<K0, K1, K2_m>>,
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