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https://github.com/ROCm/composable_kernel.git
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moe gemm2 bpreshuffle function passed
This commit is contained in:
mtgu0705
@@ -175,7 +175,7 @@ constexpr ck::index_t DataPackedSize = 2; // Packed represent
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constexpr ck::index_t ScaleBlockSize = 32; // scaling block size
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constexpr ck::index_t KPerBlock = 256 / DataPackedSize; // 256 f4 = 128 fp4x2
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static constexpr ck::index_t MPerBlock = 32;
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static constexpr ck::index_t MPerBlock = 128;
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static constexpr bool MulRoutedWeight = true;
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// clang-format off
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@@ -183,14 +183,14 @@ using DeviceOpInstance = ck::tensor_operation::device::Devic
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A0Layout, B0Layout, DsLayout, ELayout,
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A0DataType, A1DataType, B0DataType, B1DataType, DsDataType, EDataType, AccDataType, CShuffleDataType,
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AElementOp, BElementOp, CDEElementOp, GemmSpec,
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ScaleBlockSize, 64,
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MPerBlock, 32, KPerBlock,
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ScaleBlockSize, 256,
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MPerBlock, 128, KPerBlock,
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16, 16,
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16, 16,
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2, 2,
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S<8, 8, 1>, S<1, 0, 2>, S<1, 0, 2>, 2, 16, 16, 1,
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S<8, 8, 1>, S<1, 0, 2>, S<1, 0, 2>, 2, 16, 16, 1,
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2, 2, S<1, 8, 1, 8>, S<2, 1, 1, 1>,
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4, 4,
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S<8, 32, 1>, S<1, 0, 2>, S<1, 0, 2>, 2, 16, 16, 1,
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S<8, 32, 1>, S<1, 0, 2>, S<1, 0, 2>, 2, 16, 16, 1,
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2, 4, S<1, 4, 1, 64>, S<2, 1, 1, 1>,
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ck::BlockGemmPipelineScheduler::Intrawave, ck::BlockGemmPipelineVersion::v3, 0, false, false, MulRoutedWeight, ck::index_t, A0DataType>;
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// clang-format on
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@@ -202,14 +202,14 @@ int main(int argc, char* argv[])
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// per expert:
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// GEMM shape
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constexpr ck::index_t sorted_tile_num = 2;
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constexpr ck::index_t valid_tile_num = 2;
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constexpr ck::index_t sorted_tile_num = 13;
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constexpr ck::index_t valid_tile_num = 13;
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ck::index_t sorted_size = sorted_tile_num * MPerBlock;
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ck::index_t valid_size = valid_tile_num * MPerBlock;
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ck::index_t N = 6144;
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ck::index_t K = 4096;
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ck::index_t experts = 2;
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ck::index_t experts = 8;
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ck::index_t tokens = 832;
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ck::index_t topk = 2;
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@@ -351,30 +351,44 @@ int main(int argc, char* argv[])
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d2_e_n.GenerateTensorValue(GeneratorTensor_1<D2DataType>{});
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break;
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case 3:
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a0_t_k_k.GenerateTensorValue(GeneratorTensor_2<A0DataType>{-2, 2});
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b0_e_n_k.GenerateTensorValue(GeneratorTensor_2<B0DataType>{-2, 2});
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a1_t_k_k.GenerateTensorValue(GeneratorTensor_1<XDataType>{});
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a0_t_k_k.GenerateTensorValue(GeneratorTensor_1<A0DataType>{});
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b0_e_n_k.GenerateTensorValue(GeneratorTensor_1<B0DataType>{});
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a1_t_k_k.GenerateTensorValue(GeneratorTensor_3<XDataType>{0, 1.0});
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b1_e_n_k.GenerateTensorValue(GeneratorTensor_3<XDataType>{0, 1.0});
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d2_e_n.GenerateTensorValue(GeneratorTensor_2<D2DataType>{-2, 2});
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d2_e_n.GenerateTensorValue(GeneratorTensor_1<D2DataType>{});
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break;
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case 4:
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a0_t_k_k.GenerateTensorValue(GeneratorTensor_2<A0DataType>{-2, 2});
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b0_e_n_k.GenerateTensorValue(GeneratorTensor_2<B0DataType>{-2, 2});
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a1_t_k_k.GenerateTensorValue(GeneratorTensor_3<XDataType>{0, 1.0});
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b1_e_n_k.GenerateTensorValue(GeneratorTensor_1<XDataType>{});
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d2_e_n.GenerateTensorValue(GeneratorTensor_2<D2DataType>{-2, 2});
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a1_t_k_k.GenerateTensorValue(GeneratorTensor_1<XDataType>{});
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b1_e_n_k.GenerateTensorValue(GeneratorTensor_3<XDataType>{0, 5.0});
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d2_e_n.GenerateTensorValue(GeneratorTensor_1<D2DataType>{});
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break;
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case 5:
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a0_t_k_k.GenerateTensorValue(GeneratorTensor_1<A0DataType>{});
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b0_e_n_k.GenerateTensorValue(GeneratorTensor_1<B0DataType>{});
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a1_t_k_k.GenerateTensorValue(GeneratorTensor_1<XDataType>{});
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b1_e_n_k.GenerateTensorValue(GeneratorTensor_3<XDataType>{0, 1.0});
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a0_t_k_k.GenerateTensorValue(GeneratorTensor_2<A0DataType>{-2, 2});
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b0_e_n_k.GenerateTensorValue(GeneratorTensor_2<B0DataType>{-2, 2});
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a1_t_k_k.GenerateTensorValue(GeneratorTensor_3<XDataType>{0, 1.0});
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b1_e_n_k.GenerateTensorValue(GeneratorTensor_1<XDataType>{});
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d2_e_n.GenerateTensorValue(GeneratorTensor_1<D2DataType>{});
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break;
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case 6:
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a0_t_k_k.GenerateTensorValue(GeneratorTensor_1<A0DataType>{});
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a0_t_k_k.GenerateTensorValue(GeneratorTensor_2<A0DataType>{-2, 2});
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b0_e_n_k.GenerateTensorValue(GeneratorTensor_1<B0DataType>{});
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a1_t_k_k.GenerateTensorValue(GeneratorTensor_3<XDataType>{0, 1.0});
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a1_t_k_k.GenerateTensorValue(GeneratorTensor_1<XDataType>{});
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b1_e_n_k.GenerateTensorValue(GeneratorTensor_1<XDataType>{});
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d2_e_n.GenerateTensorValue(GeneratorTensor_1<D2DataType>{});
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break;
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case 7:
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a0_t_k_k.GenerateTensorValue(GeneratorTensor_1<A0DataType>{});
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b0_e_n_k.GenerateTensorValue(GeneratorTensor_2<B0DataType>{-2, 2});
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a1_t_k_k.GenerateTensorValue(GeneratorTensor_1<XDataType>{});
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b1_e_n_k.GenerateTensorValue(GeneratorTensor_1<XDataType>{});
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d2_e_n.GenerateTensorValue(GeneratorTensor_1<D2DataType>{});
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break;
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case 8:
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a0_t_k_k.GenerateTensorValue(GeneratorTensor_2<A0DataType>{-2, 2});
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b0_e_n_k.GenerateTensorValue(GeneratorTensor_2<B0DataType>{-2, 2});
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a1_t_k_k.GenerateTensorValue(GeneratorTensor_1<XDataType>{});
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b1_e_n_k.GenerateTensorValue(GeneratorTensor_1<XDataType>{});
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d2_e_n.GenerateTensorValue(GeneratorTensor_1<D2DataType>{});
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break;
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@@ -965,6 +965,54 @@ struct BlockwiseGemmXdlops_pipeline_bpreshuffle_mx_moe_v3<BlockGemmPipelineSched
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b_thread_vec.template AsType<mfma_input_type_b>(),
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b_scale_thread_vec.template AsType<mfma_scale_input_type_b>(),
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c_thread_buf.GetVectorTypeReference(Number<c_offset>{}));
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#if 0
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printf("blkIdx: %u, blkIdy: %u, tidx: %u, imxdl: %d, inxdl: "
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"%d, ikxdl: %d, a_thread_vec=<0x%08x, 0x%08x, 0x%08x, "
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"0x%08x>, "
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"b_thread_vec=<0x%08x, 0x%08x, 0x%08x, 0x%08x>, "
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"a_scale=0x%08x, "
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"b_scale=0x%08x, c_thread_buf=<%.2f, %.2f, %.2f, %.2f>\n",
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blockIdx.x,
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blockIdx.y,
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threadIdx.x,
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im_minor,
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in_minor,
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ik_minor,
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*(reinterpret_cast<const uint32_t*>(
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&(a_thread_vec.template AsType<f4x8_t>()[Number<0>{}]))),
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*(reinterpret_cast<const uint32_t*>(
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&(a_thread_vec.template AsType<f4x8_t>()[Number<1>{}]))),
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*(reinterpret_cast<const uint32_t*>(
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&(a_thread_vec.template AsType<f4x8_t>()[Number<2>{}]))),
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*(reinterpret_cast<const uint32_t*>(
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&(a_thread_vec.template AsType<f4x8_t>()[Number<3>{}]))),
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*(reinterpret_cast<const uint32_t*>(
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&(b_thread_vec.template AsType<f4x8_t>()[Number<0>{}]))),
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*(reinterpret_cast<const uint32_t*>(
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&(b_thread_vec.template AsType<f4x8_t>()[Number<1>{}]))),
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*(reinterpret_cast<const uint32_t*>(
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&(b_thread_vec.template AsType<f4x8_t>()[Number<2>{}]))),
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*(reinterpret_cast<const uint32_t*>(
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&(b_thread_vec.template AsType<f4x8_t>()[Number<3>{}]))),
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*(reinterpret_cast<const uint32_t*>(
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&(a_scale_thread_vec
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.template AsType<AScaleDataType>()[Number<0>{}]))),
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*(reinterpret_cast<const uint32_t*>(
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&(b_scale_thread_vec
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.template AsType<BScaleDataType>()[Number<0>{}]))),
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type_convert<float>(
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c_thread_buf.GetVectorTypeReference(Number<c_offset>{})
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.template AsType<float>()[Number<0>{}]),
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type_convert<float>(
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c_thread_buf.GetVectorTypeReference(Number<c_offset>{})
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.template AsType<float>()[Number<1>{}]),
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type_convert<float>(
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c_thread_buf.GetVectorTypeReference(Number<c_offset>{})
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.template AsType<float>()[Number<2>{}]),
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type_convert<float>(
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c_thread_buf.GetVectorTypeReference(Number<c_offset>{})
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.template AsType<float>()[Number<3>{}]));
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#endif
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});
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});
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if constexpr(m0.value < (MRepeat - LocalPrefetchStages))
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@@ -42,12 +42,12 @@ template <typename GridwiseGemm,
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TailNumber TailNum = TailNumber::Even>
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__global__ void
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#if CK_USE_LAUNCH_BOUNDS
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__launch_bounds__(CK_MAX_THREAD_PER_BLOCK, MinimumOccupancy)
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__launch_bounds__(CK_MAX_THREAD_PER_BLOCK, MinimumOccupancy)
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#endif
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// __attribute__((amdgpu_waves_per_eu(1, 1)))
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kernel_moe_mxgemm(typename GridwiseGemm::Argument karg)
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{
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#if (!defined(__HIP_DEVICE_COMPILE__) || defined(__gfx9__))
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#if(!defined(__HIP_DEVICE_COMPILE__) || defined(__gfx9__))
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__shared__ char p_shared[GridwiseGemm::GetSharedMemoryNumberOfByte()];
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auto splitk_batch_offset = typename GridwiseGemm::SplitKBatchOffset(karg, blockIdx.z);
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@@ -79,12 +79,12 @@ template <typename GridwiseGemm,
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TailNumber TailNum = TailNumber::Even>
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__global__ void
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#if CK_USE_LAUNCH_BOUNDS
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__launch_bounds__(CK_MAX_THREAD_PER_BLOCK, MinimumOccupancy)
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__launch_bounds__(CK_MAX_THREAD_PER_BLOCK, MinimumOccupancy)
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#endif
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// __attribute__((amdgpu_waves_per_eu(1, 1)))
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kernel_moe_mxgemm_2lds(typename GridwiseGemm::Argument karg)
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{
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#if (!defined(__HIP_DEVICE_COMPILE__) || defined(__gfx9__))
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#if(!defined(__HIP_DEVICE_COMPILE__) || defined(__gfx9__))
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__shared__ char p_shared_0[GridwiseGemm::GetSharedMemoryNumberOfByte()];
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__shared__ char p_shared_1[GridwiseGemm::GetSharedMemoryNumberOfByte()];
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@@ -885,7 +885,7 @@ struct GridwiseMoeGemmMX_BPreshuffle
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{
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// contiguous in LDS
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return make_naive_tensor_descriptor(
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make_tuple(Number<AK0Number>{}, Number<MPerBlock>{}, AK1Number),
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make_tuple(AK0Number, Number<MPerBlock>{}, AK1Number),
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make_tuple(AK1Number, Number<KPerBlock>{}, I1));
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}
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// xor tensor transformation request more unnecessary vgpr usage, would cause register spill
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@@ -2025,17 +2025,30 @@ struct GridwiseMoeGemmMX_BPreshuffle
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problem.NPadded,
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problem.StrideC);
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const auto a_scale_grid_desc_am_ak = make_naive_tensor_descriptor_packed(
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make_tuple(problem.M / (MXdlPack * MPerXdl),
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// We pad the M unconditionaly for Scale
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const auto Padded_Scale_M =
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math::integer_divide_ceil(problem.M, ScaleBlockSize) * ScaleBlockSize;
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const auto a_scale_grid_desc_am_ak = make_naive_tensor_descriptor(
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make_tuple(Padded_Scale_M / (MXdlPack * MPerXdl),
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math::integer_divide_ceil(problem.K, (ScaleBlockSize / APackedSize)) /
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(KXdlPack * 64 / MPerXdl),
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64 * KXdlPack * MXdlPack / scale_pack_size_a));
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64 * KXdlPack * MXdlPack / scale_pack_size_a),
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make_tuple(math::integer_divide_ceil(problem.K * problem.KBatch,
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(ScaleBlockSize / APackedSize)) *
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MPerXdl * MXdlPack / scale_pack_size_a,
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64 * KXdlPack * MXdlPack / scale_pack_size_a,
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1));
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const auto b_scale_grid_desc_bn_ak = make_naive_tensor_descriptor_packed(
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const auto b_scale_grid_desc_bn_ak = make_naive_tensor_descriptor(
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make_tuple(problem.N / (NXdlPack * NPerXdl),
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math::integer_divide_ceil(problem.K, (ScaleBlockSize / BPackedSize)) /
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(KXdlPack * 64 / NPerXdl),
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64 * KXdlPack * NXdlPack / scale_pack_size_b));
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64 * KXdlPack * NXdlPack / scale_pack_size_b),
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make_tuple(math::integer_divide_ceil(problem.K * problem.KBatch,
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(ScaleBlockSize / BPackedSize)) *
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NPerXdl * NXdlPack / scale_pack_size_b,
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64 * KXdlPack * NXdlPack / scale_pack_size_b,
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1));
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const auto c_grid_desc_mblock_mperblock_nblock_nperblock =
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MakeCGridDescriptor_MBlock_MPerBlock_NBlock_NPerBlock(
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@@ -2102,23 +2115,15 @@ struct GridwiseMoeGemmMX_BPreshuffle
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// N0, K0, Blocksize*KPack
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const index_t n_block_data_idx_on_grid =
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__builtin_amdgcn_readfirstlane(block_n_id * NXdlPerWave);
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__builtin_amdgcn_readfirstlane(block_n_id * NXdlPerWave / NXdlPack);
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// Gride buffer creation
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const auto a_grid_buf = make_dynamic_buffer<AddressSpaceEnum::Global>(
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p_a_grid, a_grid_desc_ak0_m_ak1.GetElementSpaceSize());
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#if 0
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printf("blkx: %u, blky: %u, tidx: %u, a_grid_size: %ld\n",
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blockIdx.x,
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blockIdx.y,
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threadIdx.x,
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a_grid_desc_ak0_m_ak1.GetElementSpaceSize());
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#endif
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const auto b_grid_buf = make_dynamic_buffer<AddressSpaceEnum::Global>(
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p_b_grid + expert_id * expert_stride, b_grid_desc_bpreshuffled.GetElementSpaceSize());
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const auto b_grid_buf =
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make_dynamic_buffer<AddressSpaceEnum::Global, AmdBufferCoherenceEnum::SYSTEM_NT1>(
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p_b_grid + expert_id * expert_stride,
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b_grid_desc_bpreshuffled.GetElementSpaceSize());
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// A, B scale buffer
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const auto a_scale_grid_buf = make_dynamic_buffer<AddressSpaceEnum::Global>(
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@@ -2585,16 +2590,18 @@ struct GridwiseMoeGemmMX_BPreshuffle
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// tuple of reference to C/Ds tensor descriptors
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const auto c_ds_desc_refs = concat_tuple_of_reference(
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tie(c_shuffle_block_desc_mblock_mperblock_nblock_nperblock),
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generate_tie([&](auto i) -> const auto& // return type should be reference
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{ return ds_grid_desc_mblock_mperblock_nblock_nperblock[i]; },
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Number<NumDTensor>{}));
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generate_tie(
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[&](auto i) -> const auto& // return type should be reference
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{ return ds_grid_desc_mblock_mperblock_nblock_nperblock[i]; },
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Number<NumDTensor>{}));
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// tuple of reference to C/Ds tensor descriptors
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const auto c_ds_buf_refs = concat_tuple_of_reference(
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tie(c_shuffle_block_buf),
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generate_tie([&](auto i) -> const auto& // return type should be reference
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{ return ds_grid_buf[i]; },
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Number<NumDTensor>{}));
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generate_tie(
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[&](auto i) -> const auto& // return type should be reference
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{ return ds_grid_buf[i]; },
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Number<NumDTensor>{}));
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// tuple of starting index of C/Ds blockwise copy
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const auto idx_c_ds_block_begin =
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@@ -2615,40 +2622,41 @@ struct GridwiseMoeGemmMX_BPreshuffle
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const auto EGlobalMemoryDataOperation = CGlobalMemoryDataOperation;
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constexpr index_t scatter_weight_idx = 3; // hack fix felix
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auto cde_block_copy_lds_and_global = ThreadGroupTensorSliceTransfer_v7r3_scatter<
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ThisThreadBlock,
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decltype(container_concat(make_tuple(CShuffleDataType{}), DsDataType{})),
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Tuple<EDataType>,
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decltype(c_ds_desc_refs),
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decltype(tie(e_grid_desc_mblock_mperblock_nblock_nperblock)),
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CElementwiseOperation,
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Sequence<static_cast<index_t>(EGlobalMemoryDataOperation)>, // FIXME: make Sequence
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// support arbitray type
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Sequence<1,
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CShuffleMXdlPerWavePerShuffle * MWave * MPerXdl,
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1,
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CShuffleNXdlPerWavePerShuffle * NWave * NPerXdl>, // BlockSliceLengths,
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CDEBlockTransferCluster,
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Sequence<0, 1, 2, 3>, // typename ThreadClusterArrangeOrder,
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Sequence<0, 1, 2, 3>, // typename SrcDimAccessOrder,
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Sequence<0, 1, 2, 3>, // typename DstDimAccessOrder,
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3, // index_t SrcVectorDim,
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3, // index_t DstVectorDim,
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CDEShuffleBlockTransferScalarPerVectors,
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CShuffleBlockTransferScalarPerVector_NPerBlock,
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sequence_merge_t<
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Sequence<true>,
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uniform_sequence_gen_t<NumDTensor,
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false>>, // ThreadTransferSrcResetCoordinateAfterRunFlags
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Sequence<false>, // ThreadTransferDstResetCoordinateAfterRunFlags
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IndexType,
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1, // ScatterDim
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true, // OutputScatter: false, only use scatter weights
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scatter_weight_idx // ScatterWeightIdx: ascale
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>{c_ds_desc_refs,
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idx_c_ds_block_begin,
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tie(e_grid_desc_mblock_mperblock_nblock_nperblock),
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make_tuple(make_multi_index(0, 0, block_n_id, 0)),
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c_element_op};
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ThisThreadBlock,
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decltype(container_concat(make_tuple(CShuffleDataType{}), DsDataType{})),
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Tuple<EDataType>,
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decltype(c_ds_desc_refs),
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decltype(tie(e_grid_desc_mblock_mperblock_nblock_nperblock)),
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CElementwiseOperation,
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Sequence<static_cast<index_t>(EGlobalMemoryDataOperation)>, // FIXME: make
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// Sequence support
|
||||
// arbitray type
|
||||
Sequence<1,
|
||||
CShuffleMXdlPerWavePerShuffle * MWave * MPerXdl,
|
||||
1,
|
||||
CShuffleNXdlPerWavePerShuffle * NWave * NPerXdl>, // BlockSliceLengths,
|
||||
CDEBlockTransferCluster,
|
||||
Sequence<0, 1, 2, 3>, // typename ThreadClusterArrangeOrder,
|
||||
Sequence<0, 1, 2, 3>, // typename SrcDimAccessOrder,
|
||||
Sequence<0, 1, 2, 3>, // typename DstDimAccessOrder,
|
||||
3, // index_t SrcVectorDim,
|
||||
3, // index_t DstVectorDim,
|
||||
CDEShuffleBlockTransferScalarPerVectors,
|
||||
CShuffleBlockTransferScalarPerVector_NPerBlock,
|
||||
sequence_merge_t<
|
||||
Sequence<true>,
|
||||
uniform_sequence_gen_t<NumDTensor,
|
||||
false>>, // ThreadTransferSrcResetCoordinateAfterRunFlags
|
||||
Sequence<false>, // ThreadTransferDstResetCoordinateAfterRunFlags
|
||||
IndexType,
|
||||
1, // ScatterDim
|
||||
true, // OutputScatter: false, only use scatter weights
|
||||
scatter_weight_idx // ScatterWeightIdx: ascale
|
||||
>{c_ds_desc_refs,
|
||||
idx_c_ds_block_begin,
|
||||
tie(e_grid_desc_mblock_mperblock_nblock_nperblock),
|
||||
make_tuple(make_multi_index(0, 0, block_n_id, 0)),
|
||||
c_element_op};
|
||||
|
||||
auto c_grid_buf = make_dynamic_buffer<AddressSpaceEnum::Global>(
|
||||
p_c_grid, c_grid_desc_mblock_mperblock_nblock_nperblock.GetElementSpaceSize());
|
||||
|
||||
Reference in New Issue
Block a user