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https://github.com/ROCm/composable_kernel.git
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[CK_TILE] Vector stores c col layout part3
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@@ -79,23 +79,10 @@ using KernelTypesMemWmma = ::testing::Types<
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>;
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using KernelTypesCompV3 = ::testing::Types<
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<<<<<<< HEAD
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<<<<<<< HEAD
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<<<<<<< HEAD
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std::tuple< Row, Row, Col, F16, F16, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>
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//std::tuple< Row, Row, Row, F16, I4, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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//std::tuple< Row, Row, Row, BF16, BF16, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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//std::tuple< Row, Row, Row, BF16, I4, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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=======
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std::tuple< Row, Row, Col, F16, F16, F32, F16, I128, I128, I64, I32, I32, I16, Intrawave, CompV3>//,
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//std::tuple< Row, Row, Row, F8, F8, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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//std::tuple< Row, Col, Row, F16, F16, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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//std::tuple< Row, Col, Row, F8, F8, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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//std::tuple< Col, Row, Row, F16, F16, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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//std::tuple< Col, Row, Row, F8, F8, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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//std::tuple< Col, Col, Row, F16, F16, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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//std::tuple< Col, Col, Row, F8, F8, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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>>>>>>> 0a9ceadca ([CK_TILE] working version)
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//std::tuple< Row, Row, Row, INT8, INT8, INT32, INT32, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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//std::tuple< Row, Row, Row, F8, F8, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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//std::tuple< Row, Row, Row, F8, BF8, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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@@ -132,36 +119,6 @@ using KernelTypesCompV3 = ::testing::Types<
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//std::tuple< Col, Col, Row, F8, I4, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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//std::tuple< Col, Col, Row, BF8, BF8, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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//std::tuple< Col, Col, Row, BF8, I4, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>
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=======
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std::tuple< Row, Row, Col, F16, F16, F32, F16, I128, I128, I64, I32, I32, I16, Intrawave, CompV3>,
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std::tuple< Row, Row, Col, F8, F8, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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=======
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std::tuple< Row, Row, Col, F16, F16, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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>>>>>>> 05ce4e524 ([CK_TILE] TEST vector stores c col layout part1)
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std::tuple< Row, Col, Col, F16, F16, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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std::tuple< Col, Row, Col, F16, F16, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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<<<<<<< HEAD
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std::tuple< Col, Row, Col, F8, F8, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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std::tuple< Col, Col, Col, F16, F16, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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std::tuple< Col, Col, Col, F8, F8, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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std::tuple< Row, Row, Col, INT8, INT8, INT32, INT32, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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std::tuple< Row, Col, Col, INT8, INT8, INT32, INT32, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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std::tuple< Col, Row, Col, INT8, INT8, INT32, INT32, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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std::tuple< Col, Col, Col, INT8, INT8, INT32, INT32, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>
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>>>>>>> 12c48382b ([CK_TILE] working version and tests)
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=======
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std::tuple< Col, Col, Col, F16, F16, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>
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//
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//std::tuple< Row, Row, Col, F8, F8, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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//std::tuple< Row, Col, Col, F8, F8, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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//std::tuple< Col, Row, Col, F8, F8, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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//std::tuple< Col, Col, Col, F8, F8, F32, F16, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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//
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//std::tuple< Row, Row, Col, INT8, INT8, INT32, INT32, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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//std::tuple< Row, Col, Col, INT8, INT8, INT32, INT32, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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//std::tuple< Col, Row, Col, INT8, INT8, INT32, INT32, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>,
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//std::tuple< Col, Col, Col, INT8, INT8, INT32, INT32, I256, I256, I64, I32, I32, I16, Intrawave, CompV3>
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>>>>>>> 05ce4e524 ([CK_TILE] TEST vector stores c col layout part1)
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>;
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using KernelTypesCompV3Wmma = ::testing::Types<
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@@ -318,7 +318,7 @@ class TestCkTileGemmPipeline : public ::testing::Test
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}
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}
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template <bool PadM, bool PadN, bool PadK, bool Preshuffle>
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template <bool PadM, bool PadN, bool PadK, bool Preshuffle>
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void RunSingle(const int M,
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const int N,
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const int K,
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@@ -334,58 +334,12 @@ class TestCkTileGemmPipeline : public ::testing::Test
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ck_tile::index_t stride_C =
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ck_tile::get_default_stride(M, N, StrideC, is_row_major(CLayout{}));
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auto f_host_tensor_descriptor = [](std::size_t row,
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std::size_t col,
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std::size_t stride,
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auto layout) {
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if constexpr(std::is_same_v<decltype(layout), ck_tile::tensor_layout::gemm::RowMajor>)
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{
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return ck_tile::HostTensorDescriptor({row, col}, {stride, 1_uz});
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}
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else
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{
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return ck_tile::HostTensorDescriptor({col, row}, {stride, 1_uz});
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}
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};
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auto f_get_default_stride =
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[](std::size_t row, std::size_t col, std::size_t stride, auto layout) {
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if(stride == 0)
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{
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// give a chance if stride is zero, return a default packed stride
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if constexpr(std::is_same_v<decltype(layout),
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ck_tile::tensor_layout::gemm::RowMajor>)
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{
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return col;
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}
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else
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{
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return row;
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}
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}
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else
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return stride;
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};
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ck_tile::index_t stride_A = f_get_default_stride(M, K, StrideA, ALayout{});
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ck_tile::index_t stride_B = f_get_default_stride(K, N, StrideB, BLayout{});
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ck_tile::index_t stride_C = f_get_default_stride(M, N, StrideC, CLayout{});
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ck_tile::HostTensor<ADataType> a_m_k(f_host_tensor_descriptor(M, K, stride_A, ALayout{}));
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ck_tile::HostTensor<BDataType> b_k_n(f_host_tensor_descriptor(K, N, stride_B, BLayout{}));
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ck_tile::HostTensor<ADataType> a_m_k(
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ck_tile::host_tensor_descriptor(M, K, stride_A, is_row_major(ALayout{})));
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ck_tile::HostTensor<BDataType> b_k_n(
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ck_tile::host_tensor_descriptor(K, N, stride_B, is_row_major(BLayout{})));
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ck_tile::HostTensor<CDataType> c_m_n_dev_result(
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<<<<<<< HEAD
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ck_tile::host_tensor_descriptor(M, N, stride_C, is_row_major(CLayout{})));
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=======
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f_host_tensor_descriptor(M, N, stride_C, CLayout{}));
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>>>>>>> 05ce4e524 ([CK_TILE] TEST vector stores c col layout part1)
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//std::cout << "a_m_k: ";
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//a_m_k.print_first_n(std::cout) << '\n';
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//std::cout << "b_k_n: ";
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//b_k_n.print_first_n(std::cout) << '\n';
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//std::cout << "c_m_n_dev_result: ";
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//c_m_n_dev_result.print_first_n(std::cout) << '\n';
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ck_tile::FillUniformDistributionIntegerValue<ADataType>{-5, 5, 11939}(a_m_k);
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ck_tile::FillUniformDistributionIntegerValue<BDataType>{-5, 5, 11940}(b_k_n);
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@@ -421,7 +375,7 @@ class TestCkTileGemmPipeline : public ::testing::Test
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stride_B,
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stride_C};
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invoke_gemm<PadM, PadN, PadK, Preshuffle>(args, ck_tile::stream_config{nullptr, false, 2});
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invoke_gemm<PadM, PadN, PadK, Preshuffle>(args, ck_tile::stream_config{nullptr, false});
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c_m_n_dev_buf.FromDevice(c_m_n_dev_result.data());
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bool pass = true;
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@@ -433,13 +387,6 @@ class TestCkTileGemmPipeline : public ::testing::Test
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ck_tile::reference_gemm<ADataType, BDataType, AccDataType, CDataType>(
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a_m_k, b_k_n, c_m_n_host_ref);
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//std::cout << "a_m_k: ";
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//a_m_k.print_first_n(std::cout) << '\n';
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//std::cout << "b_k_n: ";
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//b_k_n.print_first_n(std::cout) << '\n';
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//std::cout << "c_m_n_dev_result: ";
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//c_m_n_dev_result.print_first_n(std::cout) << '\n';
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const float max_accumulated_value =
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*std::max_element(c_m_n_host_ref.mData.begin(), c_m_n_host_ref.mData.end());
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const auto rtol_atol = calculate_rtol_atol<ADataType, BDataType, AccDataType, CDataType>(
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