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Author	SHA1	Message	Date
Chao Liu	18a81e356e	adding assembly	2019-03-22 16:33:04 -05:00
Chao Liu	8c923db423	hip build	2019-03-22 14:22:58 -05:00
Chao Liu	e72eece8fc	added int8x4	2019-03-21 09:59:40 -05:00
Chao Liu	02d72160dc	adding int8 direct that reads pre-vectorized data	2019-03-19 01:30:28 -05:00
Chao Liu	050a1a6890	adding int8 direct that reads pre-vectorized data	2019-03-19 00:05:41 -05:00
Chao Liu	18ffbd6802	adding fp16 direct that reads pre-vectorized data	2019-03-18 18:16:16 -05:00
Chao Liu	79d9b1084b	adding fp16 direct that reads pre-vectorized data	2019-03-18 18:16:02 -05:00
Chao Liu	2832520418	adding fp16 direct that reads pre-vectorized data	2019-03-18 15:09:52 -05:00
Chao Liu	4f0fc72e91	adding fp16 direct that reads pre-vectorized data	2019-03-18 15:03:17 -05:00
Chao Liu	7faf269c99	refactor	2019-03-17 21:48:46 -05:00
Chao Liu	03eef73c5b	refactoring block copy	2019-03-17 15:36:38 -05:00
Chao Liu	a0584426ff	refactoring ConstantTensorDescriptor	2019-03-17 03:22:41 -05:00
Chao Liu	fd8de38417	refactor	2019-03-16 10:50:46 -05:00
Chao Liu	ce0182ce05	Merge branch 'master' into implicit_gemm_fp16	2019-03-09 13:46:47 -06:00
Chao Liu	f54cad7d4f	refactor	2019-03-09 13:39:24 -06:00
Chao Liu	7a97087713	refactor	2019-03-09 12:59:47 -06:00
Chao Liu	43cd8529c2	refactor	2019-03-09 12:52:16 -06:00
Chao Liu	8edbc659b8	refactor	2019-03-06 12:34:31 -06:00
Chao Liu	04c5527d07	refactor	2019-03-04 17:09:20 -06:00
Chao Liu	5fd40ad768	clean up	2019-03-02 17:27:37 -06:00
Chao Liu	4543d17a71	refactor	2019-02-19 22:07:15 -06:00
Chao Liu	b2b622e8b2	refactor	2019-02-19 20:34:21 -06:00
Chao Liu	a65ef90308	device_implicit_gemm_convolution_1_chwn_csrk_khwn: use tensor copy (instead of pointwise) for writing output, 3x3 increased from 78% to 84%, 5x5 from 80% to 84%	2019-02-19 11:47:46 -06:00
Chao Liu	50b96745c6	gridwise_implicit_gemm_convolution_1_chwn_csrk_khwn use khwn for thread C data now	2019-02-17 02:28:20 -06:00
Chao Liu	1cb9885058	add anther verision of batch gemm	2019-02-17 01:50:57 -06:00
Chao Liu	9f2e8f8bb4	2-type implicit gemm using chwn	2019-02-15 22:51:51 -06:00
Chao Liu	d7c84daf66	delete useless code	2019-02-15 22:24:18 -06:00
Chao Liu	fc60454e3a	updated build	2019-02-15 02:17:00 -06:00
Chao Liu	79e6abbda8	update cuda cmake config	2019-02-15 02:14:26 -06:00
Chao Liu	b2888adfbe	change file extension to hip.hpp and hip.cpp	2019-02-15 02:13:21 -06:00
Chao Liu	a414e3fdf8	update build	2019-02-15 02:06:34 -06:00
Chao Liu	67c6f73ffe	hip build	2019-02-15 00:54:30 -06:00
Chao Liu	121693b3d3	update cmake config	2019-02-14 15:12:29 -06:00
Chao Liu	e80fbbdd71	refactor build, clean up	2019-02-14 15:10:16 -06:00
Chao Liu	28354a0fa3	make LDS double buffer works, 1x1 conv now hits 80% of peak	2019-02-12 00:57:08 -06:00
Chao Liu	61ac08661d	tune for 1x1	2019-02-11 22:36:17 -06:00
Chao Liu	abf75ac039	refactor	2019-02-11 17:45:22 -06:00
Chao Liu	120ab94aa1	update with new copy op	2019-02-07 01:31:00 -06:00
Chao Liu	07f16673c9	add lds double buffer for cnhw implicit gemm	2019-02-07 00:56:53 -06:00
Chao Liu	c866773642	unroll some loop, register double buffer gemm	2019-02-06 23:44:21 -06:00
Chao Liu	1b323316a8	add another blockwise gemm	2019-02-06 23:10:08 -06:00
Chao Liu	5e77650415	fixed LDS alignment bug	2019-02-06 01:54:13 -06:00
Chao Liu	079d63a788	bug fixes	2019-02-05 23:19:57 -06:00
Chao Liu	42f4c7fd56	refactor	2019-02-05 18:04:23 -06:00
Chao Liu	6614729a68	add another version of blockwise 2d copy, refactor	2019-02-05 17:06:53 -06:00
Chao Liu	4b616aad52	refactor	2019-02-05 00:51:37 -06:00
Chao Liu	0741a8ab88	working on reducing index calculation...	2019-02-04 17:16:28 -06:00
Chao Liu	9bbe9073ab	refactor	2019-02-04 15:40:34 -06:00
Chao Liu	3439e4b5b7	padding works (sort of), but code looks ugly. Tuned some resnet configs	2019-01-25 02:50:28 -06:00
Chao Liu	8bd6ea1a97	improve implicit gemm NCHW, SRCK, NKHW, and tuned	2019-01-24 22:24:30 -06:00