ROCm/composable_kernel
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6 Commits

Author SHA1 Message Date
Chao Liu
0eb214d1cd Code clean up (#20) 
* tuning para,

* testing on v100

* add fp16

* remove deprecated tensor descriptor

* sync with miopen

* update build script

Co-authored-by: Jing Zhang <jizhan@amd.com>

[ROCm/composable_kernel commit: 5c7cec1115]
 2020-06-23 20:31:27 -05:00
Chao Liu
8b51bc4b1d Added bwd data v3r1 v4r1, tweaking v1 (#10) 
* Added bwd data v3r1: breaking down compute into a series of load balanced GEMM, and launch in a single kernel
* Added bwd data v4r1: like v3r1, but launch GEMMs in multiple kernels
* Tweaked v1r1  and v1r2 (atomic) on AMD GPU

[ROCm/composable_kernel commit: c5da0377fb]
 2020-01-20 10:20:03 -06:00
Chao Liu
360f15cf24 refactored implicit gemm v1r3 
[ROCm/composable_kernel commit: efd419ecbe]
 2019-07-29 15:01:01 -05:00
Chao Liu
11c6b2ab9a change build 
[ROCm/composable_kernel commit: c82b833d8e]
 2019-06-12 10:47:25 -05:00
Chao Liu
9d61f2597a add cuda extract_asm script 
[ROCm/composable_kernel commit: e6c86f81b5]
 2019-04-02 20:26:58 -05:00
Chao Liu
fdb7d41661 cleaning up dead code 
[ROCm/composable_kernel commit: bdbc0eaad1]
 2019-04-02 17:58:44 -05:00