Rostyslav Geyyer 0c6ef7c14e Add example of conv_fwd_bias_relu_add for int4, int8, bfp16, fp16, and fp32 (#343) ...

* [LWPCK-359] Initial commit

* Working version for fp16, add results to readme

* Update according to PR #341

* Update results in readme

* Add fp32 example

* Add bf16 example

* Update fp16 and fp32 examples

* Add int8 example

* Add separate lengths and strides tensors for D tensors

Co-authored-by: Rosty Geyyer <rosty.geyyer@amd.com>

2022-08-12 15:30:27 -05:00

..

block

add license in file (#303)

2022-06-24 23:32:43 -05:00

device

add g; fixed strides (#355)

2022-08-12 15:22:39 -05:00

element

Add example of conv_fwd_bias_relu_add for int4, int8, bfp16, fp16, and fp32 (#343)

2022-08-12 15:30:27 -05:00

grid

Clean up conv example, Instances, profiler and test (#324)

2022-07-29 18:19:25 -05:00

thread

Single-kernel GEMM + layernorm (#263)

2022-07-01 01:38:00 -05:00

warp

add license in file (#303)

2022-06-24 23:32:43 -05:00