Rostyslav Geyyer 0c6ef7c14e Add example of conv_fwd_bias_relu_add for int4, int8, bfp16, fp16, and fp32 (#343) ...

* [LWPCK-359] Initial commit

* Working version for fp16, add results to readme

* Update according to PR #341

* Update results in readme

* Add fp32 example

* Add bf16 example

* Update fp16 and fp32 examples

* Add int8 example

* Add separate lengths and strides tensors for D tensors

Co-authored-by: Rosty Geyyer <rosty.geyyer@amd.com>

2022-08-12 15:30:27 -05:00

..

binary_element_wise_operation.hpp

CGEMM examples bf16, fp32, int8 (#332)

2022-08-02 14:52:27 -05:00

element_wise_operation.hpp

Add example of conv_fwd_bias_relu_add for int4, int8, bfp16, fp16, and fp32 (#343)

2022-08-12 15:30:27 -05:00

unary_element_wise_operation.hpp

Clean up conv example, Instances, profiler and test (#324)

2022-07-29 18:19:25 -05:00