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Added optimised CGEMM function pointers in zen4 cntx

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1. Two CGEMM function pointers are added for different storage schemes
   1. bli_cgemmsup_rv_zen_asm_3x8m
   2. bli_cgemmsup_rv_zen_asm_3x8n

2. In previous commit:
  (Level-3 triangular routines now use different block sizes and kernels
   Commit Id: 79e174ff0a)

   1. bli_cntx_set_l3_sup_tri_kers cntx function was created
   2. Function holds optimised function pointers for GEMMT/SYRK API's
   3. It avoids over riding default block sizes which improves the
      performance
   4. This function did not include optimised CGEMM function pointers
      leading to regression as reference kernels were invoked

3. With this commit, 2 optimized CGEMM function pointers are added in
   bli_cntx_set_l3_sup_tri_kers
   1. This fixes the regression as optimized CGEMM functions are invoked

AMD-Internal: [CPUPL-3831] [CPUPL-3830]

Change-Id: Ie8b41a5e62439de2a65e7df0b07d63ee2383e51e
This commit is contained in:
orequest
2023-08-30 09:13:00 +05:30
committed by Mangala V
parent 9d19effec5
commit 09e34fd2bd
1 changed files with 8 additions and 2 deletions
Download Patch File Download Diff File Expand all files Collapse all files

10
config/zen4/bli_cntx_init_zen4.c
View File

@@ -365,7 +365,7 @@ void bli_cntx_init_zen4( cntx_t* cntx )
bli_cntx_set_l3_sup_tri_kers
(
24,
30,
BLIS_RRR, BLIS_FLOAT, bli_sgemmsup_rv_zen_asm_6x16m, TRUE,
BLIS_RRC, BLIS_FLOAT, bli_sgemmsup_rd_zen_asm_6x16m, TRUE,
BLIS_RCR, BLIS_FLOAT, bli_sgemmsup_rv_zen_asm_6x16m, TRUE,
@@ -382,6 +382,12 @@ void bli_cntx_init_zen4( cntx_t* cntx )
BLIS_CRC, BLIS_DOUBLE, bli_dgemmsup_rd_haswell_asm_6x8n, TRUE,
BLIS_CCR, BLIS_DOUBLE, bli_dgemmsup_rv_haswell_asm_6x8n, TRUE,
BLIS_CCC, BLIS_DOUBLE, bli_dgemmsup_rv_haswell_asm_6x8n, TRUE,
BLIS_RRR, BLIS_SCOMPLEX, bli_cgemmsup_rv_zen_asm_3x8m, TRUE,
BLIS_RCR, BLIS_SCOMPLEX, bli_cgemmsup_rv_zen_asm_3x8m, TRUE,
BLIS_CRR, BLIS_SCOMPLEX, bli_cgemmsup_rv_zen_asm_3x8m, TRUE,
BLIS_RCC, BLIS_SCOMPLEX, bli_cgemmsup_rv_zen_asm_3x8n, TRUE,
BLIS_CCR, BLIS_SCOMPLEX, bli_cgemmsup_rv_zen_asm_3x8n, TRUE,
BLIS_CCC, BLIS_SCOMPLEX, bli_cgemmsup_rv_zen_asm_3x8n, TRUE,
BLIS_RRR, BLIS_DCOMPLEX, bli_zgemmsup_rv_zen_asm_3x4m, TRUE,
BLIS_RRC, BLIS_DCOMPLEX, bli_zgemmsup_rd_zen_asm_3x4m, TRUE,
BLIS_RCR, BLIS_DCOMPLEX, bli_zgemmsup_rv_zen_asm_3x4m, TRUE,
@@ -392,4 +398,4 @@ void bli_cntx_init_zen4( cntx_t* cntx )
BLIS_CCC, BLIS_DCOMPLEX, bli_zgemmsup_rv_zen_asm_3x4n, TRUE,
cntx
);
}
}