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https://github.com/amd/blis.git
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Trace and logging
Added function tracing for her2k, her, herk, nrm2, scal, swap, symm, symv. Change-Id: I93a97b7000c632f550eab1317b3cafad8c539937 AMD-Internal: [CPUPL-1249]
This commit is contained in:
@@ -5,6 +5,7 @@
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libraries.
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Copyright (C) 2014, The University of Texas at Austin
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Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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@@ -50,6 +51,7 @@ void PASTEF77(ch,blasname) \
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ftype* a, const f77_int* lda \
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) \
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{ \
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AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
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uplo_t blis_uploa; \
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dim_t m0; \
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ftype* x0; \
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@@ -97,6 +99,7 @@ void PASTEF77(ch,blasname) \
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NULL \
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); \
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\
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AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
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/* Finalize BLIS. */ \
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bli_finalize_auto(); \
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}
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@@ -5,7 +5,7 @@
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libraries.
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Copyright (C) 2014, The University of Texas at Austin
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Copyright (C) 2019, Advanced Micro Devices, Inc.
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Copyright (C) 2019-2020, Advanced Micro Devices, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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@@ -58,6 +58,7 @@ void PASTEF77(ch,blasname) \
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ftype* c, const f77_int* ldc \
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) \
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{ \
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AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
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uplo_t blis_uploc; \
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trans_t blis_transa; \
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dim_t m0, k0; \
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@@ -101,9 +102,9 @@ void PASTEF77(ch,blasname) \
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) \
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) \
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{ \
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AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
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/* Finalize BLIS. */ \
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bli_finalize_auto(); \
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\
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return; \
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} \
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\
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@@ -132,6 +133,7 @@ void PASTEF77(ch,blasname) \
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NULL \
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); \
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\
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AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
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/* Finalize BLIS. */ \
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bli_finalize_auto(); \
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}
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@@ -154,6 +156,7 @@ void PASTEF77(ch,blasname) \
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ftype* c, const f77_int* ldc \
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) \
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{ \
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AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
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uplo_t blis_uploc; \
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trans_t blis_transa; \
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dim_t m0, k0; \
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@@ -250,6 +253,7 @@ void PASTEF77(ch,blasname) \
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NULL \
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); \
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\
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AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
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/* Finalize BLIS. */ \
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bli_finalize_auto(); \
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}
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@@ -5,7 +5,7 @@
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libraries.
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Copyright (C) 2014, The University of Texas at Austin
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Copyright (C) 2019, Advanced Micro Devices, Inc.
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Copyright (C) 2019-2020, Advanced Micro Devices, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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@@ -63,6 +63,7 @@ void PASTEF77(ch,blasname) \
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inc_t rs_a, cs_a; \
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inc_t rs_c, cs_c; \
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\
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AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
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/* Initialize BLIS. */ \
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bli_init_auto(); \
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\
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@@ -98,6 +99,7 @@ void PASTEF77(ch,blasname) \
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) \
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) \
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{ \
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AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
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/* Finalize BLIS. */ \
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bli_finalize_auto(); \
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\
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@@ -125,6 +127,7 @@ void PASTEF77(ch,blasname) \
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NULL \
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); \
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\
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AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
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/* Finalize BLIS. */ \
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bli_finalize_auto(); \
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}
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@@ -5,6 +5,7 @@
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libraries.
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Copyright (C) 2014, The University of Texas at Austin
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Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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@@ -47,6 +48,7 @@ ftype_r PASTEF772(chr,chx,blasname) \
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const ftype_x* x, const f77_int* incx \
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) \
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{ \
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AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
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dim_t n0; \
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ftype_x* x0; \
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inc_t incx0; \
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@@ -72,6 +74,7 @@ ftype_r PASTEF772(chr,chx,blasname) \
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NULL \
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); \
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\
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AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
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/* Finalize BLIS. */ \
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bli_finalize_auto(); \
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\
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@@ -49,6 +49,7 @@ void PASTEF772(chx,cha,blasname) \
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ftype_x* x, const f77_int* incx \
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) \
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{ \
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AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
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dim_t n0; \
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ftype_x* x0; \
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inc_t incx0; \
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@@ -81,6 +82,7 @@ void PASTEF772(chx,cha,blasname) \
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NULL \
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); \
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\
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AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
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/* Finalize BLIS. */ \
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bli_finalize_auto(); \
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}
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@@ -95,6 +97,7 @@ void sscal_
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float* x, const f77_int* incx
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)
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{
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AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1)
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dim_t n0;
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float* x0;
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inc_t incx0;
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@@ -143,6 +146,7 @@ void sscal_
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/* Finalize BLIS. */
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// bli_finalize_auto();
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AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1)
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}
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void dscal_
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@@ -152,6 +156,7 @@ void dscal_
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double* x, const f77_int* incx
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)
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{
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AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1)
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dim_t n0;
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double* x0;
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inc_t incx0;
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@@ -201,6 +206,7 @@ void dscal_
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/* Finalize BLIS. */
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// bli_finalize_auto();
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AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1)
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}
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INSERT_GENTFUNCSCAL_BLAS_CZ( scal, scalv )
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@@ -49,6 +49,7 @@ void PASTEF77(ch,blasname) \
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ftype* y, const f77_int* incy \
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) \
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{ \
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AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
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dim_t n0; \
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ftype* x0; \
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ftype* y0; \
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@@ -76,6 +77,7 @@ void PASTEF77(ch,blasname) \
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NULL \
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); \
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\
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AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
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/* Finalize BLIS. */ \
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bli_finalize_auto(); \
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}
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@@ -90,6 +92,7 @@ void sswap_
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float* y, const f77_int* incy
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)
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{
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AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1)
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dim_t n0;
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float* x0;
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float* y0;
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@@ -154,6 +157,7 @@ void sswap_
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/* Finalize BLIS. */
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// bli_finalize_auto();
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AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1)
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}
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void dswap_
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@@ -163,6 +167,7 @@ void dswap_
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double* y, const f77_int* incy
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)
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{
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AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1)
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dim_t n0;
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double* x0;
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double* y0;
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@@ -227,6 +232,7 @@ void dswap_
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/* Finalize BLIS. */
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// bli_finalize_auto();
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AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1)
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}
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INSERT_GENTFUNC_BLAS_CZ( swap, swapv )
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@@ -5,7 +5,7 @@
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libraries.
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Copyright (C) 2014, The University of Texas at Austin
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Copyright (C) 2019, Advanced Micro Devices, Inc.
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Copyright (C) 2019-2020, Advanced Micro Devices, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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@@ -58,6 +58,7 @@ void PASTEF77(ch,blasname) \
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ftype* c, const f77_int* ldc \
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) \
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{ \
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AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
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side_t blis_side; \
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uplo_t blis_uploa; \
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dim_t m0, n0; \
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@@ -116,6 +117,7 @@ void PASTEF77(ch,blasname) \
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NULL \
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); \
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\
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AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
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/* Finalize BLIS. */ \
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bli_finalize_auto(); \
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}
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@@ -138,6 +140,7 @@ void PASTEF77(ch,blasname) \
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ftype* c, const f77_int* ldc \
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) \
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{ \
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AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
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side_t blis_side; \
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uplo_t blis_uploa; \
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dim_t m0, n0; \
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@@ -220,6 +223,7 @@ void PASTEF77(ch,blasname) \
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\
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/* Finalize BLIS. */ \
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bli_finalize_auto(); \
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AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
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}
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#endif
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@@ -5,6 +5,7 @@
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libraries.
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Copyright (C) 2014, The University of Texas at Austin
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Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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@@ -52,6 +53,7 @@ void PASTEF77(ch,blasname) \
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ftype* y, const f77_int* incy \
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) \
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{ \
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AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
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uplo_t blis_uploa; \
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dim_t m0; \
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ftype* x0; \
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@@ -106,6 +108,7 @@ void PASTEF77(ch,blasname) \
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NULL \
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); \
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\
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AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
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/* Finalize BLIS. */ \
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bli_finalize_auto(); \
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}
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