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Added new decision logic to choose between 6x8 dgemm kernel vs 24x8 kernel. The decision is based on the values of "m, n and k".

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Change-Id: I307ff002797ccef5bd61106b808cecb069b91fd6
This commit is contained in:
Moripalli Chitra
2024-07-26 12:17:44 +05:30
parent 92fbd04238
commit 8b486e8d14
1 changed files with 48 additions and 28 deletions
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76
kernels/zen/3/bli_gemm_tiny.c
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@@ -517,35 +517,55 @@ err_t bli_dgemm_tiny
// Query the architecture ID
arch_t id = bli_arch_query_id();
if(m <= 24 && n <= 24 && k <= 20)
{
// Pick the kernel based on the architecture ID
switch (id)
{
case BLIS_ARCH_ZEN5:
case BLIS_ARCH_ZEN4:
case BLIS_ARCH_ZEN3:
case BLIS_ARCH_ZEN2:
case BLIS_ARCH_ZEN:
return bli_dgemm_tiny_6x8_kernel
(
1 * (transa == BLIS_CONJ_NO_TRANSPOSE),
1 * (transb == BLIS_CONJ_NO_TRANSPOSE),
transa,
transb,
m,
n,
k,
alpha,
a, rs_a0, cs_a0,
b, rs_b0, cs_b0,
beta,
c, rs_c0, cs_c0
);
break;
default:
return BLIS_FAILURE;
}
switch (id)
{
case BLIS_ARCH_ZEN5:
if(m<24 && ((n<=24 && k<=20) ||
(n<=50 && ((m<=4 && k<=50) || (m!=8 && m!=9 && m!=16 && k<=10)))))
{
return bli_dgemm_tiny_6x8_kernel
(
1 * (transa == BLIS_CONJ_NO_TRANSPOSE),
1 * (transb == BLIS_CONJ_NO_TRANSPOSE),
transa,
transb,
m,
n,
k,
alpha,
a, rs_a0, cs_a0,
b, rs_b0, cs_b0,
beta,
c, rs_c0, cs_c0
);
}
break;
case BLIS_ARCH_ZEN4:
case BLIS_ARCH_ZEN3:
case BLIS_ARCH_ZEN2:
case BLIS_ARCH_ZEN:
if(m <= 24 && n <= 24 && k <= 20)
{
return bli_dgemm_tiny_6x8_kernel
(
1 * (transa == BLIS_CONJ_NO_TRANSPOSE),
1 * (transb == BLIS_CONJ_NO_TRANSPOSE),
transa,
transb,
m,
n,
k,
alpha,
a, rs_a0, cs_a0,
b, rs_b0, cs_b0,
beta,
c, rs_c0, cs_c0
);
}
break;
default:
return BLIS_FAILURE;
}
if(FALSE == bli_thread_get_is_parallel())