BLIS : Compiler warning fixes

Details :
  - Fixed warnings with AOCC and GCC compilers.

AMD-Internal: [CPUPL-1662]

Change-Id: Ia0e298a169d4dd4664b11e03a4e3cd340e9fdfce

frame/base/bli_cntx.c

@@ -1631,7 +1631,7 @@ void bli_cntx_set_l3_thresh_funcs( dim_t n_funcs, ... )
 	#ifdef BLIS_ENABLE_MEM_TRACING
 	printf( "bli_cntx_set_l3_thresh_funcs(): " );
 	#endif
-	l1vkr_t* func_ids   = bli_malloc_intl( n_funcs * sizeof( opid_t ) );
+	opid_t* func_ids   = bli_malloc_intl( n_funcs * sizeof( opid_t ) );
 
 	#ifdef BLIS_ENABLE_MEM_TRACING
 	printf( "bli_cntx_set_l3_thresh_funcs(): " );

kernels/haswell/1m/bli_packm_haswell_asm_c3xk.c

@@ -5,7 +5,7 @@
    libraries.
 
    Copyright (C) 2014, The University of Texas at Austin
-   Copyright (C) 2019 - 2020, Advanced Micro Devices, Inc.
+   Copyright (C) 2019 - 2021, Advanced Micro Devices, Inc.All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
    modification, are permitted provided that the following conditions are
@@ -104,7 +104,7 @@ void bli_cpackm_haswell_asm_3xk
 
 	// -------------------------------------------------------------------------
 
-	if ( cdim0 == mnr && !gs && !bli_does_conj( conja ) && unitk )
+	if ( cdim0 == mnr && !gs && !conja && unitk )
 	{
 		begin_asm()
 		

kernels/haswell/1m/bli_packm_haswell_asm_c8xk.c

@@ -5,7 +5,7 @@
    libraries.
 
    Copyright (C) 2014, The University of Texas at Austin
-   Copyright (C) 2019 - 2020, Advanced Micro Devices, Inc.
+   Copyright (C) 2019 - 2021, Advanced Micro Devices, Inc.
 
    Redistribution and use in source and binary forms, with or without
    modification, are permitted provided that the following conditions are
@@ -104,7 +104,7 @@ void bli_cpackm_haswell_asm_8xk
 
 	// -------------------------------------------------------------------------
 
-	if ( cdim0 == mnr && !gs && !bli_does_conj( conja ) && unitk )
+	if ( cdim0 == mnr && !gs && !conja && unitk )
 	{
 		begin_asm()
 		

kernels/haswell/1m/bli_packm_haswell_asm_z3xk.c

@@ -5,7 +5,7 @@
    libraries.
 
    Copyright (C) 2014, The University of Texas at Austin
-   Copyright (C) 2019 - 2020, Advanced Micro Devices, Inc.
+   Copyright (C) 2019 - 2021, Advanced Micro Devices, Inc.
 
    Redistribution and use in source and binary forms, with or without
    modification, are permitted provided that the following conditions are
@@ -104,7 +104,7 @@ void bli_zpackm_haswell_asm_3xk
 
 	// -------------------------------------------------------------------------
 
-	if ( cdim0 == mnr && !gs && !bli_does_conj( conja ) && unitk )
+	if ( cdim0 == mnr && !gs && !conja && unitk )
 	{
 		begin_asm()
 		

kernels/haswell/1m/bli_packm_haswell_asm_z4xk.c

@@ -5,7 +5,7 @@
    libraries.
 
    Copyright (C) 2014, The University of Texas at Austin
-   Copyright (C) 2019 - 2020, Advanced Micro Devices, Inc.
+   Copyright (C) 2019 - 2021, Advanced Micro Devices, Inc.All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
    modification, are permitted provided that the following conditions are
@@ -104,7 +104,7 @@ void bli_zpackm_haswell_asm_4xk
 
 	// -------------------------------------------------------------------------
 
-	if ( cdim0 == mnr && !gs && !bli_does_conj( conja ) && unitk )
+	if ( cdim0 == mnr && !gs && !conja && unitk )
 	{
 		begin_asm()
 		

kernels/haswell/3/bli_gemm_haswell_asm_d6x8.c

@@ -5,7 +5,7 @@
    libraries.
 
    Copyright (C) 2014, The University of Texas at Austin
-   Copyright (C) 2018 - 2021, Advanced Micro Devices, Inc.
+   Copyright (C) 2018 - 2021, Advanced Micro Devices, Inc.All rights reserved.
 
    Redistribution and use in source and binary forms, with or without
    modification, are permitted provided that the following conditions are
@@ -2224,40 +2224,24 @@ void bli_zgemm_haswell_asm_3x4
 	uint64_t rs_c   = rs_c0;
 	uint64_t cs_c   = cs_c0;
 
-	//handling case when alpha and beta are real and +/-1.
-	uint64_t alpha_real_one = *((uint64_t*)(&alpha->real));
-	uint64_t beta_real_one = *((uint64_t*)(&beta->real));
-
-	uint64_t alpha_real_one_abs = ((alpha_real_one << 1) >> 1);
-	uint64_t beta_real_one_abs  = ((beta_real_one << 1) >> 1);
-
 	char alpha_mul_type = BLIS_MUL_DEFAULT;
 	char beta_mul_type  = BLIS_MUL_DEFAULT;
 
-	if((alpha_real_one_abs == BLIS_DOUBLE_TO_UINT64_ONE_ABS) && (alpha->imag==0))// (alpha is real and +/-1)
-	{
-		alpha_mul_type = BLIS_MUL_ONE; //alpha real and 1
-		if(alpha_real_one == BLIS_DOUBLE_TO_UINT64_MINUS_ONE)
-		{
-			alpha_mul_type = BLIS_MUL_MINUS_ONE; //alpha real and -1
-		}
-	}
+    //handling case when alpha and beta are real and +/-1.
 
-	if(beta->imag == 0)// beta is real
-	{
-		if(beta_real_one_abs == BLIS_DOUBLE_TO_UINT64_ONE_ABS)// (beta +/-1)
-		{
-			beta_mul_type = BLIS_MUL_ONE;
-			if(beta_real_one == BLIS_DOUBLE_TO_UINT64_MINUS_ONE)
-			{
-				beta_mul_type = BLIS_MUL_MINUS_ONE;
-			}
-		}
-		else if(beta_real_one == 0)
-		{
-			beta_mul_type = BLIS_MUL_ZERO;
-		}
-	}
+    if(alpha->imag == 0.0)// (alpha is real)
+    {
+        if(alpha->real == 1.0)          alpha_mul_type = BLIS_MUL_ONE;
+        else if(alpha->real == -1.0)    alpha_mul_type = BLIS_MUL_MINUS_ONE;
+        else if(alpha->real == 0.0)     alpha_mul_type = BLIS_MUL_ZERO;
+    }
+
+    if(beta->imag == 0.0)// (beta is real)
+    {
+        if(beta->real == 1.0)       beta_mul_type = BLIS_MUL_ONE;
+        else if(beta->real == -1.0) beta_mul_type = BLIS_MUL_MINUS_ONE;
+        else if(beta->real == 0.0)  beta_mul_type = BLIS_MUL_ZERO;
+    }
 
 	begin_asm()
 

kernels/zen/1f/bli_axpyf_zen_int_6.c

@@ -83,10 +83,9 @@ void bli_saxpyf_zen_int_6
     v8sf_t           chi0v, chi1v, chi2v, chi3v;
     v8sf_t           chi4v,chi5v;
 
-    v8sf_t           a00v, a01v, a02v, a03v;
-    v8sf_t           a04v,a05v;
+    v8sf_t           a00v, a01v;
 
-    v8sf_t           y0v, y1v;
+    v8sf_t           y0v;
 
     float           chi0, chi1, chi2, chi3;
     float           chi4,chi5;