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Fix typo in 24x8m DGEMM sup kernel causing incorrect result.

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- Corrected a typo in dgemm kernel implementation, beta=0 and
  n_left=6 edge kernel.

Thanks to Shubham Sharma<shubham.sharma3@amd.com> for helping with debugging.

AMD-Internal: [CPUPL-6443]
Change-Id: Ifa1e16ec544b7e85c21651bc23c4c27e86d6730b
This commit is contained in:
harsh dave
2025-03-07 04:12:55 -05:00
committed by Harsh Dave
parent c4b84601da
commit a359a25765
1 changed files with 1 additions and 1 deletions
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2
kernels/zen4/3/sup/bli_dgemmsup_rv_zen4_asm_24x8m.c
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@@ -36627,7 +36627,7 @@
jz(.SUB18DROWSTORBZ) \
\
label(.SUB18DCOLSTORBZ) \
STORE_COLSTORED_C_18x6_Bn \
STORE_COLSTORED_C_18x6_B0 \
jmp(.CONCLUDE) \
\
label(.SUB18DROWSTORBZ) \