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Re-enabling Zen optimized cache block sizes for config target zen
Change-Id: I8191421b876755b31590323c66156d4a814575f1
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@@ -111,10 +111,14 @@ void bli_cntx_init_zen( cntx_t* cntx )
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// s d c z
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bli_blksz_init_easy( &blkszs[ BLIS_MR ], 6, 6, 3, 3 );
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bli_blksz_init_easy( &blkszs[ BLIS_NR ], 16, 8, 8, 4 );
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//bli_blksz_init_easy( &blkszs[ BLIS_MC ], 144, 510, 144, 72 );
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//bli_blksz_init_easy( &blkszs[ BLIS_KC ], 256, 1024, 256, 256 );
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#ifdef BLIS_ENABLE_ZEN_BLOCK_SIZES
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// Zen optmized level 3 cache block sizes
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bli_blksz_init_easy( &blkszs[ BLIS_MC ], 144, 510, 144, 72 );
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bli_blksz_init_easy( &blkszs[ BLIS_KC ], 256, 1024, 256, 256 );
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#else
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bli_blksz_init_easy( &blkszs[ BLIS_MC ], 144, 72, 144, 72 );
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bli_blksz_init_easy( &blkszs[ BLIS_KC ], 256, 256, 256, 256 );
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#endif
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bli_blksz_init_easy( &blkszs[ BLIS_NC ], 4080, 4080, 4080, 4080 );
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bli_blksz_init_easy( &blkszs[ BLIS_AF ], 8, 8, -1, -1 );
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bli_blksz_init_easy( &blkszs[ BLIS_DF ], 8, 8, -1, -1 );
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@@ -42,7 +42,7 @@
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#define BLIS_DEFAULT_MR_THREAD_MAX 1
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#define BLIS_DEFAULT_NR_THREAD_MAX 1
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#define BLIS_ENABLE_ZEN_BLOCK_SIZES
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//#define BLIS_ENABLE_SMALL_MATRIX
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// This will select the threshold below which small matrix code will be called.
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