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Added AVX512 8xk packing kernel
AVX512 optimised kernel for Double datatype supports row and column major matrix Packing kernel is column major implementation If matrix is row major, we need to transpose block before storing it. If matrix is column major, we directly store AMD-Internal: [CPUPL-2966] Change-Id: I8e43f1e2b562c382f44278cd47b3d1e84a4d24c9
This commit is contained in:
Harsh Dave
@@ -365,6 +365,7 @@ if(${TARGET_ARCH} STREQUAL zen4 OR
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set_source_files_properties(${CMAKE_CURRENT_SOURCE_DIR}/kernels/zen4/3/sup/d24x8/bli_dgemmsup_rv_zen4_asm_Mx8.c PROPERTIES COMPILE_FLAGS /arch:AVX512)
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set_source_files_properties(${CMAKE_CURRENT_SOURCE_DIR}/kernels/zen4/1m/bli_packm_zen4_asm_z4xk.c PROPERTIES COMPILE_FLAGS /arch:AVX512)
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set_source_files_properties(${CMAKE_CURRENT_SOURCE_DIR}/kernels/zen4/1m/bli_packm_zen4_asm_z12xk.c PROPERTIES COMPILE_FLAGS /arch:AVX512)
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set_source_files_properties(${CMAKE_CURRENT_SOURCE_DIR}/kernels/zen4/1m/bli_packm_zen4_asm_d8xk.c PROPERTIES COMPILE_FLAGS /arch:AVX512)
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endif()
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set(CMAKE_C_FLAGS "${CMAKE_C_FLAGS} /W0 ")
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@@ -104,7 +104,7 @@ void bli_cntx_init_zen4( cntx_t* cntx )
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BLIS_PACKM_6XK_KER, BLIS_FLOAT, bli_spackm_haswell_asm_6xk,
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BLIS_PACKM_16XK_KER, BLIS_FLOAT, bli_spackm_haswell_asm_16xk,
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BLIS_PACKM_6XK_KER, BLIS_DOUBLE, bli_dpackm_haswell_asm_6xk,
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BLIS_PACKM_8XK_KER, BLIS_DOUBLE, bli_dpackm_haswell_asm_8xk,
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BLIS_PACKM_8XK_KER, BLIS_DOUBLE, bli_dpackm_zen4_asm_8xk,
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BLIS_PACKM_24XK_KER, BLIS_DOUBLE, bli_dpackm_zen4_asm_24xk,
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BLIS_PACKM_32XK_KER, BLIS_DOUBLE, bli_dpackm_zen4_asm_32xk,
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BLIS_PACKM_3XK_KER, BLIS_SCOMPLEX, bli_cpackm_haswell_asm_3xk,
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@@ -2,6 +2,7 @@
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target_sources("${PROJECT_NAME}"
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PRIVATE
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${CMAKE_CURRENT_SOURCE_DIR}/bli_packm_zen4_asm_d8xk.c
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${CMAKE_CURRENT_SOURCE_DIR}/bli_packm_zen4_asm_d16xk.c
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${CMAKE_CURRENT_SOURCE_DIR}/bli_packm_zen4_asm_d24xk.c
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${CMAKE_CURRENT_SOURCE_DIR}/bli_packm_zen4_asm_d32xk.c
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439
kernels/zen4/1m/bli_packm_zen4_asm_d8xk.c
Normal file
439
kernels/zen4/1m/bli_packm_zen4_asm_d8xk.c
Normal file
@@ -0,0 +1,439 @@
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/*
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BLIS
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An object-based framework for developing high-performance BLAS-like
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libraries.
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Copyright (C) 2023, Advanced Micro Devices, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name(s) of the copyright holder(s) nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "blis.h"
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#define BLIS_ASM_SYNTAX_ATT
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#include "bli_x86_asm_macros.h"
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/**
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* Shuffle 2 double-precision elements selected by imm8 from S1 and S2,
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* and store the results in D1
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* S1 : 1 9 3 11 5 13 7 15
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* S2 : 2 10 4 12 6 14 8 16
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* D1 : 1 9 5 13 2 10 6 14
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* D2 : 3 11 7 15 4 12 8 16
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*/
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#define SHUFFLE_DATA(S1, S2, D1, D2, S3, S4, D3, D4) \
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\
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VSHUFF64X2(IMM(0x88), ZMM(S1), ZMM(S2), ZMM(D1)) \
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VSHUFF64X2(IMM(0xDD), ZMM(S1), ZMM(S2), ZMM(D2)) \
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VSHUFF64X2(IMM(0x88), ZMM(S3), ZMM(S4), ZMM(D3)) \
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VSHUFF64X2(IMM(0xDD), ZMM(S3), ZMM(S4), ZMM(D4)) \
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/**
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* Unpacks and interleave low half and high half of each
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* 128-bit lane in S1 and S2 and store into D1 and D2
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* respectively.
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* S1 : 1 2 3 4 5 6 7 8
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* S2 : 9 10 11 12 13 14 15 16
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* D1 : 1 9 3 11 5 13 7 15
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* D2 : 2 10 4 12 6 14 8 16
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*/
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#define UNPACK_LO_HIGH(S1, S2, D1, D2, S3, S4, D3, D4) \
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\
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vunpcklpd( zmm(S1), zmm(S2), zmm(D1)) \
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vunpckhpd( zmm(S1), zmm(S2), zmm(D2)) \
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vunpcklpd( zmm(S3), zmm(S4), zmm(D3)) \
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vunpckhpd( zmm(S3), zmm(S4), zmm(D4))
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void bli_dpackm_zen4_asm_8xk
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(
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conj_t conja,
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pack_t schema,
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dim_t cdim0,
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dim_t k0,
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dim_t k0_max,
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double* restrict kappa,
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double* restrict a, inc_t inca0, inc_t lda0,
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double* restrict p, inc_t ldp0,
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cntx_t* restrict cntx
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)
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{
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// This is the panel dimension assumed by the packm kernel.
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const dim_t mnr = 8;
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// This is the "packing" dimension assumed by the packm kernel.
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// This should be equal to ldp.
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//const dim_t packmnr = 8;
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// Typecast local copies of integers in case dim_t and inc_t are a
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// different size than is expected by load instructions.
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const uint64_t k_iter = k0 /8;
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const uint64_t k_left = k0 % 8;
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/**
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* prepares mask for k_left, since we are computing in multiple of 8,
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* for edge cases mask is initialized for loading and storing only
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* left over elements.
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*/
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uint8_t mask = 0xff >> (0x8 - (k_left));
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if (mask == 0) mask = 0xff;
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// NOTE: For the purposes of the comments in this packm kernel, we
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// interpret inca and lda as rs_a and cs_a, respectively, and similarly
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// interpret ldp as cs_p (with rs_p implicitly unit). Thus, when reading
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// this packm kernel, you should think of the operation as packing an
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// m x n micropanel, where m and n are tiny and large, respectively, and
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// where elements of each column of the packed matrix P are contiguous.
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// (This packm kernel can still be used to pack micropanels of matrix B
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// in a gemm operation.)
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const uint64_t inca = inca0;
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const uint64_t lda = lda0;
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const uint64_t ldp = ldp0;
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const bool gs = ( inca0 != 1 && lda0 != 1 );
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// NOTE: If/when this kernel ever supports scaling by kappa within the
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// assembly region, this constraint should be lifted.
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const bool unitk = bli_deq1( *kappa );
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double* restrict a_next = a + cdim0;
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// -------------------------------------------------------------------------
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if ( cdim0 == mnr && !gs && unitk )
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{
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begin_asm()
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mov(var(mask), rdx) // load mask
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kmovw(edx, k(2)) // move mask to k2 register
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mov(var(a), rax) // load address of a.
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mov(var(a), r13) // load address of a.
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mov(var(inca), r8) // load inca
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mov(var(lda), r10) // load lda
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lea(mem(, r8, 8), r8) // inca *= sizeof(double)
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lea(mem(, r10, 8), r10) // lda *= sizeof(double)
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mov(var(p), rbx) // load address of p.
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cmp(imm(8), r8) // set ZF if (8*inca) == 8.
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jz(.DCOLUNIT) // jump to column storage case
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// -- kappa unit, row storage on A -----------------------------------------
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label(.DROWUNIT)
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lea(mem(r8, r8, 2), r12) // r12 = 3*inca
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lea(mem(r12, r8, 2), rcx) // rcx = 5*inca
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lea(mem(r12, r8, 4), rdx) // rdx = 7*inca
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mov(var(k_iter), rsi) // i = k_iter;
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test(rsi, rsi) // check i via logical AND.
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je(.DCONKLEFTROWU) // if i == 0, jump to code that
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// contains the k_left loop.
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label(.DKITERROWU) // MAIN LOOP (k_iter)
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/**
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* Load first 8 rows of matrix.
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* Transpose 8x8 tile and store it back to destination buffer.
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*/
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vmovupd(mem(rax, 0), zmm6)
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vmovupd(mem(rax, r8, 1, 0), zmm8)
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vmovupd(mem(rax, r8, 2, 0), zmm10)
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vmovupd(mem(rax, r12, 1, 0), zmm12)
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vmovupd(mem(rax, r8, 4, 0), zmm14)
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vmovupd(mem(rax, rcx, 1, 0), zmm16)
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vmovupd(mem(rax, r12, 2, 0), zmm18)
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vmovupd(mem(rax, rdx, 1, 0), zmm20)
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UNPACK_LO_HIGH(8, 6, 0, 1, 12, 10, 2, 3)
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SHUFFLE_DATA(2, 0, 4, 5, 3, 1, 30, 31)
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UNPACK_LO_HIGH(16, 14, 0, 1, 20, 18, 2, 3)
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SHUFFLE_DATA(2, 0, 6, 8, 3, 1, 10, 12)
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SHUFFLE_DATA(6, 4, 0, 1, 8, 5, 2, 3)
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SHUFFLE_DATA(10, 30, 4, 5, 12, 31, 6, 8)
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vmovupd(zmm0, mem(rbx, 0*64))
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vmovupd(zmm4, mem(rbx, 1*64))
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vmovupd(zmm2, mem(rbx, 2*64))
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vmovupd(zmm6, mem(rbx, 3*64))
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vmovupd(zmm1, mem(rbx, 4*64))
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vmovupd(zmm5, mem(rbx, 5*64))
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vmovupd(zmm3, mem(rbx, 6*64))
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vmovupd(zmm8, mem(rbx, 7*64))
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add(imm(8*8), r13)
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mov(r13, rax)
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add(imm(8*8*8), rbx) // p += 8*ldp
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dec(rsi) // i -= 1;
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jne(.DKITERROWU) // iterate again if i != 0.
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label(.DCONKLEFTROWU)
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mov(var(k_left), rsi) // i = k_left;
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test(rsi, rsi) // check i via logical AND.
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je(.DDONE) // if i == 0, we're done; jump to end.
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// else, we prepare to enter k_left loop.
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label(.DKLEFTROWU) // EDGE LOOP (k_left)
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vmovupd(mem(rax, 0), zmm6 MASK_(k(2)) MASK_(z))
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vmovupd(mem(rax, r8, 1, 0), zmm8 MASK_(k(2)) MASK_(z))
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vmovupd(mem(rax, r8, 2, 0), zmm10 MASK_(k(2)) MASK_(z))
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vmovupd(mem(rax, r12, 1, 0), zmm12 MASK_(k(2)) MASK_(z))
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vmovupd(mem(rax, r8, 4, 0), zmm14 MASK_(k(2)) MASK_(z))
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vmovupd(mem(rax, rcx, 1, 0), zmm16 MASK_(k(2)) MASK_(z))
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vmovupd(mem(rax, r12, 2, 0), zmm18 MASK_(k(2)) MASK_(z))
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vmovupd(mem(rax, rdx, 1, 0), zmm20 MASK_(k(2)) MASK_(z))
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UNPACK_LO_HIGH(8, 6, 0, 1, 12, 10, 2, 3)
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SHUFFLE_DATA(2, 0, 4, 5, 3, 1, 30, 31)
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UNPACK_LO_HIGH(16, 14, 0, 1, 20, 18, 2, 3)
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SHUFFLE_DATA(2, 0, 6, 8, 3, 1, 10, 12)
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SHUFFLE_DATA(6, 4, 0, 1, 8, 5, 2, 3)
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SHUFFLE_DATA(10, 30, 4, 5, 12, 31, 6, 8)
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cmp(imm(7), rsi)
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JZ(.UPDATE7L1)
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cmp(imm(6), rsi)
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JZ(.UPDATE6L1)
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cmp(imm(5), rsi)
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JZ(.UPDATE5L1)
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cmp(imm(4), rsi)
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JZ(.UPDATE4L1)
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cmp(imm(3), rsi)
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JZ(.UPDATE3L1)
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cmp(imm(2), rsi)
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JZ(.UPDATE2L1)
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cmp(imm(1), rsi)
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JZ(.UPDATE1L1)
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cmp(imm(0), rsi)
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JZ(.UPDATEDONE)
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LABEL(.UPDATE7L1)
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vmovupd(zmm0, mem(rbx, 0*64))
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vmovupd(zmm4, mem(rbx, 1*64))
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vmovupd(zmm2, mem(rbx, 2*64))
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vmovupd(zmm6, mem(rbx, 3*64))
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vmovupd(zmm1, mem(rbx, 4*64))
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vmovupd(zmm5, mem(rbx, 5*64))
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vmovupd(zmm3, mem(rbx, 6*64))
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jmp(.UPDATEDONE)
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LABEL(.UPDATE6L1)
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vmovupd(zmm0, mem(rbx, 0*64))
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vmovupd(zmm4, mem(rbx, 1*64))
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vmovupd(zmm2, mem(rbx, 2*64))
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vmovupd(zmm6, mem(rbx, 3*64))
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vmovupd(zmm1, mem(rbx, 4*64))
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vmovupd(zmm5, mem(rbx, 5*64))
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jmp(.UPDATEDONE) // jump to end.
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LABEL(.UPDATE5L1)
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vmovupd(zmm0, mem(rbx, 0*64))
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vmovupd(zmm4, mem(rbx, 1*64))
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vmovupd(zmm2, mem(rbx, 2*64))
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vmovupd(zmm6, mem(rbx, 3*64))
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vmovupd(zmm1, mem(rbx, 4*64))
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jmp(.UPDATEDONE)
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LABEL(.UPDATE4L1)
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vmovupd(zmm0, mem(rbx, 0*64))
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vmovupd(zmm4, mem(rbx, 1*64))
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vmovupd(zmm2, mem(rbx, 2*64))
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vmovupd(zmm6, mem(rbx, 3*64))
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jmp(.UPDATEDONE)
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LABEL(.UPDATE3L1)
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vmovupd(zmm0, mem(rbx, 0*64))
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vmovupd(zmm4, mem(rbx, 1*64))
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vmovupd(zmm2, mem(rbx, 2*64))
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jmp(.UPDATEDONE)
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LABEL(.UPDATE2L1)
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vmovupd(zmm0, mem(rbx, 0*64))
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vmovupd(zmm4, mem(rbx, 1*64))
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jmp(.UPDATEDONE)
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LABEL(.UPDATE1L1)
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vmovupd(zmm0, mem(rbx, 0*64))
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jmp(.UPDATEDONE)
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LABEL(.UPDATEDONE)
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jmp(.DDONE) // jump to end.
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// -- kappa unit, column storage on A -----------------------------------------
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label(.DCOLUNIT)
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mov(var(a_next), rcx)
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mov(var(ldp), r8) // load lda
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lea(mem(, r8, 8), r8) // inca *= sizeof(double)
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mov(var(k_iter), rsi) // i = k_iter;
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test(rsi, rsi) // check i via logical AND.
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je(.DCONKLEFTCOLU) // if i == 0, jump to code that
|
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// contains the k_left loop.
|
||||
|
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label(.DKITERCOLU) // MAIN LOOP (k_iter)
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vmovupd(mem(rax, 0), zmm6)
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vmovupd(zmm6, mem(rbx))
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add(r10, rax)
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add(r8, rbx)
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vmovupd(mem(rax, 0), zmm6)
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vmovupd(zmm6, mem(rbx,))
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add(r10, rax)
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add(r8, rbx)
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vmovupd(mem(rax, 0), zmm6)
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vmovupd(zmm6, mem(rbx))
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add(r10, rax)
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add(r8, rbx)
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|
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vmovupd(mem(rax, 0), zmm6)
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vmovupd(zmm6, mem(rbx))
|
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|
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add(r10, rax)
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add(r8, rbx)
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vmovupd(mem(rax, 0), zmm6)
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vmovupd(zmm6, mem(rbx))
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add(r10, rax)
|
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add(r8, rbx)
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vmovupd(mem(rax, 0), zmm6)
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vmovupd(zmm6, mem(rbx))
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|
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add(r10, rax)
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add(r8, rbx)
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||||
|
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vmovupd(mem(rax, 0), zmm6)
|
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vmovupd(zmm6, mem(rbx))
|
||||
|
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add(r10, rax)
|
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add(r8, rbx)
|
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|
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vmovupd(mem(rax, 0), zmm6)
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vmovupd(zmm6, mem(rbx))
|
||||
|
||||
add(r10, rax)
|
||||
add(r8, rbx)
|
||||
|
||||
dec(rsi) // i -= 1;
|
||||
jne(.DKITERCOLU) // iterate again if i != 0.
|
||||
|
||||
label(.DCONKLEFTCOLU)
|
||||
|
||||
mov(var(k_left), rsi) // i = k_left;
|
||||
test(rsi, rsi) // check i via logical AND.
|
||||
je(.DDONE) // if i == 0, we're done; jump to end.
|
||||
// else, we prepare to enter k_left loop.
|
||||
label(.DKLEFTCOLU) // EDGE LOOP (k_left)
|
||||
|
||||
vmovupd(mem(rax, 0), zmm6)
|
||||
vmovupd(zmm6, mem(rbx))
|
||||
|
||||
add(r10, rax)
|
||||
add(r8, rbx)
|
||||
|
||||
dec(rsi) // i -= 1;
|
||||
jne(.DKLEFTCOLU) // iterate again if i != 0.
|
||||
|
||||
label(.DDONE)
|
||||
|
||||
end_asm(
|
||||
: // output operands (none)
|
||||
: // input operands
|
||||
[mask] "m" (mask),
|
||||
[k_iter] "m" (k_iter),
|
||||
[k_left] "m" (k_left),
|
||||
[a] "m" (a),
|
||||
[inca] "m" (inca),
|
||||
[lda] "m" (lda),
|
||||
[p] "m" (p),
|
||||
[ldp] "m" (ldp),
|
||||
[kappa] "m" (kappa),
|
||||
[a_next] "m" (a_next)
|
||||
: // register clobber list
|
||||
"rax", "rbx", "rcx", "rdx", "rsi",
|
||||
"r8", "r10", "r12", "r13",
|
||||
"zmm0", "zmm1", "zmm2", "zmm3",
|
||||
"zmm4", "zmm5", "zmm6", "zmm7",
|
||||
"zmm8", "zmm9", "zmm10", "zmm11",
|
||||
"zmm12", "zmm13", "zmm14", "zmm15",
|
||||
"memory"
|
||||
)
|
||||
}
|
||||
else // if ( cdim0 < mnr || gs || !unitk )
|
||||
{
|
||||
PASTEMAC(dscal2m,BLIS_TAPI_EX_SUF)
|
||||
(
|
||||
0,
|
||||
BLIS_NONUNIT_DIAG,
|
||||
BLIS_DENSE,
|
||||
( trans_t )conja,
|
||||
cdim0,
|
||||
k0,
|
||||
kappa,
|
||||
a, inca0, lda0,
|
||||
p, 1, ldp0,
|
||||
cntx,
|
||||
NULL
|
||||
);
|
||||
|
||||
if ( cdim0 < mnr )
|
||||
{
|
||||
// Handle zero-filling along the "long" edge of the micropanel.
|
||||
|
||||
const dim_t i = cdim0;
|
||||
const dim_t m_edge = mnr - cdim0;
|
||||
const dim_t n_edge = k0_max;
|
||||
double* restrict p_edge = p + (i )*1;
|
||||
|
||||
bli_dset0s_mxn
|
||||
(
|
||||
m_edge,
|
||||
n_edge,
|
||||
p_edge, 1, ldp
|
||||
);
|
||||
}
|
||||
}
|
||||
if ( k0 < k0_max )
|
||||
{
|
||||
// Handle zero-filling along the "short" (far) edge of the micropanel.
|
||||
|
||||
const dim_t j = k0;
|
||||
const dim_t m_edge = mnr;
|
||||
const dim_t n_edge = k0_max - k0;
|
||||
double* restrict p_edge = p + (j )*ldp;
|
||||
|
||||
bli_dset0s_mxn
|
||||
(
|
||||
m_edge,
|
||||
n_edge,
|
||||
p_edge, 1, ldp
|
||||
);
|
||||
}
|
||||
}
|
||||
@@ -45,6 +45,7 @@ GEMMTRSM_UKR_PROT( double, d, gemmtrsm_u_zen4_asm_8x24)
|
||||
|
||||
//packing kernels
|
||||
PACKM_KER_PROT( double, d, packm_zen4_asm_16xk )
|
||||
PACKM_KER_PROT( double, d, packm_zen4_asm_8xk )
|
||||
PACKM_KER_PROT( double, d, packm_zen4_asm_24xk )
|
||||
PACKM_KER_PROT( double, d, packm_zen4_asm_32xk )
|
||||
PACKM_KER_PROT( double, d, packm_32xk_zen4_ref )
|
||||
|
||||
Reference in New Issue
Block a user