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Merge "SUP GEMM - Enable only block panel (var2m)" into amd-staging-milan-3.1
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@@ -47,9 +47,20 @@ err_t bli_gemmsup_int
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)
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{
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AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_4);
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// AOCL_DTL_LOG_GEMM_INPUTS(AOCL_DTL_LEVEL_TRACE_4, alpha, a, b, beta, c);
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#if 0
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#ifdef BLIS_CONFIG_EPYC
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const num_t dt = bli_obj_dt( c );
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const dim_t m = bli_obj_length( c );
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const dim_t n = bli_obj_width( c );
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const dim_t MR = bli_cntx_get_blksz_def_dt( dt, BLIS_MR, cntx );
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const dim_t NR = bli_cntx_get_blksz_def_dt( dt, BLIS_NR, cntx );
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const bool auto_factor = bli_rntm_auto_factor( rntm );
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const dim_t n_threads = bli_rntm_num_threads( rntm );
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dim_t jc_new;
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dim_t ic_new;
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//bli_gemmsup_ref_var2
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//bli_gemmsup_ref_var1
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#if 0
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@@ -61,23 +72,82 @@ err_t bli_gemmsup_int
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stor_id == BLIS_RRC ||
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stor_id == BLIS_RCR ||
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stor_id == BLIS_CRR );
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#ifdef TRACEVAR
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if ( bli_thread_am_ochief( thread ) )
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printf( "bli_l3_sup_int(): var2m primary\n" );
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#endif
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// Don't use the small/unpacked implementation if one of the matrices
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// uses general stride.
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if ( stor_id == BLIS_XXX ) {
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AOCL_DTL_TRACE_EXIT_ERR(AOCL_DTL_LEVEL_TRACE_4, "SUP doesn't support general stide.");
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return BLIS_FAILURE;
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}
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if ( is_rrr_rrc_rcr_crr )
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{
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bli_gemmsup_ref_var2m
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(
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BLIS_NO_TRANSPOSE, alpha, a, b, beta, c, stor_id, cntx, rntm
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);
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// This branch handles:
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// - rrr rrc rcr crr for row-preferential kernels
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// - rcc crc ccr ccc for column-preferential kernels
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// - Currently only row-preferential kernels are only supported.
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// calculate number of micropanels in m and n dimensions and
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// recalculate the automatic thread factorization based on these number of micropanels
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const dim_t mu = m / MR;
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const dim_t nu = n / NR;
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// If the parallel thread factorization was automatic, we update it
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// with a new factorization based on the matrix dimensions in units
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// of micropanels.
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if ( auto_factor )
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{
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// In the block-panel algorithm, the m dimension is parallelized
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// with ic_nt and the n dimension is parallelized with jc_nt.
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bli_thread_partition_2x2( n_threads, mu, nu, &ic_new, &jc_new );
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// Update the ways of parallelism for the jc and ic loops, and then
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// update the current thread's root thrinfo_t node according to the
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// new ways of parallelism value for the jc loop.
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bli_rntm_set_ways_only( jc_new, 1, ic_new, 1, 1, rntm );
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bli_l3_sup_thrinfo_update_root( rntm, thread );
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}
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bli_gemmsup_ref_var2m( BLIS_NO_TRANSPOSE,
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alpha, a, b, beta, c,
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stor_id, cntx, rntm, thread );
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}
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else
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{
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bli_gemmsup_ref_var2m
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(
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BLIS_TRANSPOSE, alpha, a, b, beta, c, stor_id, cntx, rntm
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);
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// This branch handles:
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// - rrr rrc rcr crr for column-preferential kernels
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// - rcc crc ccr ccc for row-preferential kernels
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// - Currently only row-preferential kernels are only supported.
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const dim_t mu = n / MR; // the n becomes m after a transposition
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const dim_t nu = m / NR; // the m becomes n after a transposition
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if ( auto_factor )
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{
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// In the block-panel algorithm, the m dimension is parallelized
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// with ic_nt and the n dimension is parallelized with jc_nt.
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bli_thread_partition_2x2( n_threads, mu, nu, &ic_new, &jc_new );
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// Update the ways of parallelism for the jc and ic loops, and then
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// update the current thread's root thrinfo_t node according to the
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// new ways of parallelism value for the jc loop.
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bli_rntm_set_ways_only( jc_new, 1, ic_new, 1, 1, rntm );
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bli_l3_sup_thrinfo_update_root( rntm, thread );
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}
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bli_gemmsup_ref_var2m( BLIS_TRANSPOSE,
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alpha, a, b, beta, c,
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stor_id, cntx, rntm, thread );
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}
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AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_4);
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return BLIS_SUCCESS;
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#endif
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#else // #ifdef BLIS_CONFIG_EPYC
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const stor3_t stor_id = bli_obj_stor3_from_strides( c, a, b );
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@@ -92,6 +162,7 @@ err_t bli_gemmsup_int
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stor_id == BLIS_RRC ||
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stor_id == BLIS_RCR ||
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stor_id == BLIS_CRR );
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const bool is_rcc_crc_ccr_ccc = !is_rrr_rrc_rcr_crr;
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const num_t dt = bli_obj_dt( c );
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@@ -110,7 +181,6 @@ err_t bli_gemmsup_int
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dim_t jc_new;
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dim_t ic_new;
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if ( is_primary )
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{
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// This branch handles:
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@@ -252,6 +322,8 @@ err_t bli_gemmsup_int
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// Return success so that the caller knows that we computed the solution.
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AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_4)
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return BLIS_SUCCESS;
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#endif
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}
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// -----------------------------------------------------------------------------
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