Arnav Sharma 393effbb0c Optimized ZAXPY2V using AVX2 Intrinsics ...

Details:
- Intrinsic implementation of ZAXPY2V fused kernel for AVX2
- Updated definitions in zen contexts

AMD-Internal: [CPUPL-2023]
Change-Id: I8889ae08c826d26e66ae607c416c4282136937fa

2022-05-17 18:08:57 +05:30

..

armsve

New kernel set for Arm SVE using assembly (#396)

2020-05-21 11:56:45 +05:30

armv7a

Squash-merge 'pr' into 'squash'. (#457)

2020-11-14 09:39:48 -06:00

armv8a

avoid loading twice in armv8a gemm kernel (#403)

2020-05-21 12:37:53 +05:30

bgq

Replaced use of bool_t type with C99 bool.

2020-08-03 11:27:13 +05:30

bulldozer

Remove UT-Austin from copyright headers' clause 3.

2018-12-04 14:31:06 -06:00

generic

Added a dummy file to kernels/generic.

2017-11-21 12:34:20 -06:00

haswell

BLIS : Compiler warning fixes

2021-11-12 08:58:52 +05:30

knc

Remove UT-Austin from copyright headers' clause 3.

2018-12-04 14:31:06 -06:00

knl

Type saga continues; fixed sgemm ukernel signature.

2020-09-12 17:48:15 -05:00

old

Remove UT-Austin from copyright headers' clause 3.

2018-12-04 14:31:06 -06:00

penryn

Optionally disable trsm diagonal pre-inversion.

2020-12-04 16:08:15 -06:00

piledriver

BLIS library porting on to Windows:

2020-06-16 18:29:00 +05:30

power7

Remove UT-Austin from copyright headers' clause 3.

2018-12-04 14:31:06 -06:00

power9

Add POWER10 support to BLIS (#450)

2020-09-29 16:52:18 -05:00

power10

Fixed bug in power10 microkernel I/O. (#488)

2021-03-30 19:07:42 -05:00

sandybridge

Remove UT-Austin from copyright headers' clause 3.

2018-12-04 14:31:06 -06:00

skx

Remove UT-Austin from copyright headers' clause 3.

2018-12-04 14:31:06 -06:00

zen

Optimized ZAXPY2V using AVX2 Intrinsics

2022-05-17 18:08:57 +05:30

zen2

BLIS:merge:

2021-04-27 11:09:48 +05:30

zen3

Added support for zen3 configuration

2020-07-22 18:24:26 +05:30

zen4

Added support for zen4 architecture

2021-11-23 10:29:15 +05:30

CMakeLists.txt

AOCL Windows: 3.1 BLIS changes

2021-03-08 19:04:17 +05:30