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Details: - The batch matmul performs a series of matmuls, processing more than one GEMM problem at once. - Introduced a new parameter called batch_size for the user to indicate number of GEMM problems in a batch/group. - This operation supports processing GEMM problems with different parameters including dims,post-ops,stor-schemes etc., - This operation is optimized for problems where all the GEMMs in a batch are of same size and shape. - For now, the threads are distributed among different GEMM problems equally irrespective of their dimensions which leads to better performance for batches with identical GEMMs but performs sub-optimally for batches with non-identical GEMMs. - Optimizations for batches with non-identical GEMMs is in progress. - Added bench and input files for batch_matmul. AMD-Internal: [SWLCSG-2944] Change-Id: Idc59db5b8c5794bf19f6f86bcb8455cd2599c155
480 lines
13 KiB
C
480 lines
13 KiB
C
/*
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BLIS
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An object-based framework for developing high-performance BLAS-like
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libraries.
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Copyright (C) 2025, Advanced Micro Devices, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name(s) of the copyright holder(s) nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "blis.h"
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#include "aocl_gemm_interface_apis.h"
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#include "aocl_gemm_check.h"
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#include "lpgemm_types.h"
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#include "lpgemm_post_ops.h"
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#include "lpgemm_thread_decor_openmp.h"
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#include "lpgemm_5loop_interface_apis.h"
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#include "lpgemm_config.h"
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#include "lpgemm_utils.h"
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AOCL_BGEMM_MATMUL(bfloat16,bfloat16,float,float,bf16bf16f32of32)
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{
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// Check if avx512_vnni ISA is supported, lpgemm matmul only works with it.
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if ( bli_cpuid_is_avx512bf16_supported() == FALSE )
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{
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bli_print_msg(" AVX512_BF16 ISA not supported by processor, "
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"cannot perform bf16bf16f32 gemm.", __FILE__, __LINE__ );
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return; // Error.
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}
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/* Initialize BLIS. */
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bli_init_auto();
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// Set MC, NC, KC, NR, MR.
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aocl_lpgemm_init_global_cntx();
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#ifdef LPGEMM_BF16_JIT
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if( jit_kernels_generated == FALSE )
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{
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bli_print_msg(" Could not generate bf16bf16f32of32 "
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" kernels using JIT.", __FILE__, __LINE__ );
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return;
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}
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#endif
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trans_t blis_transa;
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trans_t blis_transb;
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inc_t rs_a[batch_size];
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inc_t cs_a[batch_size];
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inc_t rs_b[batch_size];
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inc_t cs_b[batch_size];
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inc_t rs_c[batch_size];
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inc_t cs_c[batch_size];
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AOCL_MEMORY_TAG mtag_a[batch_size];
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AOCL_MEMORY_TAG mtag_b[batch_size];
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bfloat16 *a_local[batch_size], *b_local[batch_size];
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dim_t m_local[batch_size], n_local[batch_size];
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// Convert post op struct to post op linked list format.
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lpgemm_post_op post_op_list[batch_size][AOCL_MAX_POST_OPS];
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for( dim_t bs_i = 0; bs_i < batch_size; bs_i++ )
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{
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// check for validity of params.
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AOCL_BATCH_GEMM_CHECK
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(
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"batch_bf16bf16f32of32",
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order[bs_i], transa[bs_i], transb[bs_i],
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bs_i,
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m[bs_i], n[bs_i], k[bs_i],
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a[bs_i], lda[bs_i], mem_format_a[bs_i],
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b[bs_i], ldb[bs_i], mem_format_b[bs_i],
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c[bs_i], ldc[bs_i]
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);
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/* Map BLAS chars to their corresponding BLIS enumerated type value. */
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bli_param_map_netlib_to_blis_trans( transa[bs_i], &blis_transa );
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bli_param_map_netlib_to_blis_trans( transb[bs_i], &blis_transb );
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bool is_column_major = ( ( order[bs_i] == 'c' ) || ( order[bs_i] == 'C' ) );
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if( is_column_major == TRUE )
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{
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rs_a[bs_i] = ldb[bs_i];
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cs_a[bs_i] = 1;
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if( bli_is_trans( blis_transb ) )
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{
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rs_a[bs_i] = 1;
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cs_a[bs_i] = ldb[bs_i];
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}
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rs_b[bs_i] = lda[bs_i];
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cs_b[bs_i] = 1;
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if( bli_is_trans( blis_transa ) )
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{
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rs_b[bs_i] = 1;
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cs_b[bs_i] = lda[bs_i];
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}
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bli_param_map_char_to_lpmtag( mem_format_a[bs_i], &(mtag_b[bs_i]) );
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bli_param_map_char_to_lpmtag( mem_format_b[bs_i], &(mtag_a[bs_i]) );
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// Inputs swapped in column major, A becomes B from kernel point of view.
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// Reorder is not supported for column major matrices.
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if ( ( ( mtag_b[bs_i] == REORDERED ) || ( mtag_a[bs_i] == REORDERED ) ) )
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{
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bli_print_msg(" Reordering of column major matrices is not supported.", __FILE__, __LINE__ );
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return;
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}
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// From 5-loop function point of view,
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// A matrix when in column major storage needs to be packed to row-major
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// storage as kernel expects A matrix to be in row-major format.
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// Inputs swapped in column major, A becomes B from kernel point of view.
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if ( bli_is_trans(blis_transb ) )
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{
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mtag_a[bs_i] = PACK;
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}
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// swap m & n in case of col-major matrices
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m_local[bs_i] = n[bs_i];
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n_local[bs_i] = m[bs_i];
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// swap a & b pointers in case of col-major matrices
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a_local[bs_i] = (bfloat16*)(b[bs_i]);
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b_local[bs_i] = (bfloat16*)(a[bs_i]);
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}
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else // row-major
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{
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rs_a[bs_i] = lda[bs_i];
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cs_a[bs_i] = 1;
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if( bli_is_trans( blis_transa ) )
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{
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rs_a[bs_i] = 1;
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cs_a[bs_i] = lda[bs_i];
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}
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rs_b[bs_i] = ldb[bs_i];
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cs_b[bs_i] = 1;
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if( bli_is_trans( blis_transb ) )
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{
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rs_b[bs_i] = 1;
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cs_b[bs_i] = ldb[bs_i];
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}
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bli_param_map_char_to_lpmtag( mem_format_a[bs_i], &(mtag_a[bs_i]) );
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bli_param_map_char_to_lpmtag( mem_format_b[bs_i], &(mtag_b[bs_i]) );
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// Reorder is not supported for A matrix
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if( mtag_a[bs_i] == REORDERED )
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{
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bli_print_msg(" Reordering of A matrix is not supported in row major case.", __FILE__, __LINE__ );
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return;
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}
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// From 5-loop function point of view,
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// A matrix when in column major storage needs to be packed to row-major
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// storage as kernel expects A matrix to be in row-major format.
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if( bli_is_trans(blis_transa ) )
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{
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mtag_a[bs_i] = PACK;
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}
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// copy the values of m & n
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m_local[bs_i] = m[bs_i];
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n_local[bs_i] = n[bs_i];
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// copy the values of a & b pointers
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a_local[bs_i] = (bfloat16*)(a[bs_i]);
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b_local[bs_i] = (bfloat16*)(b[bs_i]);
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}
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rs_c[bs_i] = ldc[bs_i];
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cs_c[bs_i] = 1;
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// From 5-loop function point of view
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// B matrix needs to be packed in a certain format in order to be loaded
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// and used in bf16 instrution. As such the mtag_b always needs to be either
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// packed or reordered. B matrix as it is (unpacked) cannot be used, and
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// the mtag_b is set to packed to enable runtime packing.
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if ( mtag_b[bs_i] == UNPACKED )
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{
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mtag_b[bs_i] = PACK;
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}
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err_t err = lpgemm_translate_to_post_ops_list
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(
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post_op_unparsed[bs_i], post_op_list[bs_i],
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( void* )c[bs_i], ( void* )( (order + bs_i) ),
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m[bs_i], n[bs_i]
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);
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if( err != BLIS_SUCCESS ) return;
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}
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// Initialize a local runtime with global settings if necessary. Note
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// that in the case that a runtime is passed in, we make a local copy.
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rntm_t rntm_g;
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bli_rntm_init_from_global( &rntm_g );
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bli_pba_rntm_set_pba( &rntm_g );
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lpgemm_cntx_t* lcntx_g = lpgemm_get_global_cntx_obj( BF16BF16F32OF32 );
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#ifdef BLIS_ENABLE_OPENMP
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batch_lpgemm_bf16bf16f32of32_openmp_thread_decorator
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(
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batch_size, m_local, n_local, k,
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(const bfloat16**)a_local, rs_a, cs_a, mtag_a,
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(const bfloat16**)b_local, rs_b, cs_b, mtag_b,
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c, rs_c, cs_c,
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alpha, beta,
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&rntm_g, lcntx_g,
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post_op_list, F32
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);
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#else
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batch_lpgemm_bf16bf16f32of32_thread_decorator
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(
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batch_size, m_local, n_local, k,
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(const bfloat16**)a_local, rs_a, cs_a, mtag_a,
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(const bfloat16**)b_local, rs_b, cs_b, mtag_b,
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c, rs_c, cs_c,
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alpha, beta,
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&rntm_g, lcntx_g,
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post_op_list, F32
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);
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#endif
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}
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AOCL_BGEMM_MATMUL(bfloat16,bfloat16,bfloat16,float,bf16bf16f32obf16)
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{
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// Check if avx512_vnni ISA is supported, lpgemm matmul only works with it.
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if ( bli_cpuid_is_avx512bf16_supported() == FALSE )
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{
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bli_print_msg(" AVX512_BF16 ISA not supported by processor, "
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"cannot perform bf16bf16f32 gemm.", __FILE__, __LINE__ );
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return; // Error.
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}
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/* Initialize BLIS. */
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bli_init_auto();
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// Set MC, NC, KC, NR, MR.
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aocl_lpgemm_init_global_cntx();
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#ifdef LPGEMM_BF16_JIT
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if( jit_kernels_generated == FALSE )
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{
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bli_print_msg(" Could not generate bf16bf16f32of32 "
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" kernels using JIT.", __FILE__, __LINE__ );
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return;
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}
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#endif
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trans_t blis_transa;
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trans_t blis_transb;
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inc_t rs_a[batch_size];
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inc_t cs_a[batch_size];
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inc_t rs_b[batch_size];
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inc_t cs_b[batch_size];
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inc_t rs_c[batch_size];
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inc_t cs_c[batch_size];
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AOCL_MEMORY_TAG mtag_a[batch_size];
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AOCL_MEMORY_TAG mtag_b[batch_size];
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bfloat16 *a_local[batch_size], *b_local[batch_size];
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dim_t m_local[batch_size], n_local[batch_size];
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// Convert post op struct to post op linked list format.
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lpgemm_post_op post_op_list[batch_size][AOCL_MAX_POST_OPS];
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for( dim_t bs_i = 0; bs_i < batch_size; bs_i++ )
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{
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// check for validity of params.
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AOCL_BATCH_GEMM_CHECK
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(
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"batch_bf16bf16f32obf16",
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order[bs_i], transa[bs_i], transb[bs_i],
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bs_i,
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m[bs_i], n[bs_i], k[bs_i],
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a[bs_i], lda[bs_i], mem_format_a[bs_i],
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b[bs_i], ldb[bs_i], mem_format_b[bs_i],
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c[bs_i], ldc[bs_i]
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);
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/* Map BLAS chars to their corresponding BLIS enumerated type value. */
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bli_param_map_netlib_to_blis_trans( transa[bs_i], &blis_transa );
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bli_param_map_netlib_to_blis_trans( transb[bs_i], &blis_transb );
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bool is_column_major = ( ( order[bs_i] == 'c' ) || ( order[bs_i] == 'C' ) );
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if( is_column_major == TRUE )
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{
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rs_a[bs_i] = ldb[bs_i];
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cs_a[bs_i] = 1;
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if( bli_is_trans( blis_transb ) )
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{
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rs_a[bs_i] = 1;
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cs_a[bs_i] = ldb[bs_i];
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}
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rs_b[bs_i] = lda[bs_i];
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cs_b[bs_i] = 1;
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if( bli_is_trans( blis_transa ) )
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{
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rs_b[bs_i] = 1;
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cs_b[bs_i] = lda[bs_i];
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}
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bli_param_map_char_to_lpmtag( mem_format_a[bs_i], &(mtag_b[bs_i]) );
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bli_param_map_char_to_lpmtag( mem_format_b[bs_i], &(mtag_a[bs_i]) );
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// Inputs swapped in column major, A becomes B from kernel point of view.
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// Reorder is not supported for column major matrices.
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if ( ( ( mtag_b[bs_i] == REORDERED ) || ( mtag_a[bs_i] == REORDERED ) ) )
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{
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bli_print_msg(" Reordering of column major matrices is not supported.", __FILE__, __LINE__ );
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return;
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}
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// From 5-loop function point of view,
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// A matrix when in column major storage needs to be packed to row-major
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// storage as kernel expects A matrix to be in row-major format.
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// Inputs swapped in column major, A becomes B from kernel point of view.
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if ( bli_is_trans(blis_transb ) )
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{
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mtag_a[bs_i] = PACK;
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}
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// swap m & n in case of col-major matrices
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m_local[bs_i] = n[bs_i];
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n_local[bs_i] = m[bs_i];
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// swap a & b pointers in case of col-major matrices
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a_local[bs_i] = (bfloat16*)(b[bs_i]);
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b_local[bs_i] = (bfloat16*)(a[bs_i]);
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}
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else // row-major
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{
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rs_a[bs_i] = lda[bs_i];
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cs_a[bs_i] = 1;
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if( bli_is_trans( blis_transa ) )
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{
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rs_a[bs_i] = 1;
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cs_a[bs_i] = lda[bs_i];
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}
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rs_b[bs_i] = ldb[bs_i];
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cs_b[bs_i] = 1;
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if( bli_is_trans( blis_transb ) )
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{
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rs_b[bs_i] = 1;
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cs_b[bs_i] = ldb[bs_i];
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}
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bli_param_map_char_to_lpmtag( mem_format_a[bs_i], &(mtag_a[bs_i]) );
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bli_param_map_char_to_lpmtag( mem_format_b[bs_i], &(mtag_b[bs_i]) );
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// Reorder is not supported for A matrix
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if( mtag_a[bs_i] == REORDERED )
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{
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bli_print_msg(" Reordering of A matrix is not supported in row major case.", __FILE__, __LINE__ );
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return;
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}
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// From 5-loop function point of view,
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// A matrix when in column major storage needs to be packed to row-major
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// storage as kernel expects A matrix to be in row-major format.
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if( bli_is_trans(blis_transa ) )
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{
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mtag_a[bs_i] = PACK;
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}
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// copy the values of m & n
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m_local[bs_i] = m[bs_i];
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n_local[bs_i] = n[bs_i];
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// copy the values of a & b pointers
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a_local[bs_i] = (bfloat16*)(a[bs_i]);
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b_local[bs_i] = (bfloat16*)(b[bs_i]);
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}
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rs_c[bs_i] = ldc[bs_i];
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cs_c[bs_i] = 1;
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// From 5-loop function point of view
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// B matrix needs to be packed in a certain format in order to be loaded
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// and used in bf16 instrution. As such the mtag_b always needs to be either
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// packed or reordered. B matrix as it is (unpacked) cannot be used, and
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// the mtag_b is set to packed to enable runtime packing.
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if ( mtag_b[bs_i] == UNPACKED )
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{
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mtag_b[bs_i] = PACK;
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}
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err_t err = lpgemm_translate_to_post_ops_list
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(
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post_op_unparsed[bs_i], post_op_list[bs_i],
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( void* )c[bs_i], ( void* )( (order + bs_i) ),
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m[bs_i], n[bs_i]
|
|
);
|
|
|
|
if( err != BLIS_SUCCESS ) return;
|
|
|
|
}
|
|
|
|
// Initialize a local runtime with global settings if necessary. Note
|
|
// that in the case that a runtime is passed in, we make a local copy.
|
|
rntm_t rntm_g;
|
|
bli_rntm_init_from_global( &rntm_g );
|
|
bli_pba_rntm_set_pba( &rntm_g );
|
|
|
|
lpgemm_cntx_t* lcntx_g = lpgemm_get_global_cntx_obj( BF16BF16F32OF32 );
|
|
|
|
#ifdef BLIS_ENABLE_OPENMP
|
|
batch_lpgemm_bf16bf16f32of32_openmp_thread_decorator
|
|
(
|
|
batch_size, m_local, n_local, k,
|
|
(const bfloat16**)a_local, rs_a, cs_a, mtag_a,
|
|
(const bfloat16**)b_local, rs_b, cs_b, mtag_b,
|
|
(float**)c, rs_c, cs_c,
|
|
alpha, beta,
|
|
&rntm_g, lcntx_g,
|
|
post_op_list, BF16
|
|
);
|
|
|
|
|
|
#else
|
|
batch_lpgemm_bf16bf16f32of32_thread_decorator
|
|
(
|
|
batch_size, m_local, n_local, k,
|
|
(const bfloat16**)a_local, rs_a, cs_a, mtag_a,
|
|
(const bfloat16**)b_local, rs_b, cs_b, mtag_b,
|
|
(float**)c, rs_c, cs_c,
|
|
alpha, beta,
|
|
&rntm_g, lcntx_g,
|
|
post_op_list, BF16
|
|
);
|
|
#endif
|
|
}
|