mirror of
https://github.com/amd/blis.git
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82bdf7c8c7
- Standardize formatting (spacing etc). - Add full copyright to cmake files (excluding .json) - Correct copyright and disclaimer text for frame and zen, skx and a couple of other kernels to cover all contributors, as is commonly used in other files. - Fixed some typos and missing lines in copyright statements. AMD-Internal: [CPUPL-4415] Change-Id: Ib248bb6033c4d0b408773cf0e2a2cda6c2a74371
115 lines
3.8 KiB
C
115 lines
3.8 KiB
C
/*
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BLIS
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An object-based framework for developing high-performance BLAS-like
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libraries.
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Copyright (C) 2023 - 2024, Advanced Micro Devices, Inc. All rights reserved.
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name(s) of the copyright holder(s) nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include "blis.h"
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#include "aocl_util_interface_apis.h"
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#include "lpgemm_types.h"
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#include "lpgemm_config.h"
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#include "lpgemm_utils_kernels.h"
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AOCL_UTIL_L1_OP(float,gelu_tanh_f32)
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{
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// Check if AVX2 ISA is supported, lpgemm u8s8s16os16 matmul only works with it.
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if ( bli_cpuid_is_avx2fma3_supported() == FALSE )
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{
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bli_print_msg(" AVX2 ISA not supported by processor, AOCL GEMM "
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"utility l1 operations not supported.", __FILE__, __LINE__ );
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return; // Error.
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}
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/* Initialize BLIS. */
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bli_init_auto();
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// Set MC, NC, KC, NR, MR.
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aocl_lpgemm_init_global_cntx();
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if ( ( n <= 0 ) || ( x == NULL ) || ( incx <= 0 ) )
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{
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return; // Error.
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}
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lpgemm_util_cntx_t* lutil_cntx_g = lpgemm_util_get_global_cntx_obj( F32_GELU_TANH );
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( ( lpgemm_util_l1_op_f32_kernel_t )lutil_cntx_g->kern_fun_ptr )( n, x, incx );
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}
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AOCL_UTIL_L1_OP(float,gelu_erf_f32)
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{
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// Check if AVX2 ISA is supported, lpgemm u8s8s16os16 matmul only works with it.
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if ( bli_cpuid_is_avx2fma3_supported() == FALSE )
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{
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bli_print_msg(" AVX2 ISA not supported by processor, AOCL GEMM "
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"utility l1 operations not supported.", __FILE__, __LINE__ );
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return; // Error.
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}
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/* Initialize BLIS. */
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bli_init_auto();
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// Set MC, NC, KC, NR, MR.
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aocl_lpgemm_init_global_cntx();
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if ( ( n <= 0 ) || ( x == NULL ) || ( incx <= 0 ) )
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{
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return; // Error.
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}
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lpgemm_util_cntx_t* lutil_cntx_g = lpgemm_util_get_global_cntx_obj( F32_GELU_ERF );
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( ( lpgemm_util_l1_op_f32_kernel_t )lutil_cntx_g->kern_fun_ptr )( n, x, incx );
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}
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AOCL_UTIL_L1_OP(float,softmax_f32)
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{
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// Check if AVX2 ISA is supported, lpgemm u8s8s16os16 matmul only works with it.
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if ( bli_cpuid_is_avx2fma3_supported() == FALSE )
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{
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bli_print_msg(" AVX2 ISA not supported by processor, AOCL GEMM "
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"utility l1 operations not supported.", __FILE__, __LINE__ );
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return; // Error.
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}
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/* Initialize BLIS. */
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bli_init_auto();
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// Set MC, NC, KC, NR, MR.
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aocl_lpgemm_init_global_cntx();
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if ( ( n <= 0 ) || ( x == NULL ) || ( incx <= 0 ) )
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{
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return; // Error.
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}
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lpgemm_util_cntx_t* lutil_cntx_g = lpgemm_util_get_global_cntx_obj( F32_SOFTMAX );
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( ( lpgemm_util_l1_op_f32_kernel_t )lutil_cntx_g->kern_fun_ptr )( n, x, incx );
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}
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