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replaced it with a more all-encompassing "copyright holder(s)".
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213 lines
6.4 KiB
C
213 lines
6.4 KiB
C
/*
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BLIS
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An object-based framework for developing high-performance BLAS-like
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libraries.
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Copyright (C) 2014, The University of Texas at Austin
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Redistribution and use in source and binary forms, with or without
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modification, are permitted provided that the following conditions are
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met:
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- Redistributions of source code must retain the above copyright
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notice, this list of conditions and the following disclaimer.
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- Redistributions in binary form must reproduce the above copyright
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notice, this list of conditions and the following disclaimer in the
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documentation and/or other materials provided with the distribution.
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- Neither the name(s) of the copyright holder(s) nor the names of its
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contributors may be used to endorse or promote products derived
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from this software without specific prior written permission.
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THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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"AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
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A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
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HOLDER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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(INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
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OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef BLIS_KERNEL_H
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#define BLIS_KERNEL_H
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// -- LEVEL-3 MICRO-KERNEL CONSTANTS -------------------------------------------
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#define BLIS_SIMD_ALIGN_SIZE 16
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// -- Cache blocksizes --
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//
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// Constraints:
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//
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// (1) MC must be a multiple of:
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// (a) MR (for zero-padding purposes)
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// (b) NR (for zero-padding purposes when MR and NR are "swapped")
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// (2) NC must be a multiple of
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// (a) NR (for zero-padding purposes)
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// (b) MR (for zero-padding purposes when MR and NR are "swapped")
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//
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#define BLIS_DEFAULT_MC_S 256
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#define BLIS_DEFAULT_KC_S 256
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#define BLIS_DEFAULT_NC_S 8192
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#define BLIS_DEFAULT_MC_D 32
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#define BLIS_DEFAULT_KC_D 128
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#define BLIS_DEFAULT_NC_D 1024
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#define BLIS_DEFAULT_MC_C 128
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#define BLIS_DEFAULT_KC_C 256
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#define BLIS_DEFAULT_NC_C 4096
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#define BLIS_DEFAULT_MC_Z 64
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#define BLIS_DEFAULT_KC_Z 256
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#define BLIS_DEFAULT_NC_Z 2048
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// -- Register blocksizes --
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#define BLIS_DEFAULT_MR_S 8
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#define BLIS_DEFAULT_NR_S 4
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#define BLIS_DEFAULT_MR_D 4
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#define BLIS_DEFAULT_NR_D 4
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#define BLIS_DEFAULT_MR_C 8
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#define BLIS_DEFAULT_NR_C 4
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#define BLIS_DEFAULT_MR_Z 8
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#define BLIS_DEFAULT_NR_Z 4
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// NOTE: If the micro-kernel, which is typically unrolled to a factor
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// of f, handles leftover edge cases (ie: when k % f > 0) then these
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// register blocksizes in the k dimension can be defined to 1.
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//#define BLIS_DEFAULT_KR_S 1
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//#define BLIS_DEFAULT_KR_D 1
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//#define BLIS_DEFAULT_KR_C 1
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//#define BLIS_DEFAULT_KR_Z 1
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// -- Maximum cache blocksizes (for optimizing edge cases) --
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// NOTE: These cache blocksize "extensions" have the same constraints as
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// the corresponding default blocksizes above. When these values are
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// larger than the default blocksizes, blocksizes used at edge cases are
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// enlarged if such an extension would encompass the remaining portion of
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// the matrix dimension.
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//#define BLIS_MAXIMUM_MC_S (BLIS_DEFAULT_MC_S + BLIS_DEFAULT_MC_S/4)
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//#define BLIS_MAXIMUM_KC_S (BLIS_DEFAULT_KC_S + BLIS_DEFAULT_KC_S/4)
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//#define BLIS_MAXIMUM_NC_S (BLIS_DEFAULT_NC_S + BLIS_DEFAULT_NC_S/4)
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//#define BLIS_MAXIMUM_MC_D (BLIS_DEFAULT_MC_D + BLIS_DEFAULT_MC_D/4)
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//#define BLIS_MAXIMUM_KC_D (BLIS_DEFAULT_KC_D + BLIS_DEFAULT_KC_D/4)
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//#define BLIS_MAXIMUM_NC_D (BLIS_DEFAULT_NC_D + BLIS_DEFAULT_NC_D/4)
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//#define BLIS_MAXIMUM_MC_C (BLIS_DEFAULT_MC_C + BLIS_DEFAULT_MC_C/4)
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//#define BLIS_MAXIMUM_KC_C (BLIS_DEFAULT_KC_C + BLIS_DEFAULT_KC_C/4)
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//#define BLIS_MAXIMUM_NC_C (BLIS_DEFAULT_NC_C + BLIS_DEFAULT_NC_C/4)
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//#define BLIS_MAXIMUM_MC_Z (BLIS_DEFAULT_MC_Z + BLIS_DEFAULT_MC_Z/4)
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//#define BLIS_MAXIMUM_KC_Z (BLIS_DEFAULT_KC_Z + BLIS_DEFAULT_KC_Z/4)
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//#define BLIS_MAXIMUM_NC_Z (BLIS_DEFAULT_NC_Z + BLIS_DEFAULT_NC_Z/4)
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// -- Packing register blocksize (for packed micro-panels) --
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// NOTE: These register blocksize "extensions" determine whether the
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// leading dimensions used within the packed micro-panels are equal to
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// or greater than their corresponding register blocksizes above.
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//#define BLIS_PACKDIM_MR_S (BLIS_DEFAULT_MR_S + ...)
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//#define BLIS_PACKDIM_NR_S (BLIS_DEFAULT_NR_S + ...)
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//#define BLIS_PACKDIM_MR_D (BLIS_DEFAULT_MR_D + ...)
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//#define BLIS_PACKDIM_NR_D (BLIS_DEFAULT_NR_D + ...)
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//#define BLIS_PACKDIM_MR_C (BLIS_DEFAULT_MR_C + ...)
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//#define BLIS_PACKDIM_NR_C (BLIS_DEFAULT_NR_C + ...)
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//#define BLIS_PACKDIM_MR_Z (BLIS_DEFAULT_MR_Z + ...)
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//#define BLIS_PACKDIM_NR_Z (BLIS_DEFAULT_NR_Z + ...)
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// -- LEVEL-2 KERNEL CONSTANTS -------------------------------------------------
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// -- LEVEL-1F KERNEL CONSTANTS ------------------------------------------------
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// -- LEVEL-3 KERNEL DEFINITIONS -----------------------------------------------
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// -- gemm --
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#define BLIS_DGEMM_UKERNEL bli_dgemm_opt_4x4
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// -- trsm-related --
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// -- LEVEL-1M KERNEL DEFINITIONS ----------------------------------------------
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// -- packm --
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// -- unpackm --
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// -- LEVEL-1F KERNEL DEFINITIONS ----------------------------------------------
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// -- axpy2v --
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// -- dotaxpyv --
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// -- axpyf --
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// -- dotxf --
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// -- dotxaxpyf --
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// -- LEVEL-1V KERNEL DEFINITIONS ----------------------------------------------
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// -- addv --
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// -- axpyv --
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// -- copyv --
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// -- dotv --
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// -- dotxv --
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// -- invertv --
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// -- scal2v --
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// -- scalv --
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// -- setv --
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// -- subv --
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// -- swapv --
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#endif
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