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- Added the support for Tiny-CGEMM as part of the existing macro based Tiny-GEMM interface. This involved definining the appropriate AVX2/AVX512 lookup tables and functions for the target architectures(as per the design), for compile-time instantiation and runtime usage. - Also extended the current Tiny-GEMM design to incorporate packing kernels as part of its lookup tables. These kernels will be queried through lookup functions and used in case of wanting to support non-trivial storage schemes(such as dot-product computation). - This allows for a plug-and-play fashion of experimenting with pack and outer product method against native inner product implementations. - Further updated the existing AVX512 pack routine that packs the A matrix (in blocks of 24xk). This utilizes masked loads/stores instructions to handle fringe cases of the input(i.e, when m < 24). - Also added the AVX512 outer product kernels for CGEMM as part of the ZEN4 and ZEN5 contexts, to handle RRC and CRC storage schemes. This is facilitated through optional packing of A matrix in the SUP framework. AMD-Internal: [CPUPL-6498] Co-authored-by: Vignesh Balasubramanian <vignbala@amd.com> Co-authored-by: Varaganti, Kiran <Kiran.Varaganti@amd.com>
AOCL-BLAS library
AOCL-BLAS is AMD's optimized version of BLAS targeted for AMD EPYC and Ryzen CPUs. It is developed as a forked version of BLIS (https://github.com/flame/blis), which is developed by members of the Science of High-Performance Computing (SHPC) group in the Institute for Computational Engineering and Sciences at The University of Texas at Austin and other collaborators (including AMD). All known features and functionalities of BLIS are retained and supported in AOCL-BLAS library. AOCL-BLAS is regularly updated with the improvements from the upstream repository.
AOCL BLAS is optimized with SSE2, AVX2, AVX512 instruction sets which would be enabled based on the target Zen architecture using the dynamic dispatch feature. All prominent Level 3, Level 2 and Level 1 APIs are designed and optimized for specific paths targeting different size spectrums e.g., Small, Medium and Large sizes. These algorithms are designed and customized to exploit the architectural improvements of the target platform.
For detailed instructions on how to configure, build, install, and link against AOCL-BLAS on AMD CPUs, please refer to the AOCL User Guide located on AMD developer portal.
The upstream repository (https://github.com/flame/blis) contains further information on BLIS, including background information on BLIS design, usage examples, and a complete BLIS API reference.
AOCL-BLAS is developed and maintained by AMD. You can contact us on the email-id toolchainsupport@amd.com. You can also raise any issue/suggestion on the git-hub repository at https://github.com/amd/blis/issues.