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Edward Smyth 1617589d24 Add consistent NaN/Inf handling in sumsqv. (#668) 
Details:
- Changed sumsqv implementation as follows:
  - If there is a NaN (either real or imaginary), then return a sum of
    NaN and unit scale.
  - Else, if there is an Inf (either real or imaginary), then return a
    sum of +Inf and unit scale.
  - Otherwise behave as normal.

(cherry picked from commit b861c71b50)

AMD-Internal: [SWLCSG-1900]
Change-Id: Ic7ba9cad1fbaf11823b9ba96e72a4ddd973db5b6
2023-03-09 06:36:44 -05:00
..
0
AOCL Windows: 3.1 BLIS changes
2021-03-08 19:04:17 +05:30
1
AOCL Windows: 3.1 BLIS changes
2021-03-08 19:04:17 +05:30
1d
AOCL Windows: 3.1 BLIS changes
2021-03-08 19:04:17 +05:30
1f
AOCL Windows: 3.1 BLIS changes
2021-03-08 19:04:17 +05:30
1m
Added functionality support for dzgemm
2022-05-17 18:01:55 +05:30
2
BLIS-Nov2022: HPL memory issues with GCC.
2022-12-06 05:10:34 -05:00
3
Added DTRSM small RUNN/RLTN variant AVX512 kernels
2023-02-16 06:49:46 -05:00
base
Fixed decision logic in choosing between sup vs native GEMM code paths
2023-03-02 02:12:42 -05:00
compat
Added AVX512 DTRSM small RLNN/RUTN variant kernels
2023-02-28 01:40:03 +05:30
include
AVX2 vectorized SCALV for double complex
2023-02-05 09:36:12 -05:00
ind
3m1 turning OFF
2021-05-26 10:06:54 +05:30
thread
Code cleanup and warnings fixes
2023-01-09 04:34:52 -05:00
util
Add consistent NaN/Inf handling in sumsqv. (#668)
2023-03-09 06:36:44 -05:00
CMakeLists.txt
AOCL Windows: 3.1 BLIS changes
2021-03-08 19:04:17 +05:30