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[PR #341] Fix TMEM lane address for debug mode across all SM100 kernels #374
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deepseek-ai/DeepGEMM#374
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📋 Pull Request Information
Original PR: https://github.com/deepseek-ai/DeepGEMM/pull/341
Author: @yejunjin
Created: 5/28/2026
Status: 🔄 Open
Base:
main← Head:fix-tmem-lane-check📝 Commits (1)
ed83aa2Fix TMEM lane address for debug mode across all SM100 kernels📊 Changes
10 files changed (+45 additions, -4 deletions)
View changed files
📝
deep_gemm/include/deep_gemm/epilogue/sm100_store_cd.cuh(+3 -0)📝
deep_gemm/include/deep_gemm/epilogue/sm100_store_cd_swap_ab.cuh(+3 -0)📝
deep_gemm/include/deep_gemm/impls/sm100_bmk_bnk_mn.cuh(+3 -0)📝
deep_gemm/include/deep_gemm/impls/sm100_fp4_mqa_logits.cuh(+6 -1)📝
deep_gemm/include/deep_gemm/impls/sm100_fp4_paged_mqa_logits.cuh(+6 -1)📝
deep_gemm/include/deep_gemm/impls/sm100_fp8_fp4_mega_moe.cuh(+6 -0)📝
deep_gemm/include/deep_gemm/impls/sm100_fp8_gemm_1d1d.cuh(+3 -0)📝
deep_gemm/include/deep_gemm/impls/sm100_fp8_mqa_logits.cuh(+6 -1)📝
deep_gemm/include/deep_gemm/impls/sm100_fp8_paged_mqa_logits.cuh(+6 -1)📝
deep_gemm/include/deep_gemm/impls/sm100_tf32_hc_prenorm_gemm.cuh(+3 -0)📄 Description
Set explicit TMEM lane bits (22:16) under
__CUDACC_DEBUG__to satisfy the hardware's strict Warp Tensor Memory Access Check enabled by-G. In release mode the hardware auto-routes lanes, so the fix is guarded to avoid unnecessary overhead.🔄 This issue represents a GitHub Pull Request. It cannot be merged through Gitea due to API limitations.