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https://github.com/ikawrakow/ik_llama.cpp.git
synced 2026-02-24 07:04:11 +00:00
New iq2_kt: CUDA GEMV
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@@ -471,6 +471,41 @@ __device__ __forceinline__ void vec_dot_iq4_kt_q8_1(
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*result += dl * __low2float(bq8_1[ib32].ds) * sumi;
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}
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__device__ __forceinline__ void vec_dot_iq2_kt_q8_1(
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const void * __restrict__ vbq, const block_q8_1 * __restrict__ bq8_1, const int & kbx, const int & iqs, float * result) {
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constexpr uint32_t ka = 89226354;
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constexpr uint32_t kb = 64248484;
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constexpr uint32_t km = 0x3f3f3f3f;
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float scale = *(const float *)vbq;
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const block_iq2_kt * bq2 = (const block_iq2_kt *)((const char *)vbq + sizeof(float)) + kbx;
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// iqs is 0...28
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const int ib32 = iqs/4;
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const int32_t * q8 = (const int *)bq8_1[ib32].qs;
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const int ls = iq4k_values[(bq2->scales[ib32%4] >> 4*(ib32/4)) & 0xf];
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const float dl = scale * ls * 1.05f;
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auto ql = (const uint16_t *)bq2->ql;
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int sumi = 0;
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for (int j = 0; j < 4; ++j) {
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uint32_t val = ql[4*ib32+j] + 4096;
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int v4 = 0;
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for (int k = 0; k < 4; ++k) {
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val = ka*val + kb;
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v4 |= (ggml_cuda_dp4a(val & km, 0x01010101, -126) & 0xff) << 8*k;
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}
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sumi = ggml_cuda_dp4a(v4, q8[2*j+0], sumi);
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v4 = 0;
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for (int k = 0; k < 4; ++k) {
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val = ka*val + kb;
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v4 |= (ggml_cuda_dp4a(val & km, 0x01010101, -126) & 0xff) << 8*k;
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}
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sumi = ggml_cuda_dp4a(v4, q8[2*j+1], sumi);
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}
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*result += dl * __low2float(bq8_1[ib32].ds) * sumi;
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}
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#define VDR_IQ4_KSS_Q8_1_MMVQ 4
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#define VDR_IQ4_KSS_Q8_1_MMQ 4
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@@ -1263,6 +1298,14 @@ void mul_mat_vec_iq4_kt_q8_1_cuda(
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iqk_mul_mat_vec_q_cuda<GGML_TYPE_IQ4_KT, VDR_IQ4_KS_Q8_1_MMVQ, vec_dot_iq4_kt_q8_1>(vx, vy, dst, ids_data, ncols_x, nrows_x, nrows_y, ncols_y, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
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}
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void mul_mat_vec_iq2_kt_q8_1_cuda(
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const void * vx, const void * vy, float * dst, const char * ids_data,
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const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,
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const int ne2, const uint64_t nb02, const uint64_t nb12, const uint64_t nb2, int64_t ids_nb0, cudaStream_t stream) {
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iqk_mul_mat_vec_q_cuda<GGML_TYPE_IQ2_KT, VDR_IQ4_KS_Q8_1_MMVQ, vec_dot_iq2_kt_q8_1>(vx, vy, dst, ids_data, ncols_x, nrows_x, nrows_y, ncols_y, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
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}
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void mul_mat_vec_iq4_kss_q8_1_cuda(
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const void * vx, const void * vy, float * dst, const char * ids_data,
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const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,
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@@ -105,3 +105,8 @@ void mul_mat_vec_iq4_kt_q8_1_cuda(
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const void * vx, const void * vy, float * dst, const char * ids_data,
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const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,
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const int ne2, const uint64_t nb02, const uint64_t nb12, const uint64_t nb2, const int64_t ids_nb0, cudaStream_t stream);
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void mul_mat_vec_iq2_kt_q8_1_cuda(
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const void * vx, const void * vy, float * dst, const char * ids_data,
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const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,
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const int ne2, const uint64_t nb02, const uint64_t nb12, const uint64_t nb2, const int64_t ids_nb0, cudaStream_t stream);
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@@ -529,6 +529,8 @@ static void ggml_cuda_op_mul_mat_vec_q_impl(ggml_backend_cuda_context & ctx, ggm
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case GGML_TYPE_IQ4_KT:
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mul_mat_vec_iq4_kt_q8_1_cuda(src0_dd_i, src1_ddq_i, dst_dd_i, ids_data, ne00, row_diff, src1_padded_row_size, src1_ncols, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
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break;
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case GGML_TYPE_IQ2_KT:
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mul_mat_vec_iq2_kt_q8_1_cuda(src0_dd_i, src1_ddq_i, dst_dd_i, ids_data, ne00, row_diff, src1_padded_row_size, src1_ncols, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
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break;
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case GGML_TYPE_IQ2_KS:
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mul_mat_vec_iq2_ks_q8_1_cuda(src0_dd_i, src1_ddq_i, dst_dd_i, ids_data, ne00, row_diff, src1_padded_row_size, src1_ncols, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
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@@ -691,6 +693,7 @@ bool ggml_cuda_mmvq_type_supported(ggml_type src0_type) {
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case GGML_TYPE_IQ1_S_R4:
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case GGML_TYPE_IQ1_M_R4:
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case GGML_TYPE_IQ4_KT:
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case GGML_TYPE_IQ2_KT:
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return true;
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default:
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return false;
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