ikawrakow/ik_llama.cpp
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CUDA GEMM and GEMV for IQ4_KS_R4 and IQ5_KS_R4 (#462)

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* CUDA: iq4_ks_r4 GEMV and GEMM

* CUDA: iq5_ks_r4 GEMV and GEMM

---------

Co-authored-by: Iwan Kawrakow <iwan.kawrakow@gmail.com>
This commit is contained in:
Kawrakow
2025-05-27 08:37:44 +03:00
committed by GitHub
parent 89728ab03c
commit 6989ca0249
5 changed files with 238 additions and 3 deletions
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2
ggml/src/ggml-cuda.cu
View File

@@ -3473,7 +3473,9 @@ GGML_CALL static bool ggml_backend_cuda_supports_op(ggml_backend_t backend, cons
case GGML_TYPE_IQ2_K_R4:
case GGML_TYPE_IQ3_K_R4:
case GGML_TYPE_IQ4_K_R4:
case GGML_TYPE_IQ4_KS_R4:
case GGML_TYPE_IQ5_K_R4:
case GGML_TYPE_IQ5_KS_R4:
return true;
default:
return false;

123
ggml/src/ggml-cuda/convert.cu
View File

@@ -801,6 +801,50 @@ static __global__ void dequantize_block_iq4_k_r4(const void * __restrict__ vx, d
}
}
template<typename dst_t>
static __global__ void dequantize_block_iq4_ks_r4(const void * __restrict__ vx, dst_t * __restrict__ yy, int64_t n_per_row, int64_t row_size) {
int64_t ii = blockIdx.x;
int64_t nblock = n_per_row/256;
int64_t row = ii/nblock;
int64_t row4 = row/4;
int64_t ir = row%4;
int64_t ibl = ii%nblock;
const int tid = threadIdx.x;
const int il = tid/8; // 0...3
const int ib = tid%8; // 0...7
const float * dptr = (const float *)((const char *)vx + 4*row4*row_size);
const float d = dptr[ir];
const block_iq4_ks_r4 * x = (const block_iq4_ks_r4 *)(dptr + 4);
dst_t * y = yy + 256*ii + 32*ib;
float dl = d * ((x[ibl].scales[4*ib + ir] & 254) - 127);
auto values = iq4k_values + ((x[ibl].scales[4*ib + ir] & 1) << 4);
auto qs = x[ibl].qs + 64*ib + 4*ir;
if constexpr (std::is_same_v<dst_t, nv_bfloat16>) {
y[il+ 0] = __float2bfloat16(dl * values[qs[il+ 0] & 0xf]);
y[il+ 8] = __float2bfloat16(dl * values[qs[il+ 0] >> 4]);
y[il+16] = __float2bfloat16(dl * values[qs[il+16] & 0xf]);
y[il+24] = __float2bfloat16(dl * values[qs[il+16] >> 4]);
y[il+ 4] = __float2bfloat16(dl * values[qs[il+32] & 0xf]);
y[il+12] = __float2bfloat16(dl * values[qs[il+32] >> 4]);
y[il+20] = __float2bfloat16(dl * values[qs[il+48] & 0xf]);
y[il+28] = __float2bfloat16(dl * values[qs[il+48] >> 4]);
} else {
y[il+ 0] = dl * values[qs[il+ 0] & 0xf];
y[il+ 4] = dl * values[qs[il+32] & 0xf];
y[il+ 8] = dl * values[qs[il+ 0] >> 4];
y[il+12] = dl * values[qs[il+32] >> 4];
y[il+16] = dl * values[qs[il+16] & 0xf];
y[il+20] = dl * values[qs[il+48] & 0xf];
y[il+24] = dl * values[qs[il+16] >> 4];
y[il+28] = dl * values[qs[il+48] >> 4];
}
}
template<typename dst_t>
static __global__ void dequantize_block_iq5_k(const void * __restrict__ vx, dst_t * __restrict__ yy) {
@@ -886,6 +930,51 @@ static __global__ void dequantize_block_iq5_k_r4(const void * __restrict__ vx, d
}
}
template<typename dst_t>
static __global__ void dequantize_block_iq5_ks_r4(const void * __restrict__ vx, dst_t * __restrict__ yy, int64_t n_per_row, int64_t row_size) {
int64_t ii = blockIdx.x;
int64_t nblock = n_per_row/256;
int64_t row = ii/nblock;
int64_t row4 = row/4;
int64_t ir = row%4;
int64_t ibl = ii%nblock;
const int tid = threadIdx.x;
const int il = tid/8; // 0...3
const int ib = tid%8; // 0...7
const float * dptr = (const float *)((const char *)vx + 4*row4*row_size);
const block_iq5_ks_r4 * x = (const block_iq5_ks_r4 *)(dptr + 4);
dst_t * y = yy + 256*ii + 32*ib;
const float d = dptr[ir];
float dl = d * ((x[ibl].scales[4*ib + ir] & 254) - 127);
auto values = iq5nl_values + ((x[ibl].scales[4*ib + ir] & 1) << 5);
auto qs = x[ibl].qs + 64*ib + 4*ir;
auto qh = x[ibl].qh + 16*ib + 4*ir;
if constexpr (std::is_same_v<dst_t, nv_bfloat16>) {
y[il+ 0] = __float2bfloat16(dl * values[(qs[il+ 0] & 0xf) | (((qh[il] >> 0) & 1) << 4)]);
y[il+ 4] = __float2bfloat16(dl * values[(qs[il+32] & 0xf) | (((qh[il] >> 4) & 1) << 4)]);
y[il+ 8] = __float2bfloat16(dl * values[(qs[il+ 0] >> 4) | (((qh[il] >> 1) & 1) << 4)]);
y[il+12] = __float2bfloat16(dl * values[(qs[il+32] >> 4) | (((qh[il] >> 5) & 1) << 4)]);
y[il+16] = __float2bfloat16(dl * values[(qs[il+16] & 0xf) | (((qh[il] >> 2) & 1) << 4)]);
y[il+20] = __float2bfloat16(dl * values[(qs[il+48] & 0xf) | (((qh[il] >> 6) & 1) << 4)]);
y[il+24] = __float2bfloat16(dl * values[(qs[il+16] >> 4) | (((qh[il] >> 3) & 1) << 4)]);
y[il+28] = __float2bfloat16(dl * values[(qs[il+48] >> 4) | (((qh[il] >> 7) & 1) << 4)]);
} else {
y[il+ 0] = dl * values[(qs[il+ 0] & 0xf) | (((qh[il] >> 0) & 1) << 4)];
y[il+ 4] = dl * values[(qs[il+32] & 0xf) | (((qh[il] >> 4) & 1) << 4)];
y[il+ 8] = dl * values[(qs[il+ 0] >> 4) | (((qh[il] >> 1) & 1) << 4)];
y[il+12] = dl * values[(qs[il+32] >> 4) | (((qh[il] >> 5) & 1) << 4)];
y[il+16] = dl * values[(qs[il+16] & 0xf) | (((qh[il] >> 2) & 1) << 4)];
y[il+20] = dl * values[(qs[il+48] & 0xf) | (((qh[il] >> 6) & 1) << 4)];
y[il+24] = dl * values[(qs[il+16] >> 4) | (((qh[il] >> 3) & 1) << 4)];
y[il+28] = dl * values[(qs[il+48] >> 4) | (((qh[il] >> 7) & 1) << 4)];
}
}
template<typename dst_t>
static __global__ void dequantize_block_iq2_k_r4(const void * __restrict__ vx, dst_t * __restrict__ yy, int64_t n_per_row, int64_t row_size) {
@@ -1395,7 +1484,7 @@ static void dequantize_row_iq3_k_cuda(const void * vx, dst_t * y, const int64_t
template<typename dst_t>
static void dequantize_row_iq3_k_r4_cuda(const void * vx, dst_t * y, const int64_t nrows, const int64_t n_per_row, cudaStream_t stream) {
const int64_t k = nrows * n_per_row;
const int64_t row_size = ggml_row_size(GGML_TYPE_IQ4_K, n_per_row);
const int64_t row_size = ggml_row_size(GGML_TYPE_IQ3_K, n_per_row);
const int nb = (k + QK_K - 1) / QK_K;
dequantize_block_iq3_k_r4<<<nb, 32, 0, stream>>>(vx, y, n_per_row, row_size);
}
@@ -1403,7 +1492,7 @@ static void dequantize_row_iq3_k_r4_cuda(const void * vx, dst_t * y, const int64
template<typename dst_t>
static void dequantize_row_iq2_k_r4_cuda(const void * vx, dst_t * y, const int64_t nrows, const int64_t n_per_row, cudaStream_t stream) {
const int64_t k = nrows * n_per_row;
const int64_t row_size = ggml_row_size(GGML_TYPE_IQ4_K, n_per_row);
const int64_t row_size = ggml_row_size(GGML_TYPE_IQ2_K, n_per_row);
const int nb = (k + QK_K - 1) / QK_K;
dequantize_block_iq2_k_r4<<<nb, 32, 0, stream>>>(vx, y, n_per_row, row_size);
}
@@ -1423,6 +1512,14 @@ static void dequantize_row_iq4_k_r4_cuda(const void * vx, dst_t * y, const int64
dequantize_block_iq4_k_r4<<<nb, 32, 0, stream>>>(vx, y, n_per_row, row_size);
}
template<typename dst_t>
static void dequantize_row_iq4_ks_r4_cuda(const void * vx, dst_t * y, const int64_t nrows, const int64_t n_per_row, cudaStream_t stream) {
const int64_t k = nrows * n_per_row;
const int64_t row_size = ggml_row_size(GGML_TYPE_IQ4_KS, n_per_row);
const int nb = (k + QK_K - 1) / QK_K;
dequantize_block_iq4_ks_r4<<<nb, 32, 0, stream>>>(vx, y, n_per_row, row_size);
}
template<typename dst_t>
static void dequantize_row_iq5_k_cuda(const void * vx, dst_t * y, const int64_t nrows, const int64_t n_per_row, cudaStream_t stream) {
const int64_t k = nrows * n_per_row;
@@ -1433,11 +1530,19 @@ static void dequantize_row_iq5_k_cuda(const void * vx, dst_t * y, const int64_t
template<typename dst_t>
static void dequantize_row_iq5_k_r4_cuda(const void * vx, dst_t * y, const int64_t nrows, const int64_t n_per_row, cudaStream_t stream) {
const int64_t k = nrows * n_per_row;
const int64_t row_size = ggml_row_size(GGML_TYPE_IQ4_K, n_per_row);
const int64_t row_size = ggml_row_size(GGML_TYPE_IQ5_K, n_per_row);
const int nb = (k + QK_K - 1) / QK_K;
dequantize_block_iq5_k_r4<<<nb, 32, 0, stream>>>(vx, y, n_per_row, row_size);
}
template<typename dst_t>
static void dequantize_row_iq5_ks_r4_cuda(const void * vx, dst_t * y, const int64_t nrows, const int64_t n_per_row, cudaStream_t stream) {
const int64_t k = nrows * n_per_row;
const int64_t row_size = ggml_row_size(GGML_TYPE_IQ5_KS, n_per_row);
const int nb = (k + QK_K - 1) / QK_K;
dequantize_block_iq5_ks_r4<<<nb, 32, 0, stream>>>(vx, y, n_per_row, row_size);
}
template<typename dst_t>
static void dequantize_row_iq6_k_cuda(const void * vx, dst_t * y, const int64_t nrows, const int64_t n_per_row, cudaStream_t stream) {
const int64_t k = nrows * n_per_row;
@@ -1540,8 +1645,12 @@ to_bf16_cuda_t ggml_get_to_bf16_cuda(ggml_type type) {
return dequantize_row_iq3_k_r4_cuda<nv_bfloat16>;
case GGML_TYPE_IQ4_K_R4:
return dequantize_row_iq4_k_r4_cuda<nv_bfloat16>;
case GGML_TYPE_IQ4_KS_R4:
return dequantize_row_iq4_ks_r4_cuda<nv_bfloat16>;
case GGML_TYPE_IQ5_K_R4:
return dequantize_row_iq5_k_r4_cuda<nv_bfloat16>;
case GGML_TYPE_IQ5_KS_R4:
return dequantize_row_iq5_ks_r4_cuda<nv_bfloat16>;
default:
return nullptr;
}
@@ -1630,8 +1739,12 @@ to_fp16_cuda_t ggml_get_to_fp16_cuda(ggml_type type) {
return dequantize_row_iq3_k_r4_cuda;
case GGML_TYPE_IQ4_K_R4:
return dequantize_row_iq4_k_r4_cuda;
case GGML_TYPE_IQ4_KS_R4:
return dequantize_row_iq4_ks_r4_cuda;
case GGML_TYPE_IQ5_K_R4:
return dequantize_row_iq5_k_r4_cuda;
case GGML_TYPE_IQ5_KS_R4:
return dequantize_row_iq5_ks_r4_cuda;
default:
return nullptr;
}
@@ -1717,8 +1830,12 @@ to_fp32_cuda_t ggml_get_to_fp32_cuda(ggml_type type) {
return dequantize_row_iq3_k_r4_cuda;
case GGML_TYPE_IQ4_K_R4:
return dequantize_row_iq4_k_r4_cuda;
case GGML_TYPE_IQ4_KS_R4:
return dequantize_row_iq4_ks_r4_cuda;
case GGML_TYPE_IQ5_K_R4:
return dequantize_row_iq5_k_r4_cuda;
case GGML_TYPE_IQ5_KS_R4:
return dequantize_row_iq5_ks_r4_cuda;
default:
return nullptr;
}

98
ggml/src/ggml-cuda/iqk_mmvq.cu
View File

@@ -36,6 +36,20 @@ struct ggml_cuda_type_traits<GGML_TYPE_IQ5_K_R4> {
static constexpr int qi = QI5_XS;
};
template<>
struct ggml_cuda_type_traits<GGML_TYPE_IQ4_KS_R4> {
static constexpr int qk = QK_K;
static constexpr int qr = QR4_XS;
static constexpr int qi = QI4_XS;
};
template<>
struct ggml_cuda_type_traits<GGML_TYPE_IQ5_KS_R4> {
static constexpr int qk = QK_K;
static constexpr int qr = QR5_XS;
static constexpr int qi = QI5_XS;
};
// Reminder:
// constexpr int qk = ggml_cuda_type_traits<type>::qk;
@@ -309,6 +323,36 @@ __device__ __forceinline__ void vec_dot_iq4_k_r4_q8_1(
}
}
__device__ __forceinline__ void vec_dot_iq4_ks_r4_q8_1(
const void * __restrict__ vbq, const block_q8_1 * __restrict__ bq8_1, const int & kbx, const int & iqs, float * result) {
const float * dptr = (const float *)vbq;
const block_iq4_ks_r4 * bq4 = (const block_iq4_ks_r4 *)(dptr + 4) + kbx;
// iqs is 0...28 in steps of 2
const int ib16 = iqs/2;
const float d8 = __low2float(bq8_1[ib16/2].ds);
const int32_t * q8 = (const int *)bq8_1[ib16/2].qs + 4*(ib16%2);
int ib32 = ib16/2;
int is = ib16%2;
const uint32_t * scales32 = (const uint32_t *)bq4->scales;
int scales = __vsub4(scales32[ib32] & 0xfefefefe, 0x7f7f7f7f);
const int8_t * s8 = (const int8_t *)&scales;
int2 val;
const int * q4 = (const int *)bq4->qs + 16*ib32;
for (int i = 0; i < 4; ++i) {
auto values = iq4k_values + ((bq4->scales[4*ib32+i] & 1) << 4);
int sumi = 0;
val = get_int_from_table_16(q4[i+4*is+0], values);
sumi = ggml_cuda_dp4a(val.x, q8[0], ggml_cuda_dp4a(val.y, q8[2], sumi));
val = get_int_from_table_16(q4[i+4*is+8], values);
sumi = ggml_cuda_dp4a(val.x, q8[1], ggml_cuda_dp4a(val.y, q8[3], sumi));
const float d = dptr[i] * d8;
result[i] += d * sumi * s8[i];
}
}
#define VDR_IQ4_KS_Q8_1_MMVQ 4
#define VDR_IQ4_KS_Q8_1_MMQ 4
@@ -447,6 +491,44 @@ __device__ __forceinline__ void vec_dot_iq5_k_r4_q8_1(
}
}
__device__ __forceinline__ void vec_dot_iq5_ks_r4_q8_1(
const void * __restrict__ vbq, const block_q8_1 * __restrict__ bq8_1, const int & kbx, const int & iqs, float * result) {
const float * dptr = (const float *)vbq;
const block_iq5_ks_r4 * bq5 = (const block_iq5_ks_r4 *)(dptr + 4) + kbx;
// iqs is 0...28 in steps of 2
const int ib16 = iqs/2;
const float d8 = __low2float(bq8_1[ib16/2].ds);
const int32_t * q8 = (const int *)bq8_1[ib16/2].qs + 4*(ib16%2);
int ib32 = ib16/2;
int is = ib16%2;
const uint32_t * scales32 = (const uint32_t *)bq5->scales;
int scales = __vsub4(scales32[ib32] & 0xfefefefe, 0x7f7f7f7f);
const int8_t * s8 = (const int8_t *)&scales;
int2 val;
const int * q4 = (const int *)bq5->qs + 16*ib32;
const int * qh = (const int *)bq5->qh + 4*ib32;
int aux32[2];
const uint8_t * aux8 = (const uint8_t *)aux32;
for (int i = 0; i < 4; ++i) {
auto values = iq5nl_values + ((bq5->scales[4*ib32+i] & 1) << 5);
int sumi = 0;
aux32[0] = ((q4[i+4*is+0] >> 0) & 0x0f0f0f0f) | (((qh[i] >> (2*is+0)) & 0x01010101) << 4);
aux32[1] = ((q4[i+4*is+0] >> 4) & 0x0f0f0f0f) | (((qh[i] >> (2*is+1)) & 0x01010101) << 4);
val.x = int_from_table(aux8+0, (const uint8_t *)values);
val.y = int_from_table(aux8+4, (const uint8_t *)values);
sumi = ggml_cuda_dp4a(val.x, q8[0], ggml_cuda_dp4a(val.y, q8[2], sumi));
aux32[0] = ((q4[i+4*is+8] >> 0) & 0x0f0f0f0f) | (((qh[i] >> (2*is+4)) & 0x01010101) << 4);
aux32[1] = ((q4[i+4*is+8] >> 4) & 0x0f0f0f0f) | (((qh[i] >> (2*is+5)) & 0x01010101) << 4);
val.x = int_from_table(aux8+0, (const uint8_t *)values);
val.y = int_from_table(aux8+4, (const uint8_t *)values);
sumi = ggml_cuda_dp4a(val.x, q8[1], ggml_cuda_dp4a(val.y, q8[3], sumi));
result[i] += dptr[i] * d8 * sumi * s8[i];
}
}
__device__ __forceinline__ void vec_dot_iq5_ks_q8_1(
const void * __restrict__ vbq, const block_q8_1 * __restrict__ bq8_1, const int & kbx, const int & iqs, float * result) {
@@ -1013,6 +1095,14 @@ void mul_mat_vec_iq4_k_r4_q8_1_cuda(
iqk_mul_mat_vec_q_cuda<GGML_TYPE_IQ4_K_R4, 2, vec_dot_iq4_k_r4_q8_1, 4>(vx, vy, dst, ids_data, ncols_x, nrows_x, nrows_y, ncols_y, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
}
void mul_mat_vec_iq4_ks_r4_q8_1_cuda(
const void * vx, const void * vy, float * dst, const char * ids_data,
const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,
const int ne2, const uint64_t nb02, const uint64_t nb12, const uint64_t nb2, int64_t ids_nb0, cudaStream_t stream) {
iqk_mul_mat_vec_q_cuda<GGML_TYPE_IQ4_KS_R4, 2, vec_dot_iq4_ks_r4_q8_1, 4>(vx, vy, dst, ids_data, ncols_x, nrows_x, nrows_y, ncols_y, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
}
void mul_mat_vec_iq5_k_r4_q8_1_cuda(
const void * vx, const void * vy, float * dst, const char * ids_data,
const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,
@@ -1021,6 +1111,14 @@ void mul_mat_vec_iq5_k_r4_q8_1_cuda(
iqk_mul_mat_vec_q_cuda<GGML_TYPE_IQ5_K_R4, 2, vec_dot_iq5_k_r4_q8_1, 4>(vx, vy, dst, ids_data, ncols_x, nrows_x, nrows_y, ncols_y, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
}
void mul_mat_vec_iq5_ks_r4_q8_1_cuda(
const void * vx, const void * vy, float * dst, const char * ids_data,
const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,
const int ne2, const uint64_t nb02, const uint64_t nb12, const uint64_t nb2, int64_t ids_nb0, cudaStream_t stream) {
iqk_mul_mat_vec_q_cuda<GGML_TYPE_IQ5_KS_R4, 2, vec_dot_iq5_ks_r4_q8_1, 4>(vx, vy, dst, ids_data, ncols_x, nrows_x, nrows_y, ncols_y, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
}
void mul_mat_vec_iq2_k_r4_q8_1_cuda(
const void * vx, const void * vy, float * dst, const char * ids_data,
const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,

10
ggml/src/ggml-cuda/iqk_mmvq.cuh
View File

@@ -80,3 +80,13 @@ void mul_mat_vec_iq5_k_r4_q8_1_cuda(
const void * vx, const void * vy, float * dst, const char * ids_data,
const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,
const int ne2, const uint64_t nb02, const uint64_t nb12, const uint64_t nb2, const int64_t ids_nb0, cudaStream_t stream);
void mul_mat_vec_iq4_ks_r4_q8_1_cuda(
const void * vx, const void * vy, float * dst, const char * ids_data,
const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,
const int ne2, const uint64_t nb02, const uint64_t nb12, const uint64_t nb2, const int64_t ids_nb0, cudaStream_t stream);
void mul_mat_vec_iq5_ks_r4_q8_1_cuda(
const void * vx, const void * vy, float * dst, const char * ids_data,
const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,
const int ne2, const uint64_t nb02, const uint64_t nb12, const uint64_t nb2, const int64_t ids_nb0, cudaStream_t stream);

8
ggml/src/ggml-cuda/mmvq.cu
View File

@@ -551,9 +551,15 @@ static void ggml_cuda_op_mul_mat_vec_q_impl(ggml_backend_cuda_context & ctx, ggm
case GGML_TYPE_IQ4_K_R4:
mul_mat_vec_iq4_k_r4_q8_1_cuda(src0_dd_i, src1_ddq_i, dst_dd_i, ids_data, ne00, row_diff, src1_padded_row_size, src1_ncols, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
break;
case GGML_TYPE_IQ4_KS_R4:
mul_mat_vec_iq4_ks_r4_q8_1_cuda(src0_dd_i, src1_ddq_i, dst_dd_i, ids_data, ne00, row_diff, src1_padded_row_size, src1_ncols, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
break;
case GGML_TYPE_IQ5_K_R4:
mul_mat_vec_iq5_k_r4_q8_1_cuda(src0_dd_i, src1_ddq_i, dst_dd_i, ids_data, ne00, row_diff, src1_padded_row_size, src1_ncols, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
break;
case GGML_TYPE_IQ5_KS_R4:
mul_mat_vec_iq5_ks_r4_q8_1_cuda(src0_dd_i, src1_ddq_i, dst_dd_i, ids_data, ne00, row_diff, src1_padded_row_size, src1_ncols, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
break;
default:
GGML_ABORT("fatal error");
break;
@@ -670,7 +676,9 @@ bool ggml_cuda_mmvq_type_supported(ggml_type src0_type) {
case GGML_TYPE_IQ2_K_R4:
case GGML_TYPE_IQ3_K_R4:
case GGML_TYPE_IQ4_K_R4:
case GGML_TYPE_IQ4_KS_R4:
case GGML_TYPE_IQ5_K_R4:
case GGML_TYPE_IQ5_KS_R4:
return true;
default:
return false;