CUDA: iq4_k_r4 dequantize

This commit is contained in:
Iwan Kawrakow
2025-05-26 08:23:17 +03:00
parent 24c010b391
commit 7d3332c6b9
4 changed files with 141 additions and 0 deletions

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@@ -3470,6 +3470,7 @@ GGML_CALL static bool ggml_backend_cuda_supports_op(ggml_backend_t backend, cons
case GGML_TYPE_IQ6_K:
case GGML_TYPE_IQ1_BN:
case GGML_TYPE_IQ2_BN:
case GGML_TYPE_IQ4_K_R4:
return true;
default:
return false;

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@@ -754,6 +754,89 @@ static __global__ void dequantize_block_iq4_k(const void * __restrict__ vx, dst_
}
}
template<typename dst_t>
static __global__ void dequantize_block_iq4_k_r4(const void * __restrict__ vx, dst_t * __restrict__ yy, int64_t n_per_row, int64_t row_size) {
int64_t ii = blockIdx.x;
//int64_t nblock = n_per_row/256;
//int64_t row = ii/nblock;
//int64_t ibl = ii - row*nblock;
//int64_t row4 = row/4;
//int64_t ir = row4%4;
//const block_iq4_k_r4 * x = (const block_iq4_k_r4 *)vx + row4*nblock;
//int64_t row4 = (256*ii)/(4*n_per_row); // rows of 4 index
//int64_t ibl = ii - row4*n_per_row/64; // block index within the rows of 4
//int64_t ir = row4%4; // row
//int64_t ibl = ii/4;
//int ir = ii%4;
int64_t nblock = n_per_row/256;
int64_t row = ii/nblock;
int64_t row4 = row/4;
int64_t ir = row%4;
int64_t ibl = row4*nblock + ii%nblock;
// ii = 0 -> row = 0, row4 = 0, ir = 0, ibl should be 0
// ii = 1 -> row = 0, row4 = 0, ir = 0, ibl should be 1
// ii = 2 -> row = 0, row4 = 0, ir = 0, ibl should be 2
// ...
// ii = 16 -> row = 1, row4 = 0, ir = 1, ibl should be 0
// ..
// ii = 64 -> row = 4, row4 = 1, ir = 0, ibl should be 16
const block_iq4_k_r4 * x = (const block_iq4_k_r4 *)vx;
////const block_iq4_k_r4 * x = (const block_iq4_k_r4 *)((const char *)vx + 4*row4*row_size);
// Say, we have rows of 4096, and we have 8 rows -> 4096*8/256 = 128 blocks of 256, 16 blocks per row
// ii = 0 -> ibl = 0, ir = 0 -> warp processes 0...255 in row 0
// ii = 1 -> ibl = 0, ir = 1 -> warp processes 0...255 in row 1
// ii = 2 -> ibl = 0, ir = 2 -> warp processes 0...255 in row 2
// ii = 3 -> ibl = 0, ir = 3 -> warp processes 0...255 in row 3
// ii = 4 -> ibl = 1, ir = 0 -> warp processes 256...511 in row 0
// ii = 5 -> ibl = 1, ir = 1 -> warp processes 256...511 in row 1
// ii = 6 -> ibl = 1, ir = 2 -> warp processes 256...511 in row 2
// ii = 7 -> ibl = 1, ir = 3 -> warp processes 256...511 in row 3
// ...
// ii = 63 -> ibl = 15, ir = 3 -> warp processes 3840...4096 in row 3
// ii = 64 -> ibl = 16, ir = 0 -> warp processes 0...255 in row 4, so offset is 4*4096 = 4*16*256
const int tid = threadIdx.x;
const int il = tid/8; // 0...3
const int ib = tid%8; // 0...7
const float d = __half2float(x[ibl].d[ir]);
int is = 8*ib + ir;
float dl1 = d * ((((x[ibl].scales_l[is%32] >> 4*(is/32)) & 0xf) | (((x[ibl].scales_h[is%16] >> 2*(is/16)) & 3) << 4)) - 32);
is += 4;
float dl2 = d * ((((x[ibl].scales_l[is%32] >> 4*(is/32)) & 0xf) | (((x[ibl].scales_h[is%16] >> 2*(is/16)) & 3) << 4)) - 32);
auto values1 = iq4k_values + (((x[ibl].extra[ir+0] >> ib) & 1) << 4);
auto values2 = iq4k_values + (((x[ibl].extra[ir+4] >> ib) & 1) << 4);
dst_t * y = yy + 256*ii + 32*ib;
//dst_t * y = yy + (4*row4 + ir)*n_per_row + ibl*QK_K + 32*ib;
//dst_t * y = yy + ir*n_per_row + 4*ibl*QK_K + 32*ib;
auto qs = x[ibl].qs + 64*ib + 4*ir;
if constexpr (std::is_same_v<dst_t, nv_bfloat16>) {
y[il+ 0] = __float2bfloat16(dl1 * values1[qs[il+ 0] & 0xf]);
y[il+ 8] = __float2bfloat16(dl1 * values1[qs[il+ 0] >> 4]);
y[il+16] = __float2bfloat16(dl2 * values2[qs[il+16] & 0xf]);
y[il+24] = __float2bfloat16(dl2 * values2[qs[il+16] >> 4]);
y[il+ 4] = __float2bfloat16(dl1 * values1[qs[il+32] & 0xf]);
y[il+12] = __float2bfloat16(dl1 * values1[qs[il+32] >> 4]);
y[il+20] = __float2bfloat16(dl2 * values2[qs[il+48] & 0xf]);
y[il+28] = __float2bfloat16(dl2 * values2[qs[il+48] >> 4]);
} else {
y[il+ 0] = dl1 * values1[qs[il+ 0] & 0xf];
y[il+ 4] = dl1 * values1[qs[il+32] & 0xf];
y[il+ 8] = dl1 * values1[qs[il+ 0] >> 4];
y[il+12] = dl1 * values1[qs[il+32] >> 4];
y[il+16] = dl2 * values2[qs[il+16] & 0xf];
y[il+20] = dl2 * values2[qs[il+48] & 0xf];
y[il+24] = dl2 * values2[qs[il+16] >> 4];
y[il+28] = dl2 * values2[qs[il+48] >> 4];
}
}
template<typename dst_t>
static __global__ void dequantize_block_iq5_k(const void * __restrict__ vx, dst_t * __restrict__ yy) {
@@ -1209,6 +1292,14 @@ static void dequantize_row_iq4_k_cuda(const void * vx, dst_t * y, const int64_t
dequantize_block_iq4_k<<<nb, 32, 0, stream>>>(vx, y);
}
template<typename dst_t>
static void dequantize_row_iq4_k_r4_cuda(const void * vx, dst_t * y, const int64_t nrows, const int64_t n_per_row, cudaStream_t stream) {
const int64_t k = nrows * n_per_row;
const int64_t row_size = ggml_row_size(GGML_TYPE_IQ4_K, n_per_row);
const int nb = (k + QK_K - 1) / QK_K;
dequantize_block_iq4_k_r4<<<nb, 32, 0, stream>>>(vx, y, n_per_row, row_size);
}
template<typename dst_t>
static void dequantize_row_iq5_k_cuda(const void * vx, dst_t * y, const int64_t nrows, const int64_t n_per_row, cudaStream_t stream) {
const int64_t k = nrows * n_per_row;
@@ -1312,6 +1403,8 @@ to_bf16_cuda_t ggml_get_to_bf16_cuda(ggml_type type) {
return dequantize_row_iq5_k_cuda<nv_bfloat16>;
case GGML_TYPE_IQ6_K:
return dequantize_row_iq6_k_cuda<nv_bfloat16>;
case GGML_TYPE_IQ4_K_R4:
return dequantize_row_iq4_k_r4_cuda<nv_bfloat16>;
default:
return nullptr;
}
@@ -1394,6 +1487,8 @@ to_fp16_cuda_t ggml_get_to_fp16_cuda(ggml_type type) {
return convert_unary_cuda<float>;
case GGML_TYPE_BF16:
return convert_from_bf16_cuda;
case GGML_TYPE_IQ4_K_R4:
return dequantize_row_iq4_k_r4_cuda;
default:
return nullptr;
}
@@ -1473,6 +1568,8 @@ to_fp32_cuda_t ggml_get_to_fp32_cuda(ggml_type type) {
return convert_unary_cuda<half>;
case GGML_TYPE_BF16:
return convert_from_bf16_cuda;
case GGML_TYPE_IQ4_K_R4:
return dequantize_row_iq4_k_r4_cuda;
default:
return nullptr;
}

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@@ -229,6 +229,36 @@ __device__ __forceinline__ float vec_dot_iq4_k_q8_1(
return d * (sumi1 * ls1 + sumi2 * ls2);
}
// TODO
__device__ __forceinline__ float vec_dot_iq4_k_r4_q8_1(
const void * __restrict__ vbq, const block_q8_1 * __restrict__ bq8_1, const int & kbx, const int & iqs) {
return 0.f;
const block_iq4_k * bq4 = (const block_iq4_k *) vbq + kbx;
const uint8_t * all_values = (const uint8_t *)iq4k_values;
// iqs is 0...28
const int ib32 = iqs/4;
// Why iqs/4 ?
const int32_t * q8 = (const int *)bq8_1[ib32].qs;
const uint16_t * q4 = (const uint16_t *)bq4->qs + 8*ib32;
const uint16_t extra = bq4->extra >> 2*ib32;
int v1, v2;
int sumi1 = 0, sumi2 = 0;
for (int j = 0; j < 4; ++j) {
const uint32_t aux32 = q4[2*j+0] | (q4[2*j+1] << 16);
get_int_from_table_16_shift(aux32, extra, all_values, v1, v2);
sumi1 = ggml_cuda_dp4a(v1, q8[j+0], sumi1);
sumi2 = ggml_cuda_dp4a(v2, q8[j+4], sumi2);
}
const float d = __half2float(bq4->d) * __low2float(bq8_1[ib32].ds);
const uint8_t sh = bq4->scales_h[ib32/2] >> 4*(ib32%2);
const int ls1 = ((bq4->scales_l[ib32] & 0xf) | ((sh << 4) & 0x30)) - 32;
const int ls2 = ((bq4->scales_l[ib32] >> 4) | ((sh << 2) & 0x30)) - 32;
return d * (sumi1 * ls1 + sumi2 * ls2);
}
#define VDR_IQ4_KS_Q8_1_MMVQ 4
#define VDR_IQ4_KS_Q8_1_MMQ 4
@@ -800,6 +830,14 @@ void mul_mat_vec_iq4_k_q8_1_cuda(
iqk_mul_mat_vec_q_cuda<GGML_TYPE_IQ4_K, VDR_IQ4_K_Q8_1_MMVQ, vec_dot_iq4_k_q8_1>(vx, vy, dst, ids_data, ncols_x, nrows_x, nrows_y, ncols_y, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
}
void mul_mat_vec_iq4_k_r4_q8_1_cuda(
const void * vx, const void * vy, float * dst, const char * ids_data,
const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,
const int ne2, const uint64_t nb02, const uint64_t nb12, const uint64_t nb2, int64_t ids_nb0, cudaStream_t stream) {
iqk_mul_mat_vec_q_cuda<GGML_TYPE_IQ4_K, VDR_IQ4_K_Q8_1_MMVQ, vec_dot_iq4_k_r4_q8_1>(vx, vy, dst, ids_data, ncols_x, nrows_x, nrows_y, ncols_y, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
}
void mul_mat_vec_iq4_ks_q8_1_cuda(
const void * vx, const void * vy, float * dst, const char * ids_data,
const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,

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@@ -60,3 +60,8 @@ void mul_mat_vec_iq2_bn_q8_1_cuda(
const void * vx, const void * vy, float * dst, const char * ids_data,
const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,
const int ne2, const uint64_t nb02, const uint64_t nb12, const uint64_t nb2, const int64_t ids_nb0, cudaStream_t stream);
void mul_mat_vec_iq4_k_r4_q8_1_cuda(
const void * vx, const void * vy, float * dst, const char * ids_data,
const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,
const int ne2, const uint64_t nb02, const uint64_t nb12, const uint64_t nb2, const int64_t ids_nb0, cudaStream_t stream);