mirror of
https://github.com/ikawrakow/ik_llama.cpp.git
synced 2026-02-25 07:34:10 +00:00
GGML_UNARY_OP_SWIGLU: Metal implementation
We get ~2% speedup for PP-512(Phi-3.5-mini).
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@@ -63,6 +63,8 @@ enum ggml_metal_kernel_type {
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GGML_METAL_KERNEL_TYPE_GELU_QUICK_4,
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GGML_METAL_KERNEL_TYPE_SILU,
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GGML_METAL_KERNEL_TYPE_SILU_4,
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GGML_METAL_KERNEL_TYPE_SWIGLU,
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GGML_METAL_KERNEL_TYPE_SWIGLU_4,
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GGML_METAL_KERNEL_TYPE_SOFT_MAX_F16,
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GGML_METAL_KERNEL_TYPE_SOFT_MAX_F16_4,
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GGML_METAL_KERNEL_TYPE_SOFT_MAX_F32,
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@@ -583,6 +585,8 @@ static struct ggml_backend_metal_context * ggml_metal_init(int n_cb) {
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_GELU_QUICK_4, gelu_quick_4, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_SILU, silu, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_SILU_4, silu_4, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_SWIGLU, swiglu, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_SWIGLU_4, swiglu_4, true);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_SOFT_MAX_F16, soft_max_f16, ctx->support_simdgroup_reduction);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_SOFT_MAX_F16_4, soft_max_f16_4, ctx->support_simdgroup_reduction);
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GGML_METAL_ADD_KERNEL(GGML_METAL_KERNEL_TYPE_SOFT_MAX_F32, soft_max_f32, ctx->support_simdgroup_reduction);
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@@ -884,6 +888,7 @@ static bool ggml_metal_supports_op(const struct ggml_backend_metal_context * ctx
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case GGML_UNARY_OP_GELU:
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case GGML_UNARY_OP_GELU_QUICK:
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case GGML_UNARY_OP_SILU:
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case GGML_UNARY_OP_SWIGLU:
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return ggml_is_contiguous(op->src[0]);
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default:
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return false;
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@@ -1595,6 +1600,30 @@ static enum ggml_status ggml_metal_graph_compute(
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[encoder setBuffer:id_src0 offset:offs_src0 atIndex:0];
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[encoder setBuffer:id_dst offset:offs_dst atIndex:1];
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[encoder dispatchThreadgroups:MTLSizeMake(n, 1, 1) threadsPerThreadgroup:MTLSizeMake(1, 1, 1)];
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} break;
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case GGML_UNARY_OP_SWIGLU:
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{
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int64_t n = ggml_nelements(dst);
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GGML_ASSERT(ne0 == src0->ne[0]/2);
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id<MTLComputePipelineState> pipeline = nil;
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if (ne0 % 4 == 0) {
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pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_SWIGLU_4].pipeline;
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n /= 4;
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} else {
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pipeline = ctx->kernels[GGML_METAL_KERNEL_TYPE_SWIGLU].pipeline;
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}
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const int64_t stride = src0->nb[1]/sizeof(float);
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[encoder setComputePipelineState:pipeline];
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[encoder setBuffer:id_src0 offset:offs_src0 atIndex:0];
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[encoder setBuffer:id_dst offset:offs_dst atIndex:1];
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[encoder setBytes:&ne0 length:sizeof(ne0) atIndex:2];
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[encoder setBytes:&stride length:sizeof(stride) atIndex:3];
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[encoder dispatchThreadgroups:MTLSizeMake(n, 1, 1) threadsPerThreadgroup:MTLSizeMake(1, 1, 1)];
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} break;
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default:
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@@ -398,6 +398,30 @@ kernel void kernel_silu_4(
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dst[tpig] = x / (1.0f + exp(-x));
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}
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kernel void kernel_swiglu(
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device const float * src0,
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device float * dst,
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constant int64_t & ne0,
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constant int64_t & stride,
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uint tpig[[thread_position_in_grid]]) {
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const int64_t row = tpig/ne0;
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const int64_t idx = tpig%ne0;
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const int64_t j = row*stride + idx;
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dst[tpig] = src0[j] * src0[j + ne0] / (1.0f + exp(-src0[j]));
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}
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kernel void kernel_swiglu_4(
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device const float4 * src0,
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device float4 * dst,
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constant int64_t & ne0,
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constant int64_t & stride,
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uint tpig[[thread_position_in_grid]]) {
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const int64_t row = tpig/(ne0/4);
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const int64_t idx = tpig%(ne0/4);
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const int64_t j = row*(stride/4) + idx;
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dst[tpig] = src0[j] * src0[j + ne0/4] / (1.0f + exp(-src0[j]));
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}
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kernel void kernel_sqr(
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device const float * src0,
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device float * dst,
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