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https://github.com/ikawrakow/ik_llama.cpp.git
synced 2026-02-24 15:14:10 +00:00
iq5_ks: CUDA dequantize works
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@@ -3451,6 +3451,7 @@ GGML_CALL static bool ggml_backend_cuda_supports_op(ggml_backend_t backend, cons
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case GGML_TYPE_IQ4_XS:
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case GGML_TYPE_IQ4_KS:
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case GGML_TYPE_IQ4_KSS:
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case GGML_TYPE_IQ5_KS:
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case GGML_TYPE_IQ2_K:
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case GGML_TYPE_IQ2_KS:
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case GGML_TYPE_IQ3_K:
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@@ -599,6 +599,13 @@ struct ggml_cuda_type_traits<GGML_TYPE_IQ5_K> {
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static constexpr int qi = QI5_XS;
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};
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template<>
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struct ggml_cuda_type_traits<GGML_TYPE_IQ5_KS> {
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static constexpr int qk = QK_K;
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static constexpr int qr = QR5_XS;
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static constexpr int qi = QI5_XS;
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};
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template<>
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struct ggml_cuda_type_traits<GGML_TYPE_IQ6_K> {
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static constexpr int qk = QK_K;
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@@ -696,6 +696,46 @@ static __global__ void dequantize_block_iq5_k(const void * __restrict__ vx, dst_
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}
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}
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template<typename dst_t>
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static __global__ void dequantize_block_iq5_ks(const void * __restrict__ vx, dst_t * __restrict__ yy, int64_t n_per_row, int64_t row_size) {
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int64_t ii = blockIdx.x;
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int64_t row = (QK_K * ii) / n_per_row;
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const char * cx = (const char *)vx + row * row_size;
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float d = *(const float *)cx;
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const block_iq5_ks * x = (const block_iq5_ks *)(cx + sizeof(float));
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const int64_t i = ii - (row*n_per_row)/QK_K;
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const int tid = threadIdx.x;
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int ib64 = tid/8; // 0...3
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int il = tid%8; // 0...7
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dst_t * y = yy + ii*QK_K + 64*ib64 + 2*il;
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const float dl1 = d * ((int)(x[i].scales[2*ib64+0] & 254) - 127);
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const float dl2 = d * ((int)(x[i].scales[2*ib64+1] & 254) - 127);
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const uint8_t * qs = x[i].qs + 32*ib64 + 2*il;
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const uint8_t * qh = x[i].qh + 2*il;
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auto values1 = iq5nl_values + ((x[i].scales[2*ib64+0] & 1) << 5);
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auto values2 = iq5nl_values + ((x[i].scales[2*ib64+1] & 1) << 5);
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if constexpr (std::is_same_v<dst_t, nv_bfloat16>) {
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for (int j = 0; j < 2; ++j) {
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const uint8_t h1 = qh[j] >> 2*(ib64%4), h2 = qh[j+16] >> 2*(ib64%4);
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y[j+ 0] = __float2bfloat16(dl1 * values1[(qs[j+ 0] & 0xf) | ((h1 & 1) << 4)]);
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y[j+16] = __float2bfloat16(dl1 * values1[(qs[j+16] & 0xf) | ((h2 & 1) << 4)]);
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y[j+32] = __float2bfloat16(dl2 * values2[(qs[j+ 0] >> 4) | ((h1 & 2) << 3)]);
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y[j+48] = __float2bfloat16(dl2 * values2[(qs[j+16] >> 4) | ((h2 & 2) << 3)]);
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}
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} else {
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for (int j = 0; j < 2; ++j) {
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const uint8_t h1 = qh[j] >> 2*(ib64%4), h2 = qh[j+16] >> 2*(ib64%4);
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y[j+ 0] = dl1 * values1[(qs[j+ 0] & 0xf) | ((h1 & 1) << 4)];
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y[j+16] = dl1 * values1[(qs[j+16] & 0xf) | ((h2 & 1) << 4)];
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y[j+32] = dl2 * values2[(qs[j+ 0] >> 4) | ((h1 & 2) << 3)];
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y[j+48] = dl2 * values2[(qs[j+16] >> 4) | ((h2 & 2) << 3)];
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}
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}
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}
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template<typename dst_t>
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static __global__ void dequantize_block_iq6_k(const void * __restrict__ vx, dst_t * __restrict__ yy) {
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@@ -1008,6 +1048,14 @@ static void dequantize_row_iq4_ks_cuda(const void * vx, dst_t * y, const int64_t
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dequantize_block_iq4_ks<<<nb, 32, 0, stream>>>(vx, y, n_per_row, row_size);
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}
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template<typename dst_t>
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static void dequantize_row_iq5_ks_cuda(const void * vx, dst_t * y, const int64_t nrows, const int64_t n_per_row, cudaStream_t stream) {
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const int64_t k = nrows * n_per_row;
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const int64_t row_size = ggml_row_size(GGML_TYPE_IQ5_KS, n_per_row);
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const int nb = (k + QK_K - 1) / QK_K;
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dequantize_block_iq5_ks<<<nb, 32, 0, stream>>>(vx, y, n_per_row, row_size);
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}
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template<typename dst_t>
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static void dequantize_row_iq4_kss_cuda(const void * vx, dst_t * y, const int64_t nrows, const int64_t n_per_row, cudaStream_t stream) {
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const int64_t k = nrows * n_per_row;
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@@ -1140,6 +1188,8 @@ to_bf16_cuda_t ggml_get_to_bf16_cuda(ggml_type type) {
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return dequantize_row_iq4_kss_cuda<nv_bfloat16>;
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case GGML_TYPE_IQ4_KS:
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return dequantize_row_iq4_ks_cuda<nv_bfloat16>;
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case GGML_TYPE_IQ5_KS:
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return dequantize_row_iq5_ks_cuda<nv_bfloat16>;
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case GGML_TYPE_IQ4_K:
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return dequantize_row_iq4_k_cuda<nv_bfloat16>;
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case GGML_TYPE_IQ5_K:
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@@ -1202,6 +1252,8 @@ to_fp16_cuda_t ggml_get_to_fp16_cuda(ggml_type type) {
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return dequantize_row_iq4_ks_cuda;
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case GGML_TYPE_IQ4_KSS:
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return dequantize_row_iq4_kss_cuda;
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case GGML_TYPE_IQ5_KS:
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return dequantize_row_iq5_ks_cuda;
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case GGML_TYPE_IQ2_KS:
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return dequantize_row_iq2_ks_cuda;
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case GGML_TYPE_IQ2_K:
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@@ -1273,6 +1325,8 @@ to_fp32_cuda_t ggml_get_to_fp32_cuda(ggml_type type) {
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return dequantize_row_iq4_ks_cuda;
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case GGML_TYPE_IQ4_KSS:
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return dequantize_row_iq4_kss_cuda;
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case GGML_TYPE_IQ5_KS:
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return dequantize_row_iq5_ks_cuda;
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case GGML_TYPE_IQ2_KS:
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return dequantize_row_iq2_ks_cuda;
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case GGML_TYPE_IQ2_K:
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@@ -328,6 +328,44 @@ __device__ __forceinline__ float vec_dot_iq5_k_q8_1(
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return d5 * (__low2float(bq8_1[2*(i4/2)+0].ds) * sumi1 * ls1 + __low2float(bq8_1[2*(i4/2)+1].ds) * sumi2 * ls2);
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}
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__device__ __forceinline__ float vec_dot_iq5_ks_q8_1(
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const void * __restrict__ vbq, const block_q8_1 * __restrict__ bq8_1, const int & kbx, const int & iqs) {
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// TODO
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return 0.f;
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const block_iq5_k * bq5 = (const block_iq5_k *) vbq + kbx;
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const uint8_t * all_values = (const uint8_t *)iq5nl_values;
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int i4 = iqs/4; // 0...7. Blocks of 16 index is 4*(i4/2) + (i4%2) + (0 and 2)
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const int32_t * q8_1 = (const int *)bq8_1[2*(i4/2)+0].qs + 4*(i4%2);
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const int32_t * q8_2 = (const int *)bq8_1[2*(i4/2)+1].qs + 4*(i4%2);
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const uint32_t * q4 = (const uint32_t *)bq5->qs + 8*(i4/2) + 4*(i4%2);
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const uint32_t * qh = (const uint32_t *)bq5->qh + 4*(i4%2);
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const uint16_t extra = bq5->extra >> (4*(i4/2) + (i4%2));
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const uint8_t * values1 = all_values + 32*(extra & 1);
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const uint8_t * values2 = all_values + 8*(extra & 4);
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uint32_t aux32[2];
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const uint8_t * a8 = (const uint8_t *)aux32;
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int v1, v2;
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int sumi1 = 0, sumi2 = 0;
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for (int j = 0; j < 4; ++j) {
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uint32_t h = qh[j] >> 2*(i4/2);
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aux32[0] = ((q4[j] >> 0) & 0x0f0f0f0f) | ((h << 4) & 0x10101010);
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aux32[1] = ((q4[j] >> 4) & 0x0f0f0f0f) | ((h << 3) & 0x10101010);
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v1 = int_from_table(a8+0, values1);
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v2 = int_from_table(a8+4, values2);
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sumi1 = ggml_cuda_dp4a(v1, q8_1[j], sumi1);
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sumi2 = ggml_cuda_dp4a(v2, q8_2[j], sumi2);
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}
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const float d5 = __half2float(bq5->d);
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const uint8_t sh = bq5->scales_h[i4/2] >> 2*(i4%2);
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const int ls1 = (((bq5->scales_l[2*(i4/2)+0] >> 4*(i4%2)) & 0xf) | ((sh << 4) & 0x30)) - 32;
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const int ls2 = (((bq5->scales_l[2*(i4/2)+1] >> 4*(i4%2)) & 0xf) | ((sh << 0) & 0x30)) - 32;
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return d5 * (__low2float(bq8_1[2*(i4/2)+0].ds) * sumi1 * ls1 + __low2float(bq8_1[2*(i4/2)+1].ds) * sumi2 * ls2);
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}
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#define VDR_IQ6_K_Q8_1_MMVQ 4
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#define VDR_IQ6_K_Q8_1_MMQ 4
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@@ -799,6 +837,14 @@ void mul_mat_vec_iq5_k_q8_1_cuda(
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iqk_mul_mat_vec_q_cuda<GGML_TYPE_IQ5_K, VDR_IQ5_K_Q8_1_MMVQ, vec_dot_iq5_k_q8_1>(vx, vy, dst, ids_data, ncols_x, nrows_x, nrows_y, ncols_y, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
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}
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void mul_mat_vec_iq5_ks_q8_1_cuda(
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const void * vx, const void * vy, float * dst, const char * ids_data,
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const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,
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const int ne2, const uint64_t nb02, const uint64_t nb12, const uint64_t nb2, int64_t ids_nb0, cudaStream_t stream) {
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iqk_mul_mat_vec_q_cuda<GGML_TYPE_IQ5_KS, VDR_IQ5_K_Q8_1_MMVQ, vec_dot_iq5_ks_q8_1>(vx, vy, dst, ids_data, ncols_x, nrows_x, nrows_y, ncols_y, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
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}
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void mul_mat_vec_iq6_k_q8_1_cuda(
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const void * vx, const void * vy, float * dst, const char * ids_data,
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const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,
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@@ -26,6 +26,11 @@ void mul_mat_vec_iq5_k_q8_1_cuda(
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const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,
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const int ne2, const uint64_t nb02, const uint64_t nb12, const uint64_t nb2, const int64_t ids_nb0, cudaStream_t stream);
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void mul_mat_vec_iq5_ks_q8_1_cuda(
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const void * vx, const void * vy, float * dst, const char * ids_data,
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const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,
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const int ne2, const uint64_t nb02, const uint64_t nb12, const uint64_t nb2, const int64_t ids_nb0, cudaStream_t stream);
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void mul_mat_vec_iq6_k_q8_1_cuda(
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const void * vx, const void * vy, float * dst, const char * ids_data,
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const int ncols_x, const int nrows_x, const int nrows_y, const int ncols_y, const int nrows_dst,
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@@ -530,6 +530,9 @@ static void ggml_cuda_op_mul_mat_vec_q_impl(ggml_backend_cuda_context & ctx, ggm
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case GGML_TYPE_IQ5_K:
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mul_mat_vec_iq5_k_q8_1_cuda(src0_dd_i, src1_ddq_i, dst_dd_i, ids_data, ne00, row_diff, src1_padded_row_size, src1_ncols, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
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break;
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case GGML_TYPE_IQ5_KS:
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mul_mat_vec_iq5_ks_q8_1_cuda(src0_dd_i, src1_ddq_i, dst_dd_i, ids_data, ne00, row_diff, src1_padded_row_size, src1_ncols, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
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break;
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case GGML_TYPE_IQ6_K:
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mul_mat_vec_iq6_k_q8_1_cuda(src0_dd_i, src1_ddq_i, dst_dd_i, ids_data, ne00, row_diff, src1_padded_row_size, src1_ncols, nrows_dst, ne2, nb02, nb12, nb2, ids_nb0, stream);
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break;
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