Temporarily disabling optimized ZHER

- Disabling optimized ZHER pending verification with netlib BLAS test.

AMD-Internal: [CPUPL-2416]
Change-Id: I74c4d16e1c99ddeb1df91130a8e14feafd0952d0
This commit is contained in:
Arnav Sharma
2022-08-19 12:05:53 +05:30
committed by Arnav Sharma
parent 6861fcae91
commit 035ed98b51
2 changed files with 10 additions and 4 deletions

View File

@@ -163,8 +163,11 @@ void PASTEMAC(ch,varname) \
) \
{ \
const num_t dt = PASTEMAC(ch,type); \
/* ToDo:
Enable intrinsic implementation after verifying
with netlib BLAS tests. */ \
/* Redirect to intrinsic implementation of HER for dcomplex */ \
if ( bli_cpuid_is_avx_supported() == TRUE && bli_is_conj(conjh) && incx == 1 ) \
/* if ( bli_cpuid_is_avx_supported() == TRUE && bli_is_conj(conjh) && incx == 1 ) \
{ \
bli_zher_zen_int_var1 \
( \
@@ -181,7 +184,7 @@ void PASTEMAC(ch,varname) \
cntx \
); \
} \
else \
else \ */ \
{ \
ctype* x0; \
ctype* chi1; \

View File

@@ -163,8 +163,11 @@ void PASTEMAC(ch,varname) \
) \
{ \
const num_t dt = PASTEMAC(ch,type); \
/* ToDo:
Enable intrinsic implementation after verifying
with netlib BLAS tests. */ \
/* Redirect to intrinsic implementation of HER for unit increment */ \
if ( bli_cpuid_is_avx_supported() == TRUE && bli_is_conj(conjh) && incx == 1 ) \
/* if ( bli_cpuid_is_avx_supported() == TRUE && bli_is_conj(conjh) && incx == 1 ) \
{ \
bli_zher_zen_int_var2 \
( \
@@ -181,7 +184,7 @@ void PASTEMAC(ch,varname) \
cntx \
); \
} \
else \
else \ */ \
{ \
ctype* chi1; \
ctype* x2; \