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Merge "Trace and logging" into amd-staging-milan-3.0

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This commit is contained in:
Madan Mohan Manokar
2020-10-30 08:35:02 -04:00
committed by Gerrit Code Review
parent 1c29554b9e 2803e9b761
commit 86f3d1a412
8 changed files with 36 additions and 4 deletions
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3
frame/compat/bla_her.c
View File

@@ -5,6 +5,7 @@
libraries.
Copyright (C) 2014, The University of Texas at Austin
Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
@@ -50,6 +51,7 @@ void PASTEF77(ch,blasname) \
ftype* a, const f77_int* lda \
) \
{ \
AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
uplo_t blis_uploa; \
dim_t m0; \
ftype* x0; \
@@ -97,6 +99,7 @@ void PASTEF77(ch,blasname) \
NULL \
); \
\
AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
/* Finalize BLIS. */ \
bli_finalize_auto(); \
}

8
frame/compat/bla_her2k.c
View File

@@ -5,7 +5,7 @@
libraries.
Copyright (C) 2014, The University of Texas at Austin
Copyright (C) 2019, Advanced Micro Devices, Inc.
Copyright (C) 2019-2020, Advanced Micro Devices, Inc. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
@@ -58,6 +58,7 @@ void PASTEF77(ch,blasname) \
ftype* c, const f77_int* ldc \
) \
{ \
AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
uplo_t blis_uploc; \
trans_t blis_transa; \
dim_t m0, k0; \
@@ -101,9 +102,9 @@ void PASTEF77(ch,blasname) \
) \
) \
{ \
AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
/* Finalize BLIS. */ \
bli_finalize_auto(); \
\
return; \
} \
\
@@ -132,6 +133,7 @@ void PASTEF77(ch,blasname) \
NULL \
); \
\
AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
/* Finalize BLIS. */ \
bli_finalize_auto(); \
}
@@ -154,6 +156,7 @@ void PASTEF77(ch,blasname) \
ftype* c, const f77_int* ldc \
) \
{ \
AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
uplo_t blis_uploc; \
trans_t blis_transa; \
dim_t m0, k0; \
@@ -250,6 +253,7 @@ void PASTEF77(ch,blasname) \
NULL \
); \
\
AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
/* Finalize BLIS. */ \
bli_finalize_auto(); \
}

5
frame/compat/bla_herk.c
View File

@@ -5,7 +5,7 @@
libraries.
Copyright (C) 2014, The University of Texas at Austin
Copyright (C) 2019, Advanced Micro Devices, Inc.
Copyright (C) 2019-2020, Advanced Micro Devices, Inc. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
@@ -63,6 +63,7 @@ void PASTEF77(ch,blasname) \
inc_t rs_a, cs_a; \
inc_t rs_c, cs_c; \
\
AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
/* Initialize BLIS. */ \
bli_init_auto(); \
\
@@ -98,6 +99,7 @@ void PASTEF77(ch,blasname) \
) \
) \
{ \
AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
/* Finalize BLIS. */ \
bli_finalize_auto(); \
\
@@ -125,6 +127,7 @@ void PASTEF77(ch,blasname) \
NULL \
); \
\
AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
/* Finalize BLIS. */ \
bli_finalize_auto(); \
}

3
frame/compat/bla_nrm2.c
View File

@@ -5,6 +5,7 @@
libraries.
Copyright (C) 2014, The University of Texas at Austin
Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
@@ -47,6 +48,7 @@ ftype_r PASTEF772(chr,chx,blasname) \
const ftype_x* x, const f77_int* incx \
) \
{ \
AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
dim_t n0; \
ftype_x* x0; \
inc_t incx0; \
@@ -72,6 +74,7 @@ ftype_r PASTEF772(chr,chx,blasname) \
NULL \
); \
\
AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
/* Finalize BLIS. */ \
bli_finalize_auto(); \
\

6
frame/compat/bla_scal.c
View File

@@ -49,6 +49,7 @@ void PASTEF772(chx,cha,blasname) \
ftype_x* x, const f77_int* incx \
) \
{ \
AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
dim_t n0; \
ftype_x* x0; \
inc_t incx0; \
@@ -81,6 +82,7 @@ void PASTEF772(chx,cha,blasname) \
NULL \
); \
\
AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
/* Finalize BLIS. */ \
bli_finalize_auto(); \
}
@@ -95,6 +97,7 @@ void sscal_
float* x, const f77_int* incx
)
{
AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1)
dim_t n0;
float* x0;
inc_t incx0;
@@ -143,6 +146,7 @@ void sscal_
/* Finalize BLIS. */
// bli_finalize_auto();
AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1)
}
void dscal_
@@ -152,6 +156,7 @@ void dscal_
double* x, const f77_int* incx
)
{
AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1)
dim_t n0;
double* x0;
inc_t incx0;
@@ -201,6 +206,7 @@ void dscal_
/* Finalize BLIS. */
// bli_finalize_auto();
AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1)
}
INSERT_GENTFUNCSCAL_BLAS_CZ( scal, scalv )

6
frame/compat/bla_swap.c
View File

@@ -49,6 +49,7 @@ void PASTEF77(ch,blasname) \
ftype* y, const f77_int* incy \
) \
{ \
AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
dim_t n0; \
ftype* x0; \
ftype* y0; \
@@ -76,6 +77,7 @@ void PASTEF77(ch,blasname) \
NULL \
); \
\
AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
/* Finalize BLIS. */ \
bli_finalize_auto(); \
}
@@ -90,6 +92,7 @@ void sswap_
float* y, const f77_int* incy
)
{
AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1)
dim_t n0;
float* x0;
float* y0;
@@ -154,6 +157,7 @@ void sswap_
/* Finalize BLIS. */
// bli_finalize_auto();
AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1)
}
void dswap_
@@ -163,6 +167,7 @@ void dswap_
double* y, const f77_int* incy
)
{
AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1)
dim_t n0;
double* x0;
double* y0;
@@ -227,6 +232,7 @@ void dswap_
/* Finalize BLIS. */
// bli_finalize_auto();
AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1)
}
INSERT_GENTFUNC_BLAS_CZ( swap, swapv )

6
frame/compat/bla_symm.c
View File

@@ -5,7 +5,7 @@
libraries.
Copyright (C) 2014, The University of Texas at Austin
Copyright (C) 2019, Advanced Micro Devices, Inc.
Copyright (C) 2019-2020, Advanced Micro Devices, Inc. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
@@ -58,6 +58,7 @@ void PASTEF77(ch,blasname) \
ftype* c, const f77_int* ldc \
) \
{ \
AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
side_t blis_side; \
uplo_t blis_uploa; \
dim_t m0, n0; \
@@ -116,6 +117,7 @@ void PASTEF77(ch,blasname) \
NULL \
); \
\
AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
/* Finalize BLIS. */ \
bli_finalize_auto(); \
}
@@ -138,6 +140,7 @@ void PASTEF77(ch,blasname) \
ftype* c, const f77_int* ldc \
) \
{ \
AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
side_t blis_side; \
uplo_t blis_uploa; \
dim_t m0, n0; \
@@ -220,6 +223,7 @@ void PASTEF77(ch,blasname) \
\
/* Finalize BLIS. */ \
bli_finalize_auto(); \
AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
}
#endif

3
frame/compat/bla_symv.c
View File

@@ -5,6 +5,7 @@
libraries.
Copyright (C) 2014, The University of Texas at Austin
Copyright (C) 2020, Advanced Micro Devices, Inc. All rights reserved.
Redistribution and use in source and binary forms, with or without
modification, are permitted provided that the following conditions are
@@ -52,6 +53,7 @@ void PASTEF77(ch,blasname) \
ftype* y, const f77_int* incy \
) \
{ \
AOCL_DTL_TRACE_ENTRY(AOCL_DTL_LEVEL_TRACE_1) \
uplo_t blis_uploa; \
dim_t m0; \
ftype* x0; \
@@ -106,6 +108,7 @@ void PASTEF77(ch,blasname) \
NULL \
); \
\
AOCL_DTL_TRACE_EXIT(AOCL_DTL_LEVEL_TRACE_1) \
/* Finalize BLIS. */ \
bli_finalize_auto(); \
}