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V, Varsha d995496ac1 BugFix: BF16 AVX2 fallback GEMV m=1 path for reordered B inputs
- For BF16 GEMVM1 fallback path when B matrix is reordered,
 there wasn't a panel adjustment happening after the kernel execution.
 - When the input size exceeds the panel boundary this would cause
 wrong panel access leading to incorrect results. Hence, added the same.

[ AMD-Internal : CPUPL-8201 ]
2026-03-25 12:34:51 +05:30
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2025-08-26 16:37:43 +01:00
2025-08-26 16:37:43 +01:00
2025-02-07 11:43:28 +00:00