V, Varsha fecb1aa7a5 Bug Fix in BF16 AVX2 conversion path (#236) ...

- In the current implementation of bf16 to f32 conversion for packed data
 we handle both GEMM and GEMV conditions in the same function separated
 with conditions.
 - But, when n = (NC+1) the function would execute GEMV conversion logic
 and write back the data inaccurately leading to accuracy issues.
 - Hence, modified the convert function and reorder functions to have
 separate conversion logic to make it cleaner and avoid confusions.
 -  Also, updated the API calls to adhere to the changes appropriately.

[AMD-Internal: CPUPL-7540]

2025-10-17 15:38:02 +05:30

..

bf16bf16f32

Bug Fix in BF16 AVX2 conversion path (#236)

2025-10-17 15:38:02 +05:30

f32f32f32

Implemented AVX2 based GEMV for n=1 case.

2025-05-05 08:56:22 +00:00

s8s8s32

Added transB in all AVX512 based int8 API's

2024-05-23 03:46:13 +05:30

u8s8s32

New A packing kernels for F32 API in LPGEMM.

2025-02-26 05:23:35 +00:00

lpgemm_eltwise_ops_kernels.h

Element wise operations API for float(f32) input matrix in LPGEMM.

2024-08-27 03:28:52 -04:00

lpgemm_kernels.h

Disabled no post-ops path in lpgemm f32 kernels for few gcc versions

2025-09-22 15:52:21 +05:30

lpgemm_utils_kernels.h

Element wise operations API for bfloat16 input matrix in LPGEMM.

2024-08-05 07:17:08 -04:00